MES system integrated output interface assembly

Abstract

The utility model discloses an MES system integrated output interface assembly, comprising a controller, the controller is respectively connected with an LVDS sending interface circuit, an LVDS receiving interface circuit module, and a synchronous circuit 422 interface circuit, the LVDS receiving interface circuit module comprises an LVDS receiving interface circuit 1 and an LVDS receiving interface circuit 2, and the LVDS sending interface circuit; according to the utility model, the dynamic bandwidth management module is introduced, real-time monitoring and dynamic bandwidth distribution of an Ethernet interface circuit are realized, data streams of key tasks are processed preferentially through the flow priority control unit, tasks with high real-time requirements can be ensured to be completed rapidly, the enhanced power supply module adopts a double-path redundant power supply design, and the power supply efficiency is improved. The paths of the main power supply unit and the standby power supply unit are automatically switched, the influence of a single-path power supply fault on system operation is effectively avoided, the power management unit monitors the states of power supply voltage, current, temperature and the like in real time, and potential power supply faults are found and alarmed in time.

Description

Technical Field

[0001] This utility model relates to the field of system output interface technology, specifically to an MES system integration output interface component. Background Technology

[0002] As a crucial tool connecting the enterprise's planning and production control layers, one of the core functions of a Manufacturing Execution System (MES) is to facilitate data interaction and information integration between production site equipment and the enterprise management system. To achieve this, MES systems typically require multiple output interface components to support various communication protocols and device connectivity needs. Current MES output interface components generally include LVDS (Low Voltage Differential Signaling) interfaces, Ethernet interfaces, and RS-422 synchronization interfaces to meet the transmission requirements of different data types. Among these, the LVDS interface is widely used for high-speed, high-volume signal transmission and is suitable for environments requiring high interference immunity; the Ethernet interface is primarily used for network communication between devices and host computers or servers, supporting long-distance, large-area data transmission; and the RS-422 synchronization interface is used to achieve timing synchronization and data interaction with specific devices.

[0003] However, existing technologies still have significant shortcomings, such as:

[0004] Existing technologies suffer from insufficient network bandwidth allocation efficiency under high load conditions. In traditional MES systems, Ethernet interfaces typically employ a static bandwidth allocation mechanism, which can easily lead to low bandwidth utilization and insufficient transmission priority during peak network traffic or when load fluctuations are significant. Furthermore, unstable single-path power supply results in insufficient system reliability and poses a risk of power outages. Utility Model Content

[0005] The purpose of this invention is to provide an MES system integration output interface component to solve the problems mentioned in the background art.

[0006] To achieve the above objectives, this utility model provides the following technical solution:

[0007] A MES system integrated output interface component includes a controller, which is connected to an LVDS transmitting interface circuit, an LVDS receiving interface circuit module, and a synchronization circuit 422 interface circuit. The LVDS receiving interface circuit module includes an LVDS receiving interface circuit one and an LVDS receiving interface circuit two. The LVDS transmitting interface circuit and the LVDS receiving interface circuit one are connected to a memory, and the LVDS receiving interface circuit two is connected to an image device signal.

[0008] An Ethernet interface circuit is connected to the controller signal via a dynamic broadband management module. The Ethernet interface circuit is also connected to the host computer and the PCM device. The synchronization circuit 422 interface circuit is connected to the PCM device signal.

[0009] The controller, LVDS transmitting interface circuit, LVDS receiving interface circuit module, synchronization circuit 422 interface circuit, memory, image device, Ethernet interface circuit host computer and PCM device are all powered by the power supply module.

[0010] Preferably, the power supply module includes a main power supply unit, a backup power supply unit, a power management unit, and a voltage converter. The main power supply unit and the backup power supply unit are signal-connected to the power management unit, and the power management unit is signal-connected to the voltage converter and the controller.

[0011] Preferably, the dynamic broadband management module includes a broadband monitoring unit, a broadband allocation and scheduling unit, a data caching unit, and a traffic priority control unit;

[0012] The broadband monitoring unit is directly connected to the Ethernet interface circuit, and the broadband monitoring unit is connected to the broadband allocation and scheduling unit.

[0013] The broadband allocation and scheduling unit is connected to the controller, the data caching unit, and the traffic priority control unit;

[0014] The data caching unit is connected to the Ethernet interface circuit and to the traffic priority control unit;

[0015] The flow priority control unit is connected to the controller and the Ethernet interface circuit.

[0016] Preferably, the broadband monitoring unit is an Ethernet PHY chip.

[0017] Preferably, the data cache unit is DDR memory.

[0018] Preferably, the traffic priority control unit (84) is a data classifier.

[0019] Compared with the prior art, the beneficial effects of this utility model are:

[0020] 1. A dynamic bandwidth management module is introduced to realize real-time monitoring and dynamic bandwidth allocation of Ethernet interface circuits. Through the traffic priority control unit, the data flow of critical tasks is processed first to ensure that tasks with high real-time requirements can be completed quickly. A data caching unit is used to smooth the high load transmission pressure, significantly reducing data loss and network latency.

[0021] 2. The enhanced power supply module adopts a dual-redundant power supply design, with automatic switching between the main power supply unit and the backup power supply unit, effectively avoiding the impact of single-circuit power supply failure on system operation. The power management unit monitors the power supply voltage, current and temperature in real time, and promptly detects and alerts to potential power supply failures. Attached Figure Description

[0022] Figure 1 This is a block diagram of the MES system integration output interface component of this utility model;

[0023] Figure 2 This is a block diagram of the power supply module in the MES system integration output interface component of this utility model;

[0024] Figure 3 This is a block diagram of the dynamic broadband management module in the MES system integration output interface component of this utility model.

[0025] In the diagram: 1. Controller; 2. LVDS transmitting interface circuit; 3. LVDS receiving interface circuit module; 31. LVDS receiving interface circuit one; 32. LVDS receiving interface circuit two; 4. Synchronization circuit 422 interface circuit; 5. Memory; 6. Image device; 7. Ethernet interface circuit; 8. Dynamic broadband management module; 81. Broadband monitoring unit; 82. Broadband allocation and scheduling unit; 83. Data buffer unit; 84. Traffic priority control unit; 9. Host computer; 10. PCM device; 11. Power supply module; 111. Main power supply unit; 112. Backup power supply unit; 113. Power management unit; 114. Voltage converter. Detailed Implementation

[0026] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0027] Please see Figure 1-3 This utility model provides a technical solution:

[0028] A MES system integrated output interface component includes a controller 1, which is connected to an LVDS transmitting interface circuit 2, an LVDS receiving interface circuit module 3, a synchronization circuit 422 interface circuit 4, and an LVDS receiving interface circuit module 3. The LVDS receiving interface circuit module 3 includes an LVDS receiving interface circuit 1 31 and an LVDS receiving interface circuit 2 32. The LVDS transmitting interface circuit 2 and the LVDS receiving interface circuit 1 31 are connected to a memory 5, and the LVDS receiving interface circuit 2 32 is connected to an image device 6 via a signal.

[0029] The LVDS transmitting interface circuit 2 and LVDS receiving interface circuit module 3 in this embodiment are well known to those skilled in the art. The specific components are not described here, nor is it the focus of this embodiment. The LVDS transmitting interface circuit 2 converts parallel data into serial data and transmits it in the form of low-voltage differential signals. It receives data from the controller 1, communicates bidirectionally with the memory 5 for data buffering, and obtains power through the voltage converter 114.

[0030] The LVDS receiver interface circuit 31 is used to receive low-voltage differential signals from external devices and convert them into parallel data;

[0031] The LVDS receiver interface circuit 2 32 communicates with the image device 6 to receive and process data from the image device.

[0032] Controller 1 is the central control unit, responsible for data processing, communication management, and coordinating the operation of various modules. It uses an FPGA+PHY control architecture and supports the control of the dynamic broadband management module 8.

[0033] Ethernet interface circuit 7 is connected to controller 1 via dynamic broadband management module 8. Ethernet interface circuit 7 is also connected to host computer 9 and PCM device 10 via signal. Synchronization circuit 422 interface circuit 4 is connected to PCM device 10 via signal.

[0034] Ethernet interface circuit 7 communicates bidirectionally with host computer 9 and PCM device 10, is connected to dynamic broadband management module 8, and is bidirectionally connected to controller 1. It receives power support from power supply module 11 and is used for bandwidth allocation and priority control. It serves as the data communication interface between host computer 9 and PCM device 10, supports gigabit / 10-gigabit Ethernet, and works in conjunction with dynamic broadband management module 8 to optimize Ethernet communication efficiency.

[0035] Synchronization circuit 422 interface circuit 4 is used for synchronous data communication of PCM device 10, bidirectionally connected to controller 1, and receives power support from power supply module 11;

[0036] The controller 1, LVDS transmitting interface circuit 2, LVDS receiving interface circuit module 3, synchronization circuit 4, 22 interface circuit 4, memory 5, image device 6, Ethernet interface circuit 7, host computer 9, and PCM device 10 are all powered by power supply module 11.

[0037] The power supply module 11 includes a main power supply unit 111, a backup power supply unit 112, a power management unit 113, and a voltage converter 114. The main power supply unit 111 and the backup power supply unit 112 are connected to the power management unit 113 by signal. The power management unit 113 is connected to the voltage converter 114 and the controller 1 by signal.

[0038] The power supply module 11 provides stable and redundant power supply support, including a main power supply unit 111 and a backup power supply unit 112. The power supply is automatically switched and monitored through the power management unit 113, and the power status is monitored in real time. The power management unit 113 is an intelligent power management unit.

[0039] The dynamic broadband management module 8 includes a broadband monitoring unit 81, a broadband allocation and scheduling unit 82, a data caching unit 83, and a traffic priority control unit 84. The broadband monitoring unit 81 is an Ethernet PHY chip, the data caching unit 83 is DDR memory, and the traffic priority control unit 84 is a data classifier.

[0040] The broadband monitoring unit 81 is directly connected to the Ethernet interface circuit 7, and the broadband monitoring unit 81 is connected to the broadband distribution and scheduling unit 82.

[0041] Broadband allocation and scheduling unit 82 is connected to controller 1, data buffer unit 83 and traffic priority control unit 84;

[0042] The data buffer unit 83 is connected to the Ethernet interface circuit 7 and to the traffic priority control unit 84;

[0043] The flow priority control unit 84 is connected to the controller 1 and the Ethernet interface circuit 7.

[0044] The broadband monitoring unit 81 is used to monitor the network traffic, load status and data transmission rate of the Ethernet interface circuit 7 in real time, collect key parameters such as traffic peak, current utilization, bandwidth utilization, etc., directly connect to the Ethernet interface circuit 7, collect network traffic data in real time, and connect to the broadband allocation and scheduling unit 82 to provide traffic monitoring information.

[0045] The bandwidth allocation and scheduling unit 82 can be implemented by FPGA logic circuits and internal register arrays. Based on the traffic information provided by the bandwidth monitoring unit and the preset priority rules, it dynamically adjusts the bandwidth allocation of the data stream and supports the allocation of tasks with different priorities. For example, it prioritizes the transmission of critical data with high real-time requirements, performs traffic shaping based on load conditions, avoids bandwidth saturation or network congestion, connects to the controller 1 to receive priority rules and scheduling strategy instructions, connects to the data buffer unit 83 to control the allocation and reading of the buffer queue, and connects to the traffic priority control unit 84 to adjust the scheduling of the data stream based on priority.

[0046] The data caching unit 83 is implemented through DDR memory and is used for fast reading and writing of data streams. It temporarily stores the data stream entering the Ethernet interface circuit 7 to alleviate the transmission pressure under high load conditions. In conjunction with the bandwidth allocation and scheduling unit, it avoids data loss. It is connected to the Ethernet interface circuit 7 and is used to temporarily store the data entering the Ethernet. It is also connected to the traffic priority control unit 84 and processes the data according to priority rules.

[0047] The flow priority control unit 84 can be implemented through a data classifier, which sets priority labels for data streams, adjusts the processing order according to the importance or real-time nature of the task, and provides various management strategies such as fixed priority and dynamic priority. It is connected to the controller 1 to receive priority rules, and is connected to the Ethernet interface circuit 7 to output the data stream that has been prioritized and scheduled.

[0048] Although embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the present invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A MES system integrated output interface component, comprising a controller (1), wherein the controller (1) is connected to an LVDS transmitting interface circuit (2), an LVDS receiving interface circuit module (3), and a synchronization circuit 422 interface circuit (4), respectively, characterized in that: The LVDS receiving interface circuit module (3) includes LVDS receiving interface circuit one (31) and LVDS receiving interface circuit two (32). The LVDS transmitting interface circuit (2) and LVDS receiving interface circuit one (31) are connected to the memory (5), and the LVDS receiving interface circuit two (32) is connected to the image device (6) via signal. Ethernet interface circuit (7), the Ethernet interface circuit (7) is connected to the controller (1) via the dynamic broadband management module (8), the Ethernet interface circuit (7) is connected to the host computer (9) and the PCM device (10) via the signal, the synchronization circuit 422 interface circuit (4) is connected to the PCM device (10) via the signal; The controller (1), LVDS transmitting interface circuit (2), LVDS receiving interface circuit module (3), synchronization circuit 422 interface circuit (4), memory (5), image device (6), Ethernet interface circuit (7), host computer (9) and PCM device (10) are all powered by power supply module (11).

2. The MES system integration output interface component according to claim 1, characterized in that: The power supply module (11) includes a main power supply unit (111), a backup power supply unit (112), a power management unit (113), and a voltage converter (114). The main power supply unit (111) and the backup power supply unit (112) are connected to the power management unit (113) by signal. The power management unit (113) is connected to the voltage converter (114) and the controller (1) by signal.

3. The MES system integration output interface component according to claim 2, characterized in that: The dynamic broadband management module (8) includes a broadband monitoring unit (81), a broadband allocation and scheduling unit (82), a data caching unit (83), and a traffic priority control unit (84). The broadband monitoring unit (81) and the Ethernet interface circuit (7) are directly connected, and the broadband monitoring unit (81) is connected to the broadband allocation and scheduling unit (82). The broadband allocation and scheduling unit (82) is connected to the controller (1), the data caching unit (83), and the traffic priority control unit (84); The data caching unit (83) is connected to the Ethernet interface circuit (7) and to the traffic priority control unit (84); The flow priority control unit (84) is connected to the controller (1) and the Ethernet interface circuit (7).

4. The MES system integration output interface component according to claim 3, characterized in that: The broadband monitoring unit (81) is an Ethernet PHY chip.

5. The MES system integration output interface component according to claim 3, characterized in that: The data cache unit (83) is DDR memory.

6. The MES system integration output interface component according to claim 3, characterized in that: The traffic priority control unit (84) is a data classifier.

Images