Multi-port radio frequency chip testing device

Abstract

The utility model provides a multi-port radio frequency chip testing device, which comprises a power supply unit, an input switch unit, an output switch unit and a control unit, and is characterized in that the power supply unit is configured to provide power supply voltage for components of the chip testing device; the input switch unit is configured to receive an input signal and provide the input signal to a corresponding input pin of a chip to be tested; the output switch unit is configured to receive an output signal from an output pin of the chip to be tested and output the output signal; the control unit is configured to be connected with the power supply unit, the input switch unit and the output switch unit, and different pins of the chip to be tested are selected by controlling on and off of the input switch unit and the output switch unit.

Description

TECHNICAL FIELD

[0001] The utility model relates to a chip testing device more particularly to a multiport radio frequency chip testing device. BACKGROUND

[0002] When the chip is in mass production test, the chip needs to be tested, and during the test, each port of the chip needs to be tested. When the chip has multiple ports, for example, when the multiport radio frequency chip is in mass production test, each radio frequency test port of the chip needs to be turned on, for example, when the chip has 16 input ports and 4 output ports, each port needs to be measured. In the traditional test, 20-port testing instruments are needed for testing, however, the more testing ports the testing instrument has, the more expensive the testing instrument is, which increases the testing cost. SUMMARY

[0003] One aspect of the utility model provides a kind of multiport radio frequency chip testing device, comprising: power supply unit, input switch unit, output switch unit and control unit, its characterized in that: power supply unit is configured to provide power supply voltage for the components of chip testing device;Input switch unit is configured to receive input signal, and input signal is provided to the corresponding input pin of the chip to be tested;Output switch unit is configured to receive output signal from the output pin of the chip to be tested, and output the output signal;Control unit is configured to be connected with the power supply unit, input switch unit and output switch unit, by controlling the turn-on and turn-off of input switch unit and output switch unit, to select different pins of the chip to be tested, the input switch unit is configured as single-input multiple-output radio frequency switch unit, the output end of the single-input multiple-output radio frequency switch unit is connected with the input pin of the chip to be tested respectively, and the single-input multiple-output radio frequency switch unit selects the output end of turn-on by the control unit.

[0004] One aspect of the utility model provides a kind of multiport radio frequency chip testing device, and its characterized in that, the power supply unit is also configured to provide power supply voltage for the chip to be tested.

[0005] One aspect of the utility model provides a kind of multiport radio frequency chip testing device, and its characterized in that, the power supply unit includes N voltage providing units, to provide power supply voltage for input switch unit, output switch unit, control unit and the chip to be tested respectively, N is natural number.

[0006] The utility model discloses a kind of multi-port radio frequency chip testing devices, it is characterized in that, the output switch unit is configured as the radio frequency switch unit of multiple input single output, the input end of the radio frequency switch unit of multiple input single output is connected with the output pin of the chip to be measured respectively, and the radio frequency switch unit of multiple input single output selects the input end of conduction by the control unit.

[0007] The utility model discloses a kind of multi-port radio frequency chip testing devices, it is characterized in that, the output switch unit and the input switch unit are configured as linkage switch unit.

[0008] The utility model discloses a kind of multi-port radio frequency chip testing devices, it is characterized in that, further include signal input unit, the signal input unit is configured as including M signal output ports, to provide M radio frequency input signals to the input switch unit, M is natural number.

[0009] The utility model discloses a kind of multi-port radio frequency chip testing devices, it is characterized in that, the M radio frequency input signals can be configured as different types of radio frequency input signals.

[0010] The utility model discloses a kind of multi-port radio frequency chip testing devices, it is characterized in that, the control unit, power unit, input switch unit and output switch unit are configured as communication by IP protocol.

[0011] The utility model discloses a kind of multi-port radio frequency chip testing devices, it is characterized in that, further include signal output unit, the signal output unit is configured as the output signal of the output switch unit is stored, and according to the pin of chip to be measured, output signal is classified.

[0012] The utility model discloses a kind of multi-port radio frequency chip testing devices, it is characterized in that, the control unit provides multiple control drive voltages to input switch unit to control the conduction and turn-off of the output end of the single input multiple output radio frequency switch unit. BRIEF DESCRIPTION OF DRAWINGS

[0013] Figure 1 It is shown in the block diagram of chip testing device according to the embodiment of the utility model;

[0014] Figure 2 It is shown in the schematic diagram of chip testing device according to the embodiment of the utility model;And

[0015] Figure 3 It is shown in the schematic diagram of input switch unit according to the embodiment of the utility model. DETAILED DESCRIPTION

[0016] Before undertaking a detailed description of the present application, it can be advantageous to set forth definitions of certain words and phrases that have been used through this document. The term "coupled" along with its derivatives, refers to any direct or indirect communication between two or more elements, whether or not those elements are in physical contact with one another. The terms "transmit," "receive," and "communicate," along with their derivatives, encompass both direct and indirect communication. The term "include" and derivatives thereof, mean inclusion, without limitation. The term "or" is inclusive, meaning and / or. The phrase "associated with," as well as derivatives thereof, means to include, be included within, interconnect with, contain, be contained within, connect to or with, couple to or with, be communicable with, cooperate with, interleave, be proximate to, be bound to or with, have a property of, have relations with, or the like. The term "controller" means any device, system or part thereof that controls at least one operation. Such a controller can be implemented in hardware or any combination of hardware and software and / or firmware. The functionality associated with any particular controller can be centralized or distributed, whether locally or remotely. The phrase "at least one of," when used with a list of items, means that different combinations of one or more of the listed items can be used, and only one item from the list can be needed. For example, "at least one of A, B, and C" includes any of the following combinations: A, B, C, A and B, A and C, B and C, A and B and C.

[0017] Definitions for other certain words and phrases are provided throughout this document. Those of ordinary skill in the art will understand that in many, if not most instances, such definitions apply to prior and future uses of such defined words and phrases.

[0018] In this document, the application combination of circuit blocks and the division of sub-circuit blocks are for illustration only, and the application combination of circuit blocks and the division of sub-circuit blocks can have different modes without departing from the scope of the disclosure.

[0019] The following discussion of the Figures 1 to 3 The various embodiments used to describe the disclosure in the present document merely illustrate the principles of the disclosure. It should be understood by those skilled in the art that the principles of the disclosure can be implemented in any appropriate arrangement of systems or devices.

[0020] At present, when the chip is mass tested, a separate test port needs to be configured for each pin, so that the cost of the test instrument is increased. In order to solve the above problem, the test device with reconfigurable switch element is configured to reduce the number of test ports of the test instrument, thereby reducing the test cost, in addition, the test items are switched through the switch, which can greatly reduce the test time and improve the test efficiency.

[0021] Figure 1 is a schematic view showing a chip testing device according to the present application.

[0022] As shown in Figure 1 , the chip testing device according to the present application comprises: a power supply unit, a control unit, an input switch unit, and an output switch unit.

[0023] The power supply unit is configured to provide power supply voltage for components of the chip testing device.

[0024] The input switch unit is configured to receive input signals from a testing instrument and provide the signals to a chip under test.

[0025] The output switch unit is configured to receive output signals from the chip under test and provide the signals to a display device.

[0026] The control unit is configured to be connected with the power supply unit, the input switch unit, and the output switch unit, and to control the operation of the chip testing device by controlling the turn-on and turn-off of the input switch unit and the output switch unit.

[0027] The power supply unit comprises N voltage supply units to supply power to the chip testing device and the chip under test, and the power supply unit is configured to provide N power supply voltages. For example, a first voltage supply unit in the N voltage supply units is configured to be connected to the control unit and to provide a first power supply voltage to the control unit; a second voltage supply unit in the N voltage supply units is configured to be connected to the input switch unit and to provide a second power supply voltage to the input switch unit; and a third voltage supply unit in the N voltage supply units is configured to be connected to the output switch unit and to provide a third power supply voltage to the output switch unit.

[0028] The input switch unit is configured to be a single-input multiple-output radio frequency switch unit, wherein the input switch unit selects a turn-on path through the control unit, i.e., selects a pin under test of the chip under test through the control unit to provide the input signals provided by the testing instrument to the pin under test for testing of the chip. By introducing the single-input multiple-output radio frequency switch unit, the number of ports of the testing instrument can be effectively reduced, thereby saving the testing cost, and the switching of the circuit is performed through the switch unit, thereby saving the testing time and improving the testing efficiency.

[0029] According to the embodiment of the present application, the chip testing device further comprises a signal input unit configured to provide different input signals to the input switch unit according to different signal types. For example, the signal input unit is configured to comprise M output ports to provide M radio frequency input signals to the input switch unit. The input switch unit is configured to comprise M switch modules, each of which is configured as a single-input multiple-output radio frequency switch unit to receive the M radio frequency input signals from the signal input unit. The M radio frequency input signals can be configured as different types of radio frequency input signals.

[0030] The output switch unit is configured as a multiple-input single-output radio frequency switch unit, wherein the output switch unit selects a conduction path through the control unit, that is, selects different output pins of the chip under test through the control unit to provide the output signal representing the test result to the corresponding test instrument (for example, a display device).

[0031] According to the embodiment of the present application, the output switch unit and the input switch unit can be configured as a linkage switch unit, that is, the output switch unit performs a conduction operation according to the conduction condition of the input switch unit, so that when the related input pin of the chip under test is selected in the input switch unit, the corresponding output pin is selected in the output switch unit at the same time.

[0032] According to the embodiment of the present application, the control unit further comprises a memory configured to store the operation sequence for controlling the input switch unit and the output switch unit, for example, the memory is configured to store a truth table for controlling the input switch unit and the output switch unit to control the input switch unit and the output switch unit.

[0033] According to the embodiment of the present application, the chip testing device further comprises a signal output unit configured to store and classify the test results of the chip testing device to realize automatic testing and data acquisition. For example, the signal output unit is configured to comprise a memory configured to store the output signal of the output switch unit and classify the output signal according to the pins of the chip under test. When the value of the output signal is outside the threshold range, it is identified and an error prompt signal is output.

[0034] Figure 2 is a schematic view showing a chip testing device according to an embodiment of the present application.

[0035] As Figure 2As shown, the chip under test is a low noise amplifier (LNA) chip. The signal input unit is configured to provide three radio frequency input signals to the chip under test for different low noise amplifiers in the LNA chip. For example, the signal input unit is configured to provide first to third radio frequency input signals to the chip under test, wherein the first radio frequency input signal is provided to a first low noise amplifier in the LNA chip, the second radio frequency input signal is provided to a second low noise amplifier in the LNA chip, and the third radio frequency input signal is provided to a third low noise amplifier in the LNA chip. It should be understood by those skilled in the art that the above example is only for example, and is not used to limit the number of radio frequency input signals.

[0036] Reference Figure 2 The control unit, the power supply unit, the signal input unit, the input switch unit, the output switch unit and the test instrument can be configured to communicate through an IP protocol, for example, through a MIPI 2.0 protocol. According to an embodiment of the present application, the communication through the IP protocol can transmit a control signal from the test instrument to the control unit to control the test of the chip under test. According to an embodiment of the present application, the test operation can also be stored into the memory in the chip test device through the IP protocol. The control unit controls the output of the signal input unit according to the operation stored in the memory, turns on and off the input switch unit and the output switch unit to test the chip under test.

[0037] Figure 3 FIG. 4 is a schematic diagram showing an input switch unit according to an embodiment of the present application.

[0038] Reference Figure 3 FIG. 5 is a schematic diagram showing a digitally controlled single-input eight-output input switch unit, but those skilled in the art should understand that the input switch unit can be configured as a switch unit with other number of pins.

[0039] According to an embodiment of the present application, the control unit provides four control driving voltages (V4, V3, V2 and V1) to the input switch unit to control the turn-on and turn-off of the output pins of the input switch unit.

[0040] According to an embodiment of the present application, the switch structure of each output terminal of the input switch unit is configured to include a ground switch connected to a ground node through a matching resistor and an electrostatic discharge (ESD) module connected between the output terminal and the ground node, wherein the matching resistor is configured as a 50-ohm resistor to meet the requirements of radio frequency chip testing.

[0041] Table 1 is a chart showing a truth table of the input switch unit according to an embodiment of the present application.

[0042] Table 1

[0043]

[0044] According to the embodiments of the present application, the input switch unit additionally comprises a control signal LS to provide additional control redundancy to the input switch unit, and better isolation performance.

[0045] Although the present disclosure has been described with an example embodiment, various changes and modifications can be suggested to one skilled in the art. It is intended that the present disclosure encompass such changes and modifications as fall within the scope of the appended claims.

[0046] No description in the present application should be interpreted as implying any particular element, step or function is an essential element that must be included in the scope of the claims. The scope of the utility model subject is only limited by the claims.

Claims

1. A multi-port radio frequency chip testing apparatus, comprising: The power supply unit, the input switch unit, the output switch unit and the control unit are characterized in that: The power supply unit is configured to provide power supply voltage for components of the chip testing device; The input switch unit is configured to receive input signals and provide the input signals to corresponding input pins of the chip under test; The output switch unit is configured to receive output signals from output pins of the chip under test and output the output signals; The control unit is configured to be connected with the power supply unit, the input switch unit and the output switch unit, and to select different pins of the chip under test by controlling the turn-on and turn-off of the input switch unit and the output switch unit, The input switch unit is configured as a single-input multi-output radio frequency switch unit, the output terminals of the single-input multi-output radio frequency switch unit are respectively connected with the input pins of the chip under test, and the single-input multi-output radio frequency switch unit is selected to turn on the output terminals by the control unit.

2. The multi-port RF chip test apparatus of claim 1, wherein, The power supply unit is further configured to provide power supply voltage for the chip under test.

3. The multi-port RF chip test apparatus of claim 2, wherein, The power supply unit includes N voltage supply units to respectively provide power supply voltage for the input switch unit, the output switch unit, the control unit and the chip under test, N being a natural number.

4. The multi-port RF chip test apparatus of claim 1, wherein, The output switch unit is configured as a multi-input single-output radio frequency switch unit, the input terminals of the multi-input single-output radio frequency switch unit are respectively connected with the output pins of the chip under test, and the multi-input single-output radio frequency switch unit is selected to turn on the input terminals by the control unit.

5. The multi-port RF chip test apparatus of claim 4, wherein, The output switch unit and the input switch unit are configured as linked switch units.

6. The multi-port RF chip test apparatus of claim 1, wherein, Further comprising a signal input unit, The signal input unit is configured to include M signal output ports to provide M radio frequency input signals to the input switch unit, M being a natural number.

7. The multi-port RF chip test apparatus of claim 6, wherein, The M radio frequency input signals can be configured as different types of radio frequency input signals.

8. The multi-port RF chip test apparatus of claim 1, wherein, The control unit, the power supply unit, the input switch unit and the output switch unit are configured to communicate through an IP protocol.

9. The multi-port RF chip test apparatus of claim 1, wherein, Further comprising a signal output unit, the signal output unit is configured to store the output signals of the output switch unit and classify the output signals according to the pins of the chip under test.

10. The multi-port RF chip test apparatus of claim 1, wherein, The control unit provides a plurality of control driving voltages to the input switch unit to control the turn-on and turn-off of the output terminals of the single-input multi-output radio frequency switch unit.

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