LVDS (Low Voltage Differential Signaling) matching resistor disconnection fault detection circuit

Abstract

The utility model discloses an LVDS (Low Voltage Differential Signaling) matching resistor disconnection fault detection circuit, which comprises a test PCB (Printed Circuit Board), an FPC (Flexible Printed Circuit) board and a display, the test PCB comprises a connector, a resistor unit, an operational amplifier and an alarm, and the connector comprises a first test pin and a second test pin. The LVDS matching resistor disconnection fault detection circuit is compact in structure, convenient to detect, capable of detecting whether the matching resistor has a disconnection fault or not, and high in practicability.

Description

TECHNICAL FIELD

[0001] The utility model relates to a detection circuit, more exactly, it is a LVDS matching resistance open circuit fault detection circuit. BACKGROUND

[0002] In LVDS signal transmission, matching resistors are needed on FPC to ensure correct transmission of signals. However, due to reasons such as falling off or virtual welding in the manufacturing process, these matching resistors may appear open circuit, resulting in signal transmission failure. At present, there is a lack of an effective circuit and method to detect the open circuit fault of these matching resistors.

[0003] Chinese patent document CN111263138B discloses an LVDS digital video fault automatic detection system, which comprises a fault automatic detection module, the fault automatic detection module comprising a video synchronization module, a fault detection module, a main control module, a video generation module and a communication module; wherein one end of the communication module is connected to the main control module, and the other end is connected to a host computer or a microprocessor; the main control module is connected to the video generation module, the video synchronization module and the fault detection module; the video synchronization module is connected to the fault detection module; during internal testing, the communication module receives the fault detection instruction of the host computer or the microprocessor and sends it to the main control module; the main control module sends an enable signal to the video generation module to enable the video generation module to output parallel digital video to the LVDS sending module; the video synchronization module receives the parallel digital video and sends it to the fault detection module; during normal operation, the video synchronization module receives the parallel digital video input from the outside and sends it to the fault detection module; the LVDS sending module comprises a first LVDS crosspoint switch and an LVDS parallel-serial encoder; the LVDS parallel-serial encoder performs parallel-serial encoding on the parallel digital video output by the video generation module or the parallel digital video input from the outside after synchronization processing according to the enable signal of the main control module to obtain an LVDS serial data stream signal and outputs it to the first LVDS crosspoint switch; the first LVDS crosspoint switch copies the LVDS serial data stream signal at its input end according to the working mode configured by the main control module and outputs two identical LVDS signals, one of which is output to the second LVDS crosspoint switch of the LVDS receiving module; the LVDS receiving module comprises a second LVDS crosspoint switch and an LVDS serial-parallel decoder; the LVDS serial-parallel decoder decodes the LVDS serial data stream signal output by the second LVDS crosspoint switch according to the enable signal of the main control module to obtain parallel digital video and sends it to the fault automatic detection module.

[0004] The patent enhances the response capability of the digital video processing system to the LVDS digital video fault, and once the external input LVDS signal fails, the internal test working mode is automatically switched, and the fault information is transmitted to the upper computer or microprocessor for fault state recording. Content of the utility model

[0005] Therefore, it is necessary to provide an LVDS matching resistance open circuit fault detection circuit for the above technical problems, which comprises a test PCB, an FPC board and a display, the test PCB comprises a connector, a resistance unit, an operational amplifier and an alarm, the connector comprises a first test pin and a second test pin, the resistance unit comprises resistors R1, R2, R3, R4, R5, R6 and R7, the first test pin is connected with a system VCC through the resistors R2 and R1, and the first test pin is connected with a system ground through the resistor R3, the second test pin is connected with the system VCC through the resistors R6, R5 and R4, and the second test pin is connected with the system ground through the resistor R7, a first access point is arranged between the resistors R2 and R3, a second access point is arranged between the resistors R6 and R7, a third access point is arranged between the resistors R2 and R1, a fourth access point is arranged between the resistors R5 and R6, the fourth access point is connected with the system ground, the third access point is connected with a non-inverting input terminal of the operational amplifier, an inverting input terminal of the operational amplifier is connected with a voltage reduction IC, and an output terminal of the operational amplifier is connected with the alarm.

[0006] In order to solve the above technical problems, the utility model adopts the following technical scheme:

[0007] An LVDS matching resistance circuit breaker fault detection circuit, characterized in that the LVDS matching resistance circuit breaker fault detection circuit comprises a test PCB, an FPC board and a display, the test PCB comprises a connector, a resistance unit, an operational amplifier and an alarm, the connector comprises a first test pin and a second test pin, the resistance unit comprises resistors R1, R2, R3, R4, R5, R6 and R7, the first test pin is connected with a system VCC through the resistors R2 and R1, and the first test pin is connected with a system ground through the resistor R3, the second test pin is connected with the system VCC through the resistors R6, R5 and R4, and the second test pin is connected with the system ground through the resistor R7, a first access point is arranged between the resistors R2 and R3, a second access point is arranged between the resistors R6 and R7, a third access point is arranged between the resistors R2 and R1, a fourth access point is arranged between the resistors R5 and R6, the fourth access point is connected with the system ground, the third access point is connected with a non-inverting input terminal of the operational amplifier, an inverting input terminal of the operational amplifier is connected with a voltage reduction IC, and an output terminal of the operational amplifier is connected with the alarm.

[0008] As a preferred embodiment of the utility model, the first test pin and the second test pin are arranged adjacently.

[0009] As a preferred embodiment of the utility model, the alarm is an LED lamp bead.

[0010] As a preferred embodiment of the utility model, the LED lamp bead is red.

[0011] As a preferred embodiment of the utility model, the resistance values of the resistors R1, R2, R3, R4, R5, R6 and R7 are 45kΩ, 5kΩ, 50kΩ, 45kΩ, 2kΩ, 3kΩ and 50kΩ respectively.

[0012] As a preferred embodiment of the utility model, the operational amplifier is an LM741.

[0013] As a preferred embodiment of the utility model, the input voltage of the voltage reduction IC is 1.25V.

[0014] As a preferred embodiment of the utility model, the system VCC is 3.3V.

[0015] As a preferred embodiment of the utility model, the alarm is a loudspeaker.

[0016] As a preferred embodiment of the utility model, the loudspeaker is a language loudspeaker.

[0017] Compared with the prior art, the utility model have following beneficial effect:

[0018] The utility model provides a kind of LVDS matching resistance circuit-breaker fault detection circuit, and user inserts the golden finger of FPC board into connector, if it is normal state, the voltage of third access point C is 0.49V, less than the output voltage 1.25V of step-down IC U2, so the result of the output of operational amplifier is 0V, LED lamp bead is not lit, to judge LVDS line normal.If LVDS matching resistance falls off and other reasons circuit-breaker, the voltage of third access point C is 1.82V, greater than the output voltage 1.25V of step-down IC, so the result of the output of operational amplifier is high level 3.3V, LED lamp bead is lit alarm to judge LVDS matching resistance circuit-breaker abnormality.The LVDS matching resistance circuit-breaker fault detection circuit compact structure, detection is convenient, whether the matching resistance can be detected circuit-breaker fault, and practicality is strong.

[0019] In addition, the LED lamp bead can be red. Since the LED lamp bead is red, the user can be effectively reminded to make rapid judgment.

[0020] In addition, the alarm can be a loudspeaker. The loudspeaker is a language loudspeaker. When a circuit-breaker fault occurs, the loudspeaker can further effectively remind the user to make rapid judgment by language. BRIEF DESCRIPTION OF DRAWINGS

[0021] In order to more clearly illustrate the scheme in the utility model, the following will be a brief introduction to the drawings needed to be used in the embodiment description, and obviously, the drawings in the following description are some embodiments of the utility model, and for those skilled in the art, other drawings can also be obtained according to these drawings without creative labor.

[0022] Figure 1 It is a three-dimensional structure schematic view of the LVDS matching resistance circuit-breaker fault detection circuit of the utility model.

[0023] The mark in the drawing is as follows: 1, test PCB; 10, connector; 101, first test needle; 102, second test needle; 11, resistance unit; 12, step-down IC; 13, operational amplifier; 14, alarm; 2, FPC board; 3, display; A, first access point; B, second access point; C, third access point; D, fourth access point. DETAILED DESCRIPTION

[0024] In order to make the person skilled in the art better understand the technical scheme of the present application, the technical scheme in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by the person skilled in the art without creative labor should belong to the protection scope of the present application.

[0025] As described in the background, for LVDS, in LVDS signal transmission, matching resistors are needed on the FPC to ensure correct transmission of signals. However, due to falling off or virtual welding in the manufacturing process, etc., these matching resistors may be open-circuit, resulting in signal transmission failure. At present, there is a lack of an effective circuit and method to detect the open-circuit failure of these matching resistors.

[0026] In order to solve this technical problem, the present application provides a LVDS matching resistor open-circuit fault detection circuit, which comprises a test PCB1, an FPC board2 and a display3. The test PCB1 comprises a connector10, a resistor unit11, an operational amplifier13 and an alarm14, the connector10 comprises a first test pin101 and a second test pin102. The first test pin101 and the second test pin102 are arranged adjacent to each other. In addition, the resistor unit11 comprises resistors R1, R2, R3, R4, R5, R6 and R7, the first test pin101 is connected to the system VCC through the resistor R2 and the resistor R1, and the first test pin101 is connected to the system ground through the resistor R3, the second test pin102 is connected to the system VCC through the resistor R6, the resistor R5 and the resistor R4, and the second test pin102 is connected to the system ground through the resistor R7, a first access pointA is arranged between the resistor R2 and the resistor R3, a second access pointB is arranged between the resistor R6 and the resistor R7, a third access pointC is arranged between the resistor R2 and the resistor R1, a fourth access pointD is arranged between the resistor R5 and the resistor R6, and the fourth access pointD is connected to the system ground.

[0027] Through the above structural design, if the LVDS matching resistor is open-circuited due to falling off or other reasons, the voltage of the third access pointC is 1.82V, which is greater than the output voltage 1.25V of the voltage reduction IC U2, so the output result of the operational amplifier13 is high level 3.3V, the LED lamp bead is lit to alarm and the LVDS matching resistor open-circuit abnormality is judged.

[0028] In order to make the person skilled in the art better understand the technical scheme of the present application, the technical scheme in the embodiments of the present application will be described in detail below with reference to the drawings, so that the advantages and characteristics of the present application can be more easily understood by the person skilled in the art, and the protection scope of the present application can be more clearly defined.

[0029] It should be noted that the embodiments in the present application and the features and technical solutions in the embodiments can be combined with each other without conflict.

[0030] It should be noted that: similar reference numerals and letters represent similar items in the following drawings, so once an item is defined in one drawing, it does not need to be further defined and explained in the subsequent drawings.

[0031] As shown in the figure, the LVDS matching resistance circuit breaker fault detection circuit comprises a test PCB1, an FPC board 2 and a display 3. Figure 1

[0032] The test PCB1 comprises a connector 10, a resistance unit 11, an operational amplifier 13 and an alarm 14,

[0033] The connector 10 comprises a first test pin 101 and a second test pin 102. The first test pin 101 and the second test pin 102 are arranged adjacently.

[0034] In addition, the resistance unit 11 comprises a resistance R1, a resistance R2, a resistance R3, a resistance R4, a resistance R5, a resistance R6 and a resistance R7. The first test pin 101 is connected with a system VCC through the resistance R2 and the resistance R1, and the first test pin 101 is connected with a system ground through the resistance R3. The second test pin 102 is connected with the system VCC through the resistance R6, the resistance R5 and the resistance R4, and the second test pin 102 is connected with the system ground through the resistance R7. A first access point A is arranged between the resistance R2 and the resistance R3. A second access point B is arranged between the resistance R6 and the resistance R7. A third access point C is arranged between the resistance R2 and the resistance R1. A fourth access point D is arranged between the resistance R5 and the resistance R6. The fourth access point D is connected with the system ground,

[0035] The third access point C is connected with a non-inverting input end of the operational amplifier 13. An inverting input end of the operational amplifier 13 is connected with a voltage reduction IC 12. The system VCC is 3.3V.

[0036] It should be noted that an output end of the operational amplifier 13 is connected with the alarm 14.

[0037] The alarm 14 is an LED lamp bead.

[0038] ​In addition, the resistance values of the resistors R1, R2, R3, R4, R5, R6 and R7 are 45 Kohm, 5 Kohm, 50 Kohm, 45 Kohm, 2 Kohm, 3 Kohm and 50 Kohm respectively.

[0039] In addition, the operational amplifier 13 is LM741.

[0040] In addition, the input voltage of the voltage reduction IC 12 is 1.25 V.

[0041] The working mode of the embodiment is described below.

[0042] The user inserts the gold fingers of the FPC board 2 into the connector 10. If it is in normal state, according to the equivalent circuit diagram, the voltage at the point C is calculated as

[0043] Vc=VCC-[VCC÷[R1+R2+R3||(RL+R7||R6)]xR1]

[0044] =3.3V-[3.3V÷[45Kohm+5Kohm+50Kohm||(0.1Kohm+50Kohm||3Kohm)]x45Kohm]

[0045] =0.49V.

[0046] Therefore, the voltage at the third access point C is 0.49 V, which is less than the output voltage 1.25 V of the voltage reduction IC U2, so the output of the operational amplifier 13 is 0 V, and the LED lamp bead is not lighted, thereby judging that the LVDS line is normal.

[0047] If the LVDS matching resistor is disconnected due to other reasons, according to the equivalent circuit diagram, the voltage at the point C is calculated as

[0048] Vc=VCC÷[(R1+R2+R3)x(R2+R3)]

[0049] =3.3V÷[(45Kohm+5Kohm+50Kohm)x(5Kohm+50Kohm)]

[0050] =1.82V.

[0051] The voltage at the third access point C is 1.82 V, which is greater than the output voltage 1.25 V of the voltage reduction IC U2, so the output of the operational amplifier 13 is high level 3.3 V, and the LED lamp bead is lighted to alarm, thereby judging that the LVDS matching resistor is disconnected abnormally.

[0052] The LVDS matching resistor disconnection fault detection circuit has compact structure, convenient detection, can detect whether the matching resistor is disconnected, and has strong practicability.

[0053] The LVDS matching resistance open-circuit fault detection circuit provided in Embodiment 1 is further optimized, and specifically, the LED lamp bead is red.

[0054] The working mode of the embodiment is described below.

[0055] Since the LED lamp bead is red, the user can be effectively reminded to make a quick judgment.

[0056] The LVDS matching resistance open-circuit fault detection circuit provided in Embodiment 1 or 2 is further optimized, and specifically, the alarm 14 is a loudspeaker.

[0057] It should be noted that the loudspeaker is a language loudspeaker.

[0058] The working mode of the embodiment is described below.

[0059] When an open-circuit fault occurs, the loudspeaker reminds the user through language, which can further effectively remind the user to make a quick judgment.

[0060] The terms "coupling", "coupling" involved in the embodiments of the application should be understood broadly, for example, it can refer to physical direct connection, or indirect connection through electronic devices, such as connection through resistance, inductance, capacitance or other electronic devices.

[0061] In the utility model, unless another explicit provision and limitation, the terms "installation", "connection", "connection", "fixing" and other terms should be understood broadly, for example, it can be fixed connection, or detachable connection, or integrated; it can be mechanical connection, or electrical connection or communication with each other; it can be directly connected, or indirectly connected through intermediate medium, it can be the communication or interaction relationship between two elements, unless otherwise explicitly limited. For ordinary skilled in the art, the specific meaning of the above terms in the utility model can be understood according to the specific circumstances.

[0062] Obviously, the above-described embodiments are only some embodiments but not all the embodiments of the present application, the preferred embodiments of the present application are shown in the drawings, but do not limit the patent scope of the present application. The present application can be implemented in many different forms, and conversely, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive. Although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing specific embodiments, or make equivalent replacements to some technical features therein. Any equivalent structure made by using the content of the specification and drawings, directly or indirectly applied to other related technical fields, is also within the patent protection scope of the present application.

Claims

1. An LVDS matching resistor open fault detection circuit, characterized by, The LVDS matching resistance circuit breaker fault detection circuit contains a test PCB (1), an FPC board (2) and a display (3), the test PCB (1) contains a connector (10), a resistance unit (11), an operational amplifier (13) and an alarm (14), the connector (10) contains a first test pin (101) and a second test pin (102), the resistance unit (11) contains resistors R1, R2, R3, R4, R5, R6 and R7, the first test pin (101) is connected with system VCC through resistors R2 and R1, and the first test pin (101) is connected with system ground through resistor R3, the second test pin (102) is connected with system VCC through resistors R6, R5 and R4, and the second test pin (102) is connected with system ground through resistor R7, a first access point (A) is arranged between resistors R2 and R3, a second access point (B) is arranged between resistors R6 and R7, a third access point (C) is arranged between resistors R2 and R1, a fourth access point (D) is arranged between resistors R5 and R6, the fourth access point (D) is connected with system ground, the third access point (C) is connected with the non-inverting input terminal of the operational amplifier (13), the inverting input terminal of the operational amplifier (13) is connected with a voltage reduction IC (12), and the output terminal of the operational amplifier (13) is connected with the alarm (14).

2. The LVDS matched resistance de-assertion fault detection circuit of claim 1, wherein, The first test pin (101) and the second test pin (102) are arranged adjacently.

3. The LVDS matched resistance de-assertion fault detection circuit of claim 1, wherein, The alarm (14) is an LED lamp bead.

4. The LVDS matched resistance de-assertion fault detection circuit of claim 3, wherein, The LED lamp bead is red.

5. The LVDS matched resistance de-assertion fault detection circuit of claim 1, wherein, The resistance values of the resistors R1, R2, R3, R4, R5, R6 and R7 are 45 kΩ, 5 kΩ, 50 kΩ, 45 kΩ, 2 kΩ, 3 kΩ and 50 kΩ respectively.

6. The LVDS matched resistance de-assertion fault detection circuit of claim 1, wherein, The operational amplifier (13) is an LM741.

7. The LVDS matched resistance de-assertion fault detection circuit of claim 1, wherein, The input voltage of the voltage reduction IC (12) is 1.25 V.

8. The LVDS matched resistance de-assertion fault detection circuit of claim 1, wherein, The system VCC is 3.3 V.

9. The LVDS matched resistance de-assertion fault detection circuit of claim 1, wherein, The alarm (14) is a loudspeaker.

Images