Power unit bypass circuit and frequency converter

By designing a power unit bypass circuit, the problem that the power unit bypass control circuit cannot be shut down in time during overcurrent or short circuit in the existing technology is solved, and reliable protection of the bypass control circuit is achieved, avoiding device damage and ensuring the continuous operation of the frequency converter is guaranteed.

CN223680965UActive Publication Date: 2025-12-16SUZHOU INOVANCE TECH CO LTD
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Patent Information

Application Number
CN202423323606.7
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-12-30
Publication Date
2025-12-16
Estimated Expiration
2034-12-30

AI Technical Summary

Technical Problem

In the prior art, the power unit bypass control circuit cannot shut down in a timely and stable manner during overcurrent or short circuit, which leads to damage to the bypass board components and affects the continuous operation of the frequency converter.

Method used

A power unit bypass circuit was designed, including a bypass control circuit, a detection circuit, and a protection circuit. The bypass detection circuit samples the current of the contactor control circuit and generates a drive signal by combining it with the signal from the main control unit, thereby achieving reliable control of the bypass contactor coil and avoiding repeated shutdown under abnormal conditions.

Benefits of technology

When an overcurrent or short circuit occurs in the bypass contactor control circuit, it can provide timely protection, prevent repeated shutdowns, and ensure the stable operation of the frequency converter.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model discloses a bypass circuit of a power unit. The bypass circuit comprises a bypass control circuit, a bypass detection circuit and a bypass protection circuit, the bypass control circuit comprises a bypass driving circuit, a bypass contactor coil and a bypass switching circuit, the bypass contactor coil and the bypass switching circuit are connected in series to form a bypass contactor control loop, and the input end of the bypass driving circuit is used for receiving a first bypass driving signal; the output end of the bypass driving circuit is connected with the control end of the bypass switch circuit so as to control the on-off of the bypass switch circuit and further control the on-off of the bypass contactor control loop; the input end of the bypass detection circuit is connected with the bypass contactor control loop, the output end of the bypass detection circuit is connected with the input end of the bypass protection circuit, and the bypass detection circuit is used for sampling loop current of the bypass contactor control loop and outputting a sampling result to the bypass protection circuit; the input end of the bypass protection circuit is connected with the output end of the bypass detection circuit and the main control unit, and the output end of the bypass protection circuit is connected with the input end of the bypass driving circuit. The bypass protection circuit is used for generating a first bypass driving signal according to a sampling result transmitted by the bypass detection circuit and a second bypass driving signal transmitted by the main control unit; the power unit bypass circuit provided by the utility model can timely and reliably protect the bypass control circuit when overcurrent or short circuit occurs in the bypass contactor control loop.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of industrial control, in particular to a power unit bypass and frequency converter. BACKGROUND

[0002] The cascade type high-voltage frequency converter adopts the topology structure of power unit cascade, and the power unit is particularly important in the system. When the system is running, a certain power unit or several power units may fail, thereby causing the whole system to be unable to run normally and to be shut down. For some process application occasions, abnormal shutdown may cause great loss. Therefore, in order to improve the reliability and stability of the system, the high-voltage frequency converter generally realizes the continuous running of the whole machine by bypassing the output of the faulty power unit.

[0003] At present, the control of the power unit output bypass is generally realized by controlling the contactor coil to be attracted through the switching device on the single board in the unit, and then by detecting the bypass contactor coil state or by detecting the auxiliary contact of the bypass contactor to judge whether it is successful.

[0004] The current control mode of the unit bypass has the following disadvantages: when the bypass contactor coil is short-circuited, the bypass power supply wiring is connected reversely or other reasons cause the bypass control circuit to overcurrent, at this time, if the bypass command is issued again, the bypass control circuit cannot be turned off in time and stably when the circuit executes the bypass, causing the damage of the device on the bypass single board; once the device on the bypass single board is damaged, the power unit needs to be removed for maintenance, and the power unit is fixedly installed in the whole machine, which is inconvenient to disassemble and assemble, thereby greatly affecting the continuous running of the whole machine.

[0005] The prior art cannot turn off the bypass control circuit in time and stably when the bypass control circuit overflows or is short-circuited, causing the damage of the device on the bypass single board; therefore, a reliable scheme needs to be developed to solve the above problems. CONTENT OF THE UTILITY MODEL

[0006] The main purpose of the utility model is to provide a power unit bypass circuit and frequency converter, which aims to solve the problem that the bypass control circuit cannot be turned off in time and stably when the bypass control circuit overflows.

[0007] In order to achieve the above purpose, the present application provides the following technical scheme:

[0008] A power unit bypass circuit, the power unit bypass circuit comprises: a bypass control circuit, a bypass detection circuit and a bypass protection circuit.

[0009] The bypass control circuit comprises a bypass driving circuit, a bypass contactor coil and a bypass switch circuit, the bypass contactor coil and the bypass switch circuit are connected in series to form a bypass contactor control loop, an input end of the bypass driving circuit is configured to receive a first bypass driving signal, and an output end of the bypass driving circuit is connected to a control end of the bypass switch circuit to control on-off of the bypass switch circuit, thereby controlling opening and closing of the bypass contactor control loop.

[0010] An input end of the bypass detection circuit is connected to the bypass contactor control loop, and an output end of the bypass detection circuit is connected to an input end of the bypass protection circuit, the bypass detection circuit is configured to sample a loop current of the bypass contactor control loop and output a sampling result to the bypass protection circuit.

[0011] An input end of the bypass protection circuit is connected to an output end of the bypass detection circuit and a main control unit respectively, and an output end of the bypass protection circuit is connected to an input end of the bypass driving circuit, the bypass protection circuit is configured to generate the first bypass driving signal according to the sampling result transmitted by the bypass detection circuit and a second bypass driving signal transmitted by the main control unit.

[0012] Optionally, the bypass protection circuit comprises a logic gate circuit, an output end of the bypass detection circuit is connected to a first input end of the logic gate circuit, a second input end of the logic gate circuit is connected to an output end of the main control unit, and the logic gate circuit is configured to generate the first bypass driving signal according to the sampling result and the second bypass driving signal.

[0013] Optionally, the bypass protection circuit further comprises a delay circuit, an input end of the delay circuit is connected to an output end of the bypass detection circuit, and an output end of the delay circuit is connected to a first input end of the logic gate circuit; the delay circuit is configured to perform delay processing on an output signal of the bypass detection circuit.

[0014] Optionally, the delay circuit comprises a first diode D1, a first capacitor C1 and a first resistor R1, an anode end of the first diode D1 is connected to an output end of the bypass detection circuit, a cathode end of the first diode D1 is connected to an output end of the delay circuit, a first end of the first capacitor C1 and the first resistor R1 connected in parallel is connected to the cathode end of the first diode D1, and a second end of the first capacitor C1 and the first resistor R1 connected in parallel is connected to a first signal ground GND.

[0015] Optionally, the bypass protection circuit further comprises a first isolation circuit, an input end of the first isolation circuit 303 is connected with an output end of the bypass detection circuit, and an output end of the first isolation circuit 303 is connected with an input end of the delay circuit.

[0016] Optionally, the bypass protection circuit further comprises a first comparison circuit, the first comparison circuit is a hysteresis comparison circuit, an input end of the first comparison circuit is connected with an output end of the delay circuit, and an output end of the first comparison circuit is connected with an input end of the logic gate circuit.

[0017] Optionally, the first comparison circuit comprises a first comparator U1, a second resistor R2, a third resistor R3, a fourth resistor R4 and a fifth resistor R5, a first end of the second resistor R2, a first end of the third resistor R3 and a first end of the fourth resistor R4 have a common connection point, the common connection point is connected with a first input end of the first comparator U1, a second end of the second resistor R2 is connected with a first power supply VDD1, a second end of the third resistor R3 is connected with a first signal ground GND, a second end of the fourth resistor R4 is connected with an output end of the first comparator U1, a first end of the fifth resistor R5 is connected with the output end of the first comparator U1, and a second end of the fifth resistor R5 is connected with a second power supply VDD2.

[0018] Optionally, the logic gate circuit is an "or" logic gate circuit.

[0019] Optionally, the bypass detection circuit comprises a current sampling circuit and a second comparison circuit, the current sampling circuit samples a loop current of the bypass contactor control loop, an output end of the current sampling circuit is connected with an input end of the second comparison circuit, and an output end of the second comparison circuit is connected with an input end of the bypass protection circuit 30; the second comparison circuit is used for outputting a sampling result, and the sampling result is used for representing whether the loop current of the bypass contactor control loop is overcurrent.

[0020] Optionally, the current sampling circuit comprises a sixth resistor R6 and a second capacitor C2, one end of the sixth resistor R6 is connected with an output end of the bypass switch circuit, the other end is connected with a second signal ground AGND, and the second capacitor C2 is connected with the sixth resistor R6 in parallel.

[0021] Optionally, the second comparison circuit comprises a second comparator U2, a reference power supply circuit, a seventh resistor R7 and an eighth resistor R8; an output end of the reference power supply circuit is connected with a first input end of the second comparison circuit 202, a first end of the seventh resistor R7 is connected with an output end of the current sampling unit, a second end of the seventh resistor R7 is connected with a second input end of the second comparison circuit, a first end of the eighth resistor R8 is connected with the second input end of the second comparison circuit, and a second end of the eighth resistor R8 is connected with the second signal ground AGND.

[0022] Optionally, the bypass driving circuit further comprises a second isolation circuit, an input end of the second isolation circuit is connected with an output end of the logic gate circuit, and an output end of the second isolation circuit is connected with a control end of the bypass switch circuit, so that the second isolation circuit is used for controlling the bypass switch circuit to be turned on or turned off after the first bypass driving signal is isolated.

[0023] Optionally, the second isolation circuit comprises a second isolation optocoupler OP2, an original side input end of the second isolation optocoupler OP2 is connected with the output end of the logic gate circuit, and a secondary side output end of the second isolation optocoupler OP2 is connected with the control end of the bypass control circuit.

[0024] Optionally, the bypass switch circuit comprises a bypass control switch Q1, a control end of the bypass control switch Q1 is connected with an output end of the driving circuit, an input end of the bypass control switch Q1 is connected with the bypass contactor coil, and an output end of the bypass control switch Q1 is connected with an input end of the bypass detection circuit.

[0025] The utility model also provides a frequency converter, the frequency converter includes the power unit bypass circuit as described above.

[0026] The utility model has at least the following technical benefits:

[0027] The power unit bypass circuit provided by the utility model generates the first bypass driving signal to drive the control of the attraction or disconnection of the bypass contactor coil according to the second bypass driving signal from the driving unit and the sampling result of the sampling bypass contactor control loop of the bypass detection circuit, compared with the prior art power unit bypass circuit, the power unit bypass circuit provided by the utility model can protect the bypass control circuit in time and reliably when overcurrent or short circuit occurs in the bypass contactor control loop. BRIEF DESCRIPTION OF DRAWINGS

[0028] Figure 1 The structure block diagram of the power unit bypass circuit provided by the utility model is shown in the figure;

[0029] Figure 2Another structural block diagram of the power unit bypass circuit provided in the embodiments of this application;

[0030] Figure 3 A schematic diagram of the power unit bypass circuit provided in the embodiments of this application;

[0031] Figure 4 Another circuit diagram of the power unit bypass circuit provided in the embodiments of this application. Detailed Implementation

[0032] To make the objectives, technical solutions, and advantages of this application clearer, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0033] It should be understood that the specific embodiments described herein are merely illustrative of this application and are not intended to limit this application.

[0034] In this application, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that an apparatus or system comprising a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such an apparatus or system. Without further limitation, an element defined by the phrase "comprising..." does not exclude the presence of other identical elements in the apparatus or system that includes that element.

[0035] like Figures 1-4 As shown, it illustrates a circuit structure block diagram and circuit principle schematic diagram of a power unit bypass circuit provided in an embodiment of this application. The power unit bypass circuit includes: a bypass control circuit 10, a bypass detection circuit 20, and a bypass protection circuit 30.

[0036] The bypass control circuit includes a bypass drive circuit 101, a bypass contactor coil L, and a bypass switch circuit. The bypass contactor coil L and the bypass switch circuit are connected in series to form a bypass contactor control loop 102. The input terminal of the bypass drive circuit 101 is used to receive the first bypass drive signal BPRQ1. The output terminal of the bypass drive circuit 101 is connected to the control terminal of the bypass switch circuit to control the on / off state of the bypass switch circuit, thereby controlling the opening and closing of the bypass contactor control loop 102. A second diode D2 is also connected in parallel across the two ends of the bypass contactor coil L. The second diode D2 provides a discharge circuit for the bypass contactor coil L.

[0037] The input end of the bypass detection circuit 20 is connected with the bypass contactor control circuit 102, and the output end of the bypass detection circuit 20 is connected with the input end of the bypass protection circuit 30, and the bypass detection circuit 20 is used for sampling the loop current of the bypass contactor control circuit 102 and outputting the sampling result to the bypass protection circuit 30.

[0038] The input end of the bypass protection circuit 30 is connected with the output end of the bypass detection circuit and the main control unit 40 respectively, and the output end of the bypass protection circuit 30 is connected with the input end of the bypass drive circuit 101, and the bypass protection circuit 30 is used for generating the first bypass drive signal BPRQ1 according to the sampling result transmitted by the bypass detection circuit 20 and the second bypass drive signal BPRQ2 transmitted by the main control unit 40.

[0039] The power unit bypass circuit provided by the embodiment of the present application can control whether the power unit executes bypass by controlling the attraction or disconnection of the bypass contactor coil L. Optionally, the bypass contactor coil L, the bypass switch circuit and the power supply VCC_BP form the bypass contactor control circuit, and only the opening and closing of the bypass switch circuit need to be controlled to control the attraction or disconnection of the bypass contactor coil L to realize the control of whether the power unit executes bypass. The bypass detection circuit 20 samples the loop current of the bypass contactor control circuit 102 and outputs the sampling result. The sampling result can represent that the loop of the bypass contactor control circuit 102 is abnormal, such as overcurrent or short circuit. The bypass detection circuit 20 can sample the current of the loop of the bypass contactor control circuit 102 by using resistance sampling, a Hall sensor or other current sensing devices, which is not limited herein. The main control unit 40 is a control unit of the power unit bypass circuit, and the main control unit 40 can be a programmable logic processing chip such as an MCU. The main control unit 40 can output the second bypass drive signal BPRQ2. The bypass protection circuit 30 generates the first bypass drive signal BPRQ1 according to the second bypass drive signal BPRQ2 and the sampling result of the bypass detection circuit 20 to drive and control the attraction or disconnection of the bypass contactor coil L. The bypass protection circuit 30 is a pure hardware control and does not need software judgment. When the loop of the bypass contactor control circuit 102 is abnormal, the bypass switch circuit can be turned off more quickly.

[0040] The prior art cannot turn off the bypass control circuit in time and stably when overcurrent or short circuit occurs in the bypass control circuit, causing the damage of the switching device on the bypass board. The power unit bypass circuit provided by the embodiment of the present application can generate the first bypass drive signal BPRQ1 according to the second bypass drive signal BPRQ2 and the sampling result of the bypass detection circuit 20 to drive and control the attraction or disconnection of the bypass contactor coil L, and can protect the bypass control circuit in time and reliably when overcurrent or short circuit occurs in the loop of the bypass contactor control circuit 102.

[0041] Optionally, the bypass protection circuit 30 comprises a logic gate circuit 301, the output end of the bypass detection circuit 20 is connected with the first input end of the logic gate circuit 301, the second input end of the logic gate circuit 301 is connected with the output end of the main control unit 40, and the logic gate circuit 301 is used for generating the first bypass driving signal BPRQ1 according to the sampling result and the second bypass driving signal BPRQ2.

[0042] The logic gate circuit 301 can be a commonly used logic chip, and the logic gate type of the logic gate circuit 301 can be an “or” logic gate circuit, an “or not” logic gate circuit, an “and” logic gate, etc., which can be selected according to the specific bypass driving circuit 101.

[0043] Optionally, the logic gate circuit 301 is an “or” logic gate circuit.

[0044] As an embodiment of the present application, the logic gate circuit 301 can be an “or” logic gate circuit, and as long as one of the output end of the bypass detection circuit 20 and the output end of the main control unit 40 outputs a high-level signal, the output signal (the first bypass driving signal BPRQ1) of the output end of the logic gate circuit 301 is a high-level signal.

[0045] Optionally, the bypass protection circuit 30 further comprises a delay circuit 302, the input end of the delay circuit 302 is connected with the output end of the bypass detection circuit 20, and the output end of the delay circuit is connected with the first input end of the logic gate circuit 40; the delay circuit 302 performs delay processing on the output signal of the bypass detection circuit 20.

[0046] Since the bypass detection circuit 20 samples the loop current of the bypass contactor control loop 102, when overcurrent or short circuit occurs in the control loop 102, the output signal of the bypass detection circuit 20 is an overcurrent signal, and the bypass protection circuit 30 outputs the first bypass driving signal BPRQ1 to timely turn off the bypass switch circuit so that the loop current of the control loop 102 returns to normal, at this time, the output signal of the bypass detection circuit 20 also returns to a normal signal, and the first bypass driving signal BPRQ1 output by the bypass protection circuit 30 immediately turns on the bypass switch circuit so that the bypass contactor control loop 102 is turned on, which leads to repeated turn-off and turn-on of the bypass contactor control loop 102. When overcurrent or short circuit occurs in the bypass contactor control loop 102, it indicates that the bypass contactor control loop 102 has an abnormality, such as wiring error, device failure, etc., and before the abnormality is eliminated, repeated turn-off and turn-on of the bypass contactor control loop 102 may cause the circuit board to burn out; the delay circuit 302 is used for delaying the time of next turn-on of the bypass contactor control loop 102 after the abnormality protection, so as to avoid repeated turn-on and turn-off of the bypass contactor control loop 102.

[0047] Optionally, the delay circuit 302 comprises a first diode D1, a first capacitor C1 and a first resistor R1, an anode of the first diode D1 is connected to the output of the bypass detection circuit, a cathode of the first diode D1 is connected to the output of the delay circuit 302, the first capacitor C1 and the first resistor R1 are connected in parallel, and a first end of the first capacitor C1 and the first resistor R1 is connected to the cathode of the first diode D1, and a second end of the first capacitor C1 and the first resistor R1 is connected to the first signal ground GND.

[0048] In some embodiments provided in the present application, the delay circuit 302 is a delay circuit composed of the first diode D1, the first capacitor C1 and the first resistor R1, and the change of the voltage level at the output of the delay circuit 302 is realized by adjusting the charging and discharging time of the first capacitor C1, for example, when the voltage at the input of the delay circuit 302 is high, the voltage at the output of the delay circuit 302 is also high due to the fast charging speed, and when the voltage at the input of the delay circuit 302 changes from high to low, the voltage at the output of the delay circuit 302 will not immediately change to low due to the discharging of the first capacitor C1 through the first resistor R1, and the delay time can be adjusted by setting the resistance value of the first resistor R1.

[0049] Optionally, the bypass protection circuit 30 further comprises a first isolation circuit 303, an input of the first isolation circuit 303 is connected to the output of the bypass detection circuit 20, and an output of the first isolation circuit 303 is connected to the input of the delay circuit.

[0050] Since the signal ground at the output of the bypass detection circuit 20 and the signal ground at the output of the bypass protection circuit 30 are not the same, the first isolation circuit 303 is needed to isolate the signals, and the first isolation circuit 303 can be a common optical coupling circuit for isolation; optionally, the first isolation circuit 303 comprises a first isolation optical coupling OP1, an original side input of the first isolation optical coupling OP1 is connected to the output of the bypass detection circuit 20 through an eleventh resistor R11, an original side output of the first isolation optical coupling OP1 is connected to a second signal ground AGND, a secondary side first end of the first isolation optical coupling OP1 is connected to a power supply VDD2, a secondary side second end of the first isolation optical coupling OP1 is connected to the input of the delay circuit 302, and a third capacitor C3 is connected in parallel between the original side input and the original side output of the first isolation optical coupling OP1, and the third capacitor C3 can filter out interference signals for the original side input of the first isolation optical coupling OP1; the secondary side second end of the first isolation optical coupling OP1 is further connected to the first signal ground GND through a twelfth resistor R12, and the twelfth resistor R12 can provide current limiting protection for the secondary side of the first isolation optical coupling OP1.

[0051] Optionally, the bypass protection circuit 30 further comprises a first comparison circuit 304, the first comparison circuit 304 being a hysteresis comparison circuit; an input end of the first comparison circuit 304 is connected with an output end of the delay circuit 302, and an output end of the first comparison circuit 304 is connected with an input end of the logic gate circuit 40.

[0052] Optionally, the first comparison circuit comprises a first comparator U1, a second resistor R2, a third resistor R3, a fourth resistor R4 and a fifth resistor R5; a first end of the second resistor R2, a first end of the third resistor R3 and a first end of the fourth resistor R4 have a common connection point, the common connection point is connected with a first input end of the first comparator U1, a second end of the second resistor R2 is connected with a first power supply VDD1, a second end of the third resistor R3 is connected with a first signal ground GND, a second end of the fourth resistor R4 is connected with an output end of the first comparator U1, a first end of the fifth resistor R5 is connected with the output end of the first comparator U1, and a second end of the fifth resistor R5 is connected with a second power supply VDD2.

[0053] Since there may be fluctuations in the output end level of the delay circuit 302, adding a hysteresis comparison circuit at the output end of the delay circuit 302 can make the input signal to the input end of the logic gate circuit 40 more stable; the circuit principle of the hysteresis comparison circuit is a well-known technology in the industry, which will not be described here.

[0054] Optionally, the bypass detection circuit 20 comprises a current sampling circuit 201 and a second comparison circuit 202; the current sampling circuit 201 samples the loop current of the bypass contactor control loop 102, an output end of the current sampling circuit is connected with an input end of the second comparison circuit, and an output end of the second comparison circuit is connected with an input end of the bypass protection circuit 30; the second comparison circuit is used for outputting a sampling result, and the sampling result is used for representing whether the loop current of the bypass contactor control loop is overcurrent.

[0055] The current sampling circuit 201 samples the loop current of the bypass contactor control loop 102, converts the loop current signal into a voltage signal and outputs the voltage signal to the second comparison circuit 202, and the second comparison circuit 202 outputs a sampling result according to the voltage signal; the current sampling circuit 201 can adopt current sampling, Hall sensor sampling or other current-to-voltage sensor devices, and the second comparison circuit 202 can adopt a common comparison circuit composed of an operational amplifier or a comparator chip.

[0056] Optionally, the current sampling circuit 201 comprises a sixth resistor R6 and a second capacitor C2, one end of the sixth resistor R6 is connected with an output end of the bypass switch circuit, the other end is connected with a second signal ground AGND, and the second capacitor C2 is connected in parallel with the sixth resistor R6.

[0057] The current in the bypass contactor control loop 102 can be detected by connecting the sixth resistor R6 in series to the loop, and the second capacitor C2 can filter some interference noise, improve the sampling accuracy of the current sampling circuit 201, and prevent false fault judgment.

[0058] Optionally, the second comparison circuit 202 comprises a second comparator U2, a reference power supply circuit, a seventh resistor R7, and an eighth resistor R8; an output end of the reference power supply circuit is connected with a first input end of the second comparison circuit U2, a first end of the seventh resistor R7 is connected with an output end of the current sampling unit, a second end of the seventh resistor R7 is connected with a second input end of the second comparison circuit 202, a first end of the eighth resistor R8 is connected with the second input end of the second comparison circuit U2, and a second end of the eighth resistor R8 is connected with a second signal ground AGND.

[0059] The reference power supply circuit can be composed of a ninth resistor R9 and a tenth resistor R10, or can be composed of other voltage stabilizing power supplies, and the voltage value of the reference power supply circuit can be set according to requirements; the reference power supply circuit provides a comparison reference voltage for the second comparison circuit 202, when the current sampled by the current sampling circuit 201 is normal, the voltage at the second input end of the second comparison circuit 202 is lower than the comparison reference voltage, and the output end of the second comparison circuit 202 outputs a low-level signal, when overcurrent or short circuit occurs in the bypass contactor control loop 102, the output voltage of the current sampling circuit 201 rises to exceed the comparison reference voltage, and the output end of the second comparison circuit 202 outputs a high-level signal.

[0060] Optionally, the bypass driving circuit 101 further comprises a second isolation circuit, an input end of the second isolation circuit is connected with an output end of the logic gate circuit 40, and an output end of the second isolation circuit is connected with a control end of the bypass switch circuit, and the second isolation circuit is used for controlling the turn-on and turn-off of the bypass switch circuit after isolating the first bypass driving signal BPRQ1.

[0061] Since the reference ground of the signal at the input end and the output end of the bypass driving circuit 101 is different, a signal isolation circuit is needed, and the second isolation circuit can be an optical coupling device.

[0062] Optionally, the second isolation circuit comprises a second isolation optical coupling OP2, a primary input end of the second isolation optical coupling OP2 is connected with an output end of the logic gate circuit 40, and a secondary output end of the second isolation optical coupling OP2 is connected with a control end of the bypass control switch Q1.

[0063] In some embodiments provided in the application, the first end of the primary side of the second isolation optocoupler OP2 is pulled up to the power supply VDD1 through the thirteenth resistor R13, the second end of the primary side of the second isolation optocoupler OP2 is connected to the output end of the logic gate circuit 40, and the input end of the primary side of the second isolation optocoupler OP2 further comprises a fourteenth resistor R14, a fifteenth resistor R15, a fourth capacitor C4 and a fifth capacitor C5, wherein the first end of the fourteenth resistor R14 is connected to the power supply VDD1, the second end of the fourteenth resistor R14 is connected to the second end of the primary side of the second isolation optocoupler OP2, the first end of the fourth capacitor C4 is connected to the second end of the primary side of the second isolation optocoupler OP2, and the second end of the fourth capacitor C4 is connected to the first signal GND; the fifteenth resistor R15 and the fourth capacitor C4 are connected in parallel between the first end and the second end of the primary side of the second isolation optocoupler OP2; the thirteenth resistor R13 is a current limiting resistor of the primary side of the second isolation optocoupler OP2; the fifteenth resistor R15 and the fourth capacitor C4 provide filtering for the primary side of the second isolation optocoupler OP2; the fourteenth resistor R14 is used for inputting a signal to the primary side of the second isolation optocoupler OP2 to improve the stability of the input signal; and the fourth capacitor C4 is used for filtering the input signal of the primary side of the second isolation optocoupler OP2; the secondary side of the second isolation optocoupler OP2 can comprise a sixteenth resistor R16, a seventeenth resistor R17, an eighteenth resistor R18 and a sixth capacitor C6; the first end of the sixteenth resistor R16 is connected to the power supply VCC1, and the second end of the sixteenth resistor R16 is connected to the first end of the secondary side of the second isolation optocoupler OP2; the sixteenth resistor R16 is used for pulling up the secondary side of the second isolation optocoupler OP2 to the power supply; the first end of the seventeenth resistor R17 is connected to the second end of the secondary side of the second isolation optocoupler OP2, the second end of the seventeenth resistor R17 is connected to the control end of the bypass control circuit, the first end of the eighteenth resistor R18 is connected to the second end of the seventeenth resistor R17, the second end of the eighteenth resistor R18 is connected to the output end of the bypass control circuit, and the seventeenth resistor R17 and the eighteenth resistor R18 provide driving voltage for the bypass control circuit; and the sixth capacitor C6 is connected in parallel between the first end and the second end of the secondary side of the second isolation optocoupler OP2 to provide filtering for the output of the secondary side of the second isolation optocoupler OP2.

[0064] Optionally, the bypass switch circuit comprises a bypass control switch Q1, the control end of the bypass control switch Q1 is connected to the output end of the driving circuit 101, the input end of the bypass control switch Q1 is connected to the bypass contactor coil, and the output end of the bypass control switch Q1 is connected to the input end of the bypass detection circuit.

[0065] The bypass control switch Q1 can be an electronic switch tube such as MOSFET or IGBT.

[0066] Optionally, the application further provides a frequency converter, which comprises the power unit bypass circuit as described above.

[0067] The frequency converter can include a plurality of power units, and each power unit can be provided with a power unit bypass circuit. When a certain power unit fails, the power unit bypass circuit provided on the power unit can bypass the failed power unit from the frequency converter (i.e., disconnect the connection relationship between the output end of the failed power unit and the frequency converter). The power unit bypass circuit provided in the application can reliably protect the bypass control circuit in time when abnormal phenomena such as overcurrent or short circuit occur in the bypass control circuit during bypass, avoid damage to the bypass control circuit device, and ensure the continuous and reliable operation of the frequency converter.

[0068] The above is only part of the embodiments of the application, and does not limit the patent scope of the application. Any equivalent structural transformation made by using the content of the specification and drawings, or direct / indirect application in other related technical fields under the technical concept of the application is included in the patent protection scope of the application.

Claims

1. A power cell bypass circuit, characterized by, The power unit bypass circuit comprises a bypass control circuit, a bypass detection circuit and a bypass protection circuit. The bypass control circuit comprises a bypass driving circuit, a bypass contactor coil and a bypass switch circuit, the bypass contactor coil and the bypass switch circuit are connected in series to form a bypass contactor control loop, an input end of the bypass driving circuit is configured to receive a first bypass driving signal, and an output end of the bypass driving circuit is connected to a control end of the bypass switch circuit to control on-off of the bypass switch circuit, thereby controlling opening and closing of the bypass contactor control loop. An input end of the bypass detection circuit is connected to the bypass contactor control loop, and an output end of the bypass detection circuit is connected to an input end of the bypass protection circuit, the bypass detection circuit is configured to sample loop current of the bypass contactor control loop and output a sampling result to the bypass protection circuit. An input end of the bypass protection circuit is connected to an output end of the bypass detection circuit and a main control unit respectively, and an output end of the bypass protection circuit is connected to an input end of the bypass driving circuit, the bypass protection circuit is configured to generate the first bypass driving signal according to the sampling result transmitted by the bypass detection circuit and a second bypass driving signal transmitted by the main control unit.

2. The power cell bypass circuit of claim 1, wherein, The bypass protection circuit comprises a logic gate circuit, an output end of the bypass detection circuit is connected to a first input end of the logic gate circuit, a second input end of the logic gate circuit is connected to an output end of the main control unit, and the logic gate circuit is configured to generate the first bypass driving signal according to the sampling result and the second bypass driving signal.

3. The power cell bypass circuit of claim 2, wherein, The bypass protection circuit further comprises a delay circuit, an input end of the delay circuit is connected to an output end of the bypass detection circuit, and an output end of the delay circuit is connected to a first input end of the logic gate circuit; the delay circuit is configured to delay an output signal of the bypass detection circuit.

4. The power cell bypass circuit of claim 3, wherein, The delay circuit comprises a first diode D1, a first capacitor C1 and a first resistor R1, an anode end of the first diode D1 is connected to an output end of the bypass detection circuit, a cathode end of the first diode D1 is connected to an output end of the delay circuit, a first end of the first capacitor C1 and the first resistor R1 connected in parallel is connected to the cathode end of the first diode D1, and a second end of the first capacitor C1 and the first resistor R1 connected in parallel is connected to a first signal ground GND.

5. The power cell bypass circuit of claim 3, wherein, The bypass protection circuit further comprises a first isolation circuit, an input end of the first isolation circuit is connected to an output end of the bypass detection circuit, and an output end of the first isolation circuit is connected to an input end of the delay circuit.

6. The power cell bypass circuit of claim 3, wherein, The bypass protection circuit further comprises a first comparison circuit, the first comparison circuit is a hysteresis comparison circuit, an input end of the first comparison circuit is connected to an output end of the delay circuit, and an output end of the first comparison circuit is connected to an input end of the logic gate circuit.

7. The power cell bypass circuit of claim 6, wherein, The first comparison circuit comprises a first comparator U1, a second resistor R2, a third resistor R3, a fourth resistor R4 and a fifth resistor R5; a first end of the second resistor R2, a first end of the third resistor R3 and a first end of the fourth resistor R4 have a common connection point, the common connection point is connected with a first input end of the first comparator U1, a second end of the second resistor R2 is connected with a first power supply VDD1, a second end of the third resistor R3 is connected with a first signal ground GND, a second end of the fourth resistor R4 is connected with an output end of the first comparator U1, a first end of the fifth resistor R5 is connected with the output end of the first comparator U1, and a second end of the fifth resistor R5 is connected with a second power supply VDD2.

8. The power cell bypass circuit of claim 2, wherein, The logic gate circuit is an "or" logic gate circuit.

9. The power cell bypass circuit of claim 8, wherein, The bypass detection circuit 20 comprises a current sampling circuit and a second comparison circuit; the current sampling circuit samples a loop current of the bypass contactor control loop, an output end of the current sampling circuit is connected with an input end of the second comparison circuit, and an output end of the second comparison circuit is connected with an input end of the bypass protection circuit; the second comparison circuit is used for outputting a sampling result, and the sampling result is used for representing whether the loop current of the bypass contactor control loop is overcurrent.

10. The power cell bypass circuit of claim 9, wherein, The current sampling circuit comprises a sixth resistor R6 and a second capacitor C2; one end of the sixth resistor R6 is connected with an output end of the bypass switch circuit, and the other end is connected with a second signal ground AGND; and the second capacitor C2 is connected with the sixth resistor R6 in parallel.

11. The power cell bypass circuit of claim 10, wherein, The second comparison circuit comprises a second comparator U2, a reference power supply circuit, a seventh resistor R7 and an eighth resistor R8; an output end of the reference power supply circuit is connected with a first input end of the second comparison circuit, a first end of the seventh resistor R7 is connected with an output end of the current sampling unit, a second end of the seventh resistor R7 is connected with a second input end of the second comparison circuit, a first end of the eighth resistor R8 is connected with the second input end of the second comparison circuit, and a second end of the eighth resistor R8 is connected with the second signal ground AGND.

12. The power cell bypass circuit of claim 2, wherein, The bypass drive circuit further comprises a second isolation circuit, an input end of the second isolation circuit is connected with an output end of the logic gate circuit, an output end of the second isolation circuit is connected with a control end of the bypass switch circuit, and the second isolation circuit is used for controlling the bypass switch circuit to be turned on and turned off after the first bypass drive signal is isolated.

13. The power cell bypass circuit of claim 12, wherein, The second isolation circuit comprises a second isolation optocoupler OP2, a primary input end of the second isolation optocoupler OP2 is connected with an output end of the logic gate circuit, and a secondary output end of the second isolation optocoupler OP2 is connected with a control end of the bypass control circuit.

14. The power cell bypass circuit of claim 1, wherein, The bypass switch circuit comprises a bypass control switch Q1, a control end of the bypass control switch Q1 being connected with an output end of the driving circuit, an input end of the bypass control switch Q1 being connected with the bypass contactor coil, and an output end of the bypass control switch Q1 being connected with an input end of the bypass detection circuit.

15. A frequency converter, characterized in that The frequency converter comprises the power unit bypass circuit according to any one of claims 1-14.