PCB (Printed Circuit Board) structure with non-plated-through hole for improving impedance of surface-mounted bonding pad

Abstract

The utility model provides a PCB structure with non-metallized holes for improving impedance of a surface-mounted bonding pad, the surface of a PCB board is provided with the surface-mounted bonding pad, one end of the surface-mounted bonding pad is used for connecting a transmission line, and a plurality of non-metallized holes are drilled in the PCB board below one end of the surface-mounted bonding pad opposite to the end connected with the transmission line. And the non-metallized hole is drilled from the bottom surface of the PCB to the wiring layer where the surface-mounted bonding pad is located. According to the utility model, the relative dielectric constant of the non-metallized hole area can be reduced to 1 at 1GHz, so that the equivalent relative dielectric constant of the dielectric layer below the surface-mounted bonding pad is reduced. And on the other hand, the reference ground plane of the surface-mounted bonding pad is hollowed in the non-plated-through hole area, so that the distance between the surface-mounted bonding pad and the reference ground is correspondingly increased. Therefore, the impedance of the stub position of the surface-mounted bonding pad can be effectively improved. Moreover, the non-plated-through hole structure is obtained through a back drilling technology, the back drilling technology is stable and mature, the PCB is easy to process, and the processing cost of the PCB is hardly increased.

Description

TECHNICAL FIELD

[0001] The utility model relates to a kind of PCB structure of non-metalized hole for improving surface mount pad impedance. BACKGROUND

[0002] With the improvement of signal rate, the system is also more and more strict to signal integrity, and the signal reflection caused by impedance discontinuity is particularly serious, which can cause signal overshoot, ringing and back hook phenomenon. The PCIE connector, IO side high-speed pluggable connector is generally in the form of surface mount pad. Considering the reliability of welding, the surface mount pad is generally designed to be wide, and the pad length is long, which can easily cause the pad impedance to be much lower than the impedance of the transmission line and other positions of the channel, resulting in impedance discontinuity, and thus causing serious channel reflection and reducing the quality of signal transmission.

[0003] As shown in Figure 4 , it is an IO side high-speed pluggable connector. The signal is transmitted to the surface mount pad 11 through the L-shaped soldering leg 14, and then enters the chip inside the board card through the microstrip line 13. In order to ensure the reliability of welding, the surface mount pad 11 is relatively long, thus forming a stub 12 of the signal, which reduces the impedance of the pad.

[0004] For the gold finger structure, as shown in Figure 5 , the gold finger pad 21 is connected with the microstrip line 23, and there is also a stub 22 between the gold finger pad 21 and the spring 20, which reduces the impedance of the gold finger pad.

[0005] In view of the above problems, the conventional method for improving the impedance of the pad is to set a counter pad under the surface mount pad, and a few methods are to increase the pad spacing or reduce the pad size to improve the pad impedance. In the above method, the counter pad is set on the ground plane under the surface mount pad, which essentially increases the distance between the pad and the reference ground, and can improve the pad impedance to a certain extent. However, when the reference ground plane is far to a certain distance, the pad impedance basically no longer changes. On the other hand, too large counter pad or too many ground planes set counter pad will affect the wiring space of PCB, and also affect the size of power plane; increasing the pad spacing will also affect the wiring space, and reducing the pad size will affect the reliability of welding, and once the connector model is selected in the early stage, the size of the surface mount pad is also determined.

[0006] However, the conventional method for improving the impedance of the surface mount pad is to improve the impedance of the pad position as a whole, so that it is close to the impedance of the transmission line, and the low impedance point exists in the pad stub position. The conventional method cannot effectively improve the mismatch between the stub and the front end of the pad.

[0007] Therefore, the patent with the application publication number CN117177437A proposes a multi-layer PCB structure for improving the pad impedance of copper wires, which includes three or more wiring layers and a dielectric layer between the upper and lower adjacent wiring layers. The topmost wiring layer is provided with a pad of the copper wire and a connection transmission line. At least one wiring layer below the bottommost wiring layer is provided with a corresponding anti-pad. The feature is that a dielectric hole array is arranged in the anti-pad projection area. The dielectric hole array is in the dielectric layer between the wiring layer where the pad is located and the wiring layer provided with the anti-pad. The dielectric hole is filled with a low dielectric constant medium. The aperture of the dielectric hole is not less than 4 mil, and the sum of the projection areas of all dielectric holes is not less than 1 / 2 of the corresponding anti-pad projection area.

[0008] However, CN117177437A still has the following disadvantages:

[0009] 1. The processing method is difficult to control and the cost is high. The patent punches a dielectric hole during PCB lamination, which is similar to a blind buried hole in the PCB process. However, the processability of the dielectric hole supported and positioned by the copper foil-free (anti-pad area without copper foil) is still uncertain, and the realizability of the low dielectric constant medium filling is also difficult to evaluate. On the other hand, when dielectric holes need to be punched on both adjacent dielectric layers, the center alignment of dielectric holes in different dielectric layers is also a difficulty. If the lamination causes the dielectric holes in different layers to deviate, the performance may be greatly compromised. In addition, the use of "blind buried hole" process has high processing cost and high process requirement, and the hole pitch of the dielectric hole array also has special requirements.

[0010] 2. The improvement is the overall impedance of the pad, not the pad stub impedance. As known from the foregoing, the low point of the pad impedance mainly comes from the pad stub position. The patent can improve the overall impedance of the pad and reduce the impedance discontinuity between the pad and the transmission line, but cannot effectively improve the continuity of the impedance between the pad stub and the front end of the pad. Practical new type content

[0011] Based on this, the practical new type proposes a non-metallized hole PCB structure for improving the surface-mounted pad impedance, which can effectively improve the impedance at the stub position and does not need to reduce the pad size or increase the pad spacing.

[0012] The technical scheme adopted by the practical new type is:

[0013] A non-metallized hole PCB structure for improving the surface-mounted pad impedance is provided on the surface of a PCB board. One end of the surface-mounted pad is used to connect a transmission line. The feature is that:

[0014] A plurality of non-metallized holes are drilled in the PCB material below the opposite end of the surface mount pad from the connection transmission line, and the non-metallized holes are drilled from the bottom surface of the PCB material to the wiring layer where the surface mount pad is located.

[0015] The PCB structure with non-metallized holes for improving the impedance of surface mount pads, wherein at least one non-metallized hole is provided for each surface mount pad.

[0016] The PCB structure with non-metallized holes for improving the impedance of surface mount pads, wherein the hole diameter of the non-metallized holes is at least 0.15 mm, and the hole wall spacing is at least 3 mil.

[0017] The PCB structure with non-metallized holes for improving the impedance of surface mount pads, wherein the PCB material is formed by alternately stacking the wiring layers and the dielectric layers.

[0018] The PCB structure with non-metallized holes for improving the impedance of surface mount pads, wherein the ground pads are provided on both sides of the surface mount pad, the ground holes are provided on the PCB material corresponding to the ground pads, and the ground pads form the ground through the ground holes.

[0019] The PCB structure with non-metallized holes for improving the impedance of surface mount pads, wherein the anti-pads covering the area of the surface mount pads are further provided in the wiring layers inside the PCB material, and the anti-pads are arranged in the 1-2 wiring layers below the surface mount pad.

[0020] The PCB structure with non-metallized holes for improving the impedance of surface mount pads, wherein the arrangement range of the non-metallized holes does not exceed the soldering points of the surface mount pad or the plug-in connection contact points.

[0021] The PCB structure with non-metallized holes for improving the impedance of surface mount pads, wherein the non-metallized holes are also processed in the interior of the PCB material corresponding to the position of at least one side of the surface mount pad.

[0022] The PCB structure with non-metallized holes for improving the impedance of surface mount pads, wherein the adjacent non-metallized holes are connected to each other to form a non-metallized groove.

[0023] The PCB structure with non-metallized holes for improving the impedance of surface mount pads, wherein the interior of the non-metallized holes is air.

[0024] The beneficial effects brought by the technical scheme of the utility model are as follows:

[0025] 1. The utility model discloses a non-metallized hole is arranged below the surface mount pad, makes the relative dielectric constant of non-metallized hole area reduce to 1@1GHz, and then makes the equivalent relative dielectric constant of medium layer below the surface mount pad reduce. On the other hand, the reference ground plane of surface mount pad is hollowed out in the non-metallized hole area, and the distance between the surface mount pad and reference ground is increased accordingly. Therefore, the impedance of the surface mount pad stub position can be effectively improved.

[0026] 2. The non-metallized hole structure of the utility model is obtained by back drilling process. The back drilling technology is stable and mature, easy to process, almost does not increase the processing cost of PCB, and the aperture and relative position flexibility can be processed.

[0027] 3. The non-metallized hole position of the utility model only acts on the surface mount pad stub position, and does not excessively affect the wiring space.

[0028] 4. The non-metallized PCB structure for improving the impedance of surface mount pad of the utility model can be used with the counter pad scheme arranged on the reference layer below the pad. On the basis of reaching the target impedance, the reference layer of counter pad can be flexibly reduced, the power plane area can be correspondingly increased, or the risk of surface mount pad reference power plane can be reduced. BRIEF DESCRIPTION OF DRAWINGS

[0029] Figure 1 It is the structure schematic diagram of the utility model,

[0030] Figure 2 It is the sectional view of the structure of the utility model.

[0031] Figure 3 It is the impedance simulation result comparison drawing of the PCB structure using the utility model and the counter pad optimization pad impedance mode (counter pad is the optimal size) of traditional use.

[0032] Figure 4 It is the residual stub schematic diagram of pluggable connector.

[0033] Figure 5 It is the residual stub schematic diagram of gold finger structure.

[0034] Mark explanation: 1-ground pad; 2-ground via; 3-transmission line; 4-non-metallized hole; 5-surface mount pad; 6-counter pad; 7-secondary top wiring layer; 8-intermediate wiring layer; 9-bottom wiring layer; 10-medium layer; 11-surface mount pad; 12-stub; 13-microstrip line; 14-L-shaped solder leg; 20-spring piece; 21-gold finger pad; 22-stub; 23-microstrip line. DETAILED DESCRIPTION

[0035] The following combines the drawings Figure 1 , Figure 2、 Figure 3 The embodiment of the PCB structure of the non-metallized hole for improving the surface-mounted solder pad impedance is described in detail.

[0036] The PCB structure of the non-metallized hole for improving the surface-mounted solder pad impedance is provided in the embodiment, the PCB board material uses M6G board material, the relative dielectric constant is 3.4@1GHz, the wiring layer (including the secondary top wiring layer 7, the intermediate wiring layer 8 and the bottom surface wiring layer 9) and the dielectric layer 10 are alternately stacked, and the surface-mounted solder pad 5 selects the PCIE connector solder pad.

[0037] Figure 1 and Figure 2 The PCB structure of the non-metallized hole in the embodiment is respectively a plan view and a sectional view, the surface-mounted solder pad 5 is arranged on the surface of the PCB board material, one end of the surface-mounted solder pad 5 is connected with the transmission line 3, and the transmission line 3 is used for transmitting signals to the chip on the PCB; the ground pad 1 is arranged on the two sides of the surface-mounted solder pad 5, the ground hole 2 is arranged on the PCB board material corresponding to the ground pad 1, and the ground pad 1 forms the ground through the ground hole 2; because the impedance of the surface-mounted solder pad 5 is low, the anti-solder pad 6 (in the embodiment, the anti-solder pad 6 is arranged on the secondary top wiring layer 7 adjacent to the surface-mounted solder pad, and the size of the anti-solder pad 6 is obtained through simulation optimization) covering at least the area of the surface-mounted solder pad 5 is further arranged in the wiring layer inside the PCB board material; these all belong to the prior art;

[0038] In the embodiment, a plurality of non-metallized holes 4 (each surface-mounted solder pad 5 corresponds to three non-metallized holes 4, the hole radius is 9mil, and the hole wall spacing is 3.5mi) are drilled in the PCB board material inside the end (namely the stub) of the surface-mounted solder pad 5 opposite to the transmission line 3, the non-metallized holes 4 are drilled from the bottom surface of the PCB board material to the lower side of the surface-mounted solder pad 5, and pass through the alternately stacked wiring layer (including the secondary top wiring layer 7, the intermediate wiring layer 8 and the bottom surface wiring layer 9) and the dielectric layer 10 in the way;

[0039] Further, the hole diameter size, the number and the position of the non-metallized holes 4 can be determined by a simulation method, the hole diameter of the non-metallized hole 4 is not less than 0.15mm, can be greater than the width of the surface-mounted solder pad 5, and the arrangement range of the non-metallized hole 4 does not exceed the solder joint or the plug-in connection contact point of the surface-mounted solder pad 5.

[0040] In addition, the non-metallized holes 4 can also be processed between a pair of surface-mounted solder pads 5 or on the positions corresponding to the PCB board material on the two sides.

[0041] In addition, the adjacent non-metallized holes 4 can also not have spacing, but form mutual interference, and even can be connected to constitute the form of the non-metallized groove (formed by multiple drilling holes).

[0042] The non-metallized hole 4 can be processed by a mature back-drilling method, drilled from the bottom wiring layer 9 to the wiring layer where the surface mount pad 5 is located, and the drilled hole is not filled with any medium, and the inside is air. Therefore, the relative dielectric constant of the area of the non-metallized hole 4 is reduced to 1.0@1GHz, and the relative dielectric constant of the medium layer 10 below the surface mount pad 5 is between 1.0-3.4(@1GHz) at this time. On the other hand, since the non-metallized hole 4 drills through the wiring layer (including the secondary top wiring layer 7, the intermediate wiring layer 8 and the bottom wiring layer 9), the reference ground distance of the surface mount pad stub is relatively increased, and the stub impedance is further improved.

[0043] Figure 3 The difference signal impedance comparison chart under the PCB structure without using the structure of the utility model (with a reverse pad, without adding a non-metallized hole) and the PCB structure using the structure of the utility model is shown, and m1 and m2 respectively represent the impedance at the surface mount pad stub before and after using the structure of the utility model. It can be seen that after using the structure of the utility model, the pad stub impedance is improved by 6.75 ohm, and the impedance continuity of the pad stub and the front end of the pad is obviously improved.

[0044] In summary, the beneficial effects brought by the technical scheme of the utility model are as follows:

[0045] 1. The utility model sets a non-metallized hole below the surface mount pad, so that the relative dielectric constant of the non-metallized hole area is reduced to 1@1GHz, and then the equivalent relative dielectric constant of the medium layer below the surface mount pad is reduced. On the other hand, the reference ground plane of the surface mount pad is hollowed out in the non-metallized hole area, and the distance between the surface mount pad and the reference ground is correspondingly increased. Therefore, the impedance at the surface mount pad stub position can be effectively improved.

[0046] 2. The non-metallized hole structure of the utility model is obtained by a back-drilling process. The back-drilling technology is stable and mature, easy to process, almost does not increase the processing cost of the PCB, and the hole diameter and relative position flexibility can be processed.

[0047] 3. The non-metallized hole position of the utility model can only act on the surface mount pad stub position, and will not excessively affect the wiring space.

[0048] 4. The non-metallized PCB structure for improving the impedance of the surface mount pad of the utility model can be used with the reverse pad scheme set on the reference layer below the pad. On the basis of achieving the target impedance, the reference layer of the reverse pad can be flexibly reduced, and the power plane area can be correspondingly increased, or the risk of the surface mount pad reference power plane can be reduced.

[0049] The above only describes one embodiment of the present application, and is not used to limit the present application, and various improvements in the method concept and technical solution of the present application, or direct application of the concept and technical solution of the present application to other occasions without improvement, are all within the protection scope of the present application.

Claims

1. A PCB structure with non-metallized holes for improving the impedance of surface mount pads, the PCB structure having surface mount pads on the surface of the PCB board, one end of the surface mount pads being used for connecting transmission lines, characterized in that: a plurality of non-metallized holes are drilled in the PCB board under the opposite end of the surface mount pads from the end used for connecting transmission lines, the non-metallized holes being drilled from the bottom surface of the PCB board to the wiring layer where the surface mount pads are located. At least one non-metallized hole is provided for each surface mount pad.

2. The PCB structure of non-metallized via for improving the impedance of surface mount pad according to claim 1, wherein: The non-metallized holes have a hole diameter of at least 0.15 mm and a hole wall spacing of at least 3 mils.

3. The PCB structure of non-metallized via for improving the impedance of surface mount pad according to claim 2, characterized in that: The PCB board is formed by alternately stacking wiring layers and dielectric layers.

4. The PCB structure of non-metallized via for improving the impedance of surface mount pad of claim 1, wherein: Ground pads are provided on both sides of the surface mount pads, the ground pads having ground holes in the PCB board corresponding thereto, the ground pads being grounded through the ground holes.

5. The PCB structure of non-metallized via for improving the impedance of surface mount pad of claim 1, wherein: At least one anti-pad is provided in the wiring layer in the PCB board, the anti-pad covering the area of the surface mount pads, the anti-pad being provided in the 1-2 wiring layers below the surface mount pads.

6. The PCB structure of non-metallized via for improving the impedance of surface mount pad of claim 1, wherein: The non-metallized holes are arranged in a range that does not exceed the soldering points of the surface mount pads or the contact points of the plug-in connection.

7. The PCB structure of non-metallized via for improving the impedance of surface mount pad of claim 1, wherein: The PCB board corresponding to at least one side of the surface mount pads is also processed with the non-metallized holes.

8. The PCB structure of non-metallized via for improving the impedance of surface mount pad of claim 1, wherein: Adjacent non-metallized holes are connected to each other to form non-metallized grooves.

9. The PCB structure of non-metallized via for improving the impedance of surface mount pad of claim 1, wherein: The non-metallized holes are hollow.

10. The PCB structure of non-metallized via for improving the impedance of surface mount pad of claim 1, wherein:

2. The PCB structure of claim 1, wherein the non-metallized holes are arranged in a range that does not exceed the soldering points of the surface mount pads or the contact points of the plug-in connection.

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