Solar cell, photovoltaic module and photovoltaic system

Abstract

The embodiment of the utility model provides a solar cell, a photovoltaic module and a photovoltaic system, the solar cell comprises a first surface and a second surface which are opposite to each other, and a side surface located between the first surface and the second surface, and the side surface is provided with a first area close to the first surface and a second area close to the second surface; a first tunneling oxide layer, a first doped polycrystalline silicon layer and a first antireflection layer are sequentially stacked on the first region; and a first intrinsic amorphous silicon layer, a first doped microcrystalline silicon layer and a second antireflection layer are sequentially laminated on the second region. According to the embodiment of the invention, the edge passivation can be enhanced, the efficiency of the solar cell is improved, the edge winding plating of the tunneling oxide layer and the doped polycrystalline silicon does not need to be removed, the etching process is reduced, and the production cost is reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of solar cells, in particular to a solar cell, a photovoltaic module and a photovoltaic system. BACKGROUND

[0002] With the continuous development of the photovoltaic field, higher and higher requirements are put forward for the efficiency of solar cells. It is well known that improving the surface passivation capability of solar cells is one of the most important means to improve the efficiency of solar cells. Through passivation, the current collection capability of solar cells can be significantly improved, and the probability of recombination of minority carriers is reduced, thereby improving the power generation capability of solar cells.

[0003] At present, the side surface of the TOPCon and HJT solar cell is usually removed from other film layers in the process, and the silicon substrate is exposed before the insulating medium layer is plated, and then the bare silicon is passivated by the insulating medium layer, for example, the edge is formed after the bare silicon is passivated by the aluminum oxide or silicon nitride film layer, which usually requires an additional etching process to remove the edge structure, resulting in an increase in production cost, and the passivation effect is insufficient.

[0004] It should be noted that the above content is not necessarily prior art, and is not used to limit the patent protection scope of the present application. SUMMARY

[0005] The embodiments of the present application provide a solar cell, a photovoltaic module and a photovoltaic system, aiming to solve the problem of insufficient passivation effect of the traditional solar cell by passivating the bare silicon through the insulating medium layer.

[0006] In a first aspect, the embodiments of the present application provide a solar cell, comprising:

[0007] A substrate having opposite first and second surfaces and a side surface between the first and second surfaces, the side surface being provided with a first region close to the first surface and a second region close to the second surface;

[0008] The first region is sequentially stacked with a first tunneling oxide layer, a first doped polysilicon layer and a first antireflection layer;

[0009] The second region is sequentially stacked with a first intrinsic amorphous silicon layer, a first doped microcrystalline silicon layer and a second antireflection layer.

[0010] In summary, according to the above solar cell, by arranging the first tunneling oxide layer, the first doped polysilicon layer and the first anti-reflection layer in the first region, the first region has good passivation effect; by arranging the first intrinsic amorphous silicon layer, the first doped microcrystalline silicon layer and the second anti-reflection layer in the second region, the second region has good passivation effect, and due to the existence of the side structure close to the first surface or close to the second surface, the PN junction area is increased, the probability of separation of photo-generated carriers in the edge region is improved, thereby greatly strengthening the edge passivation, and the solar cell efficiency is improved, and the edge of the tunneling oxide layer and the doped polysilicon can be not removed, which is beneficial to reducing the etching process and reducing the production cost.

[0011] Optionally, further comprising:

[0012] In the direction in which the second surface points to the first surface, the first surface comprises a second tunneling oxide layer, a second doped polysilicon layer, a first TCO layer and a third anti-reflection layer which are stacked in sequence.

[0013] In the direction in which the first surface points to the second surface, the second surface comprises a second intrinsic amorphous silicon layer, a second doped microcrystalline silicon layer, a second TCO layer and a fourth anti-reflection layer which are stacked in sequence.

[0014] Optionally, the doping type of the second doped polysilicon layer is opposite to the doping type of the second doped microcrystalline silicon layer, and the doping type of the second doped polysilicon layer is the same as the doping type of the substrate.

[0015] Optionally, in the thickness direction of the substrate, the width of the first region is L1, and the width of the second region is L2, satisfying L1≤d and L2≤d, d representing the thickness of the substrate.

[0016] Optionally, L2≥d-L1

[0017] Optionally, the extension length of the first intrinsic amorphous silicon layer in the thickness direction of the substrate is L 21 , the extension length of the first doped microcrystalline silicon layer in the thickness direction of the substrate is L 22 , satisfying L 21 ≥L 22 .

[0018] Optionally, the first tunneling oxide layer or the first doped polysilicon layer completely covers the side surface of the substrate and extends to the second surface, and the extension length is L3, satisfying 0≤L3≤1mm.

[0019] Optionally, the thickness of the first TCO layer and the second TCO layer is 20-100nm.

[0020] In a second aspect, the embodiments of the present application provide a photovoltaic module, comprising the solar cell described above.

[0021] In a third aspect, the embodiments of the present application provide a photovoltaic system, comprising the photovoltaic module described above. BRIEF DESCRIPTION OF DRAWINGS

[0022] In the drawings, like reference numerals refer to like elements throughout the various drawings. The drawings are not necessarily to scale, the emphasis instead being placed upon illustrating the principles of the application. It should be understood that the drawings are merely for purposes of illustration and are not to be construed as limiting the scope of the application.

[0023] Figure 1 is a structural schematic diagram of a solar cell provided by a first embodiment of the present application;

[0024] Figure 2 is a structural schematic diagram of a solar cell provided by a second embodiment of the present application;

[0025] Figure 3 is a structural schematic diagram of a solar cell provided by a third embodiment of the present application.

[0026] BRIEF DESCRIPTION OF DRAWINGS

[0027] 10 - substrate; 20 - first tunneling oxide layer; 30 - first doped polysilicon layer; 40 - first anti-reflection layer; 50 - first intrinsic amorphous silicon layer; 60 - first doped microcrystalline silicon layer; 70 - second anti-reflection layer; 80 - second tunneling oxide layer; 90 - second doped polysilicon layer; 100 - first TCO layer; 110 - third anti-reflection layer; 120 - second intrinsic amorphous silicon layer; 130 - second doped microcrystalline silicon layer; 140 - second TCO layer; 150 - fourth anti-reflection layer; 160 - metal electrode. DETAILED DESCRIPTION

[0028] Embodiments of the present application are described in detail below with reference to the accompanying drawings. In the drawings, the size and relative sizes of layers, regions, elements, and the like can be exaggerated for clarity. Like or similar designations can be used throughout the various drawings to designate like or similar elements or features. The embodiments described below are examples of the present application and are not intended to limit the present application. It should be understood that the embodiments in the present application and the features in the embodiments can be combined with each other without conflict.

[0029] It will be understood that when an element or layer is referred to as being "on" or "connected to" another element or layer, it can be directly on or connected to the other element or layer or intervening elements or layers can be present. In contrast, when an element is referred to as being "directly on" or "directly connected to" another element or layer, there are no intervening elements or layers present. It will be understood that, although the terms first, second, third, etc. can be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present disclosure. Similarly, a second element, component, region, layer or section discussed below could be termed a first element, component, region, layer or section without departing from the teachings of the present disclosure.

[0030] In the present application, unless specifically defined otherwise, the terms "setting", "mounting", "connecting", "joining", "fixing" and the like should be given their broadest possible interpretation in accordance with the principles of equivalence, such that, for example, "connecting" can be interpreted to mean fixedly connected, removably connected, or integrally formed; "mechanically connected" can be interpreted to mean directly connected, indirectly connected through intervening medium, or interacting through electromagnetic energy; and "directly connected" can be interpreted to mean directly connected, or indirectly connected through intervening medium. It will be apparent to those skilled in the art that the terms "setting", "mounting", "connecting", "joining", "fixing" and the like have the broadest possible interpretation in accordance with the principles of equivalence.

[0031] It should be noted that the terms "first", "second", and the like, used in the description and the claims of the present application are used to describe various elements, and are not necessarily used to describe a particular sequential or chronological order. Unless otherwise specified, it is contemplated that the terms "first", "second", and the like can be interchanged, with respect to the description of the embodiments of the present application, for example, to reflect that the embodiments of the present application can operate in other sequences than the one described herein. Furthermore, the terms "comprising", "having", "containing", and "including" and their variants are intended to be broad and encompass the occurrence of zero, one or more of the stated elements. For example, a process, method, system, article, or apparatus that comprises a list of elements is not necessarily limited to only those elements but can include other elements not expressly listed or inherent to such process, method, system, article, or apparatus.

[0032] To facilitate understanding of the technical solutions of the embodiments of the present application, the related art is described below:

[0033] The applicant discovered that in existing technologies, the side surface typically has other films removed during the process, exposing the bare silicon substrate before depositing the insulating dielectric layer, and then passivating the bare silicon with the insulating dielectric layer. This passivation effect is worse than structures with a tunneling layer paired with poly-Si and polycrystalline silicon layers paired with microcrystalline silicon layers.

[0034] In view of the above problems, the present application proposes a solar cell that enhances the edge passivation effect by designing an edge passivation structure in the first and second regions near the first and second surfaces, thereby improving the efficiency of the solar cell. At the same time, it can avoid removing the tunneling oxide layer and the edge-wrapped polycrystalline silicon, which helps to reduce the etching process and reduce production costs.

[0035] Exemplary embodiments according to this application will now be described in more detail with reference to the accompanying drawings. It should be understood that these exemplary embodiments may be implemented in many different forms and should not be construed as being limited to the embodiments set forth herein.

[0036] Example 1

[0037] like Figure 1 As shown, the first embodiment of this application provides a solar cell, which includes:

[0038] A substrate 10 having a first surface and a second surface receives incident light and generates generated charge carriers. The substrate 10 includes, but is not limited to, a doped semiconductor substrate made of materials such as silicon or germanium. The doping element of the substrate 10 can be either N-type or P-type.

[0039] The side surface of the substrate 10 has a first region and a second region in the direction near the first surface and the direction near the second surface, respectively. Between the first surface and the second surface of the side surface, a first tunneling oxide layer 20, a first doped polycrystalline silicon layer 30 and a first antireflection layer 40 are sequentially stacked on the first region in the direction perpendicular to the side surface of the substrate 10. A first intrinsic amorphous silicon layer 50, a first doped microcrystalline silicon layer 60 and a second antireflection layer 70 are sequentially stacked on the second region in the direction perpendicular to the side surface of the substrate 10.

[0040] By setting a first tunneling oxide layer 20, a first doped polycrystalline silicon layer 30, and a first antireflection layer 40 in the first region, a good passivation effect is ensured in the first region. By setting a first intrinsic amorphous silicon layer 50, a first doped microcrystalline silicon layer 60, and a second antireflection layer 70 in the second region, a good passivation effect is ensured in the second region. At the same time, due to the presence of side structures near the first or second surface, the PN junction area is increased, the probability of photogenerated carriers being separated in the edge region is improved, and thus the edge passivation is greatly enhanced.

[0041] In order to further improve the passivation effect of the battery, the solar cell further comprises a second tunneling oxide layer 80, a second doped polysilicon layer 90, a first TCO layer 100, a third anti-reflection layer 110 and a metal electrode 160 arranged in sequence along the thickness direction of the first surface; and further comprises a second intrinsic amorphous silicon layer 120, a second doped microcrystalline silicon layer 130, a second TCO layer 140 and a fourth anti-reflection layer 150 arranged in sequence along the thickness direction of the second surface. The passivation structure consistent with the first region and the first surface ensures that the region has good passivation effect; the structure same as the second region and the second surface also ensures that the region has good passivation effect; and the existence of the side structure also increases the PN junction area and improves the probability of separation of photo-generated carriers in the edge region.

[0042] Secondly, the metal electrode 160 penetrates through the third anti-reflection layer 110 and is electrically connected with the first TCO layer 100, the doping type of the second doped polysilicon layer 90 is opposite to the doping type of the second doped microcrystalline silicon layer 130, and the doping type of the second doped polysilicon layer 90 is same as the doping type of the substrate 10. The polysilicon layer with the same doping type as the substrate 10 forms a TOPCon passivation structure with the tunneling oxide layer, which can form a good passivation effect on the first surface. Since the intrinsic amorphous silicon layer contains a large number of hydrogen atoms, it can neutralize the dangling bonds on the surface of the substrate 10 and reduce surface recombination. The microcrystalline silicon layer with the same doping type as the substrate 10 can provide a good field effect passivation effect due to its much higher doping concentration than the substrate 10.

[0043] Specifically, along the thickness direction of the substrate 10, the width of the first region is L1, and the width of the second region is L2, satisfying L1+L2

[0044] Embodiment Two

[0045] The solar cell structure of the present embodiment is basically same as that of Embodiment One, and the difference lies in that L2≥d-L1, as shown in Figure 2 the first intrinsic amorphous silicon layer 50 or the first doped microcrystalline silicon layer 60 at least partially covers the first tunneling oxide layer 20 and the first doped polysilicon layer 30 extending to the side surface of the substrate 10, the extension length of the first intrinsic amorphous silicon layer 50 along the thickness direction of the substrate 10 is denoted as L 21 , the extension length of the first doped microcrystalline silicon layer 60 along the thickness direction of the substrate 10 is denoted as L 22 , satisfying L 21 ≥L 22 , so that the passivation structure of the second region can at least partially cover or fully cover the passivation structure of the first region, which can further increase the edge PN junction area on the basis of the advantages of Embodiment One.

[0046] Embodiment Three

[0047] This embodiment is basically the same as Embodiment One, with the difference that the first tunneling oxide layer 20 and the first doped polysilicon layer 30 along the thickness direction of the silicon wafer extend a length L1 (the width of the first region), which satisfies L1=d, i.e. the first tunneling oxide layer 20 and the first doped polysilicon layer 30 completely cover the side surface of the substrate 10 and extend to the second surface by a length L3, which satisfies 0≤L3≤5mm. The first intrinsic amorphous silicon layer 50 and the first doped microcrystalline silicon layer 60 along the thickness direction of the silicon wafer extend a length L2 (the width of the second region), which satisfies L2=d, i.e. the first tunneling oxide layer 20 and the first doped polysilicon layer 30 completely cover the side surface of the substrate 10 and extend to the second surface by a length L4, which satisfies 0≤L4≤1mm, as shown in FIG. 3. With this structure, the part around the second surface that is plated during the formation of the first region does not have to be removed, thereby simplifying the cleaning and etching process steps required for removing the plated part, and reducing the production cost. Figure 3

[0048] A method for preparing a solar cell according to any of the above embodiments is provided below, which comprises the following steps:

[0049] Step S01: preparing a substrate;

[0050] Step S02: preparing a second tunneling oxide layer and a second doped polysilicon layer on the first surface of the substrate, the second tunneling oxide layer and the second doped polysilicon layer simultaneously covering the side surface of the substrate, to prepare the first tunneling oxide layer and the first doped polysilicon layer;

[0051] Step S03: preparing a second intrinsic amorphous silicon layer and a second doped microcrystalline silicon layer on the second surface of the substrate, the second intrinsic amorphous silicon layer and the second doped microcrystalline silicon layer simultaneously covering the side surface of the substrate, to prepare the first intrinsic amorphous silicon layer and the first doped microcrystalline silicon layer;

[0052] Step S04: preparing a first TCO layer and a second TCO layer on the first surface and the second surface respectively, the first TCO layer on the first surface not being in contact with the first doped microcrystalline silicon layer on the side surface;

[0053] Step S05: preparing a third anti-reflective layer and a fourth anti-reflective layer on the first surface and the second surface respectively, the third anti-reflective layer and the fourth anti-reflective layer covering the side surface of the substrate, to prepare the first anti-reflective layer and the second anti-reflective layer.

[0054] Step S06: preparing an electrode, the electrode being in contact with the first TCO layer and the second TCO layer.

[0055] As an example of this embodiment, the flow of the method for preparing a solar cell is as follows:​

[0056] 1. Etching the surface of the substrate to form a pyramid texture, reducing the surface reflectivity and increasing light absorption;

[0057] 2. Forming a second tunneling oxide layer on the front surface of the substrate by thermal oxidation, with a thickness of 1-2 nm. If the thickness is too small, the carrier selectivity is low, resulting in poor passivation effect. If the thickness is too large, the carrier tunneling effect is poor, resulting in poor transmission performance, affecting the fill factor of the cell. Due to the plating around, a first tunneling oxide layer is formed on the side surface and the edge of the back surface at the same time;

[0058] 3. Forming a second n-poly-Si layer on the tunneling oxide layer by LPCVD combined with phosphorus diffusion, which together with the tunneling oxide layer forms a TOPCon passivation structure with good field effect passivation and chemical passivation effect. The thickness of the poly-Si layer is between 5-50 nm. If the thickness is too thin, the field passivation effect is poor. If the thickness is too thick, the parasitic absorption is large, affecting the light absorption rate. Due to the plating around, a first n-pol-Si layer is formed on the side surface and the edge of the back surface at the same time;

[0059] 4. Polishing the back surface of the substrate to form a flat surface;

[0060] 5. Forming a second intrinsic amorphous silicon layer and a second p-type microcrystalline silicon layer on the back surface by PECVD. The thickness of the second intrinsic amorphous silicon layer is 2-10 nm. If the thickness is too thin, the passivation effect is poor. If the thickness is too thick, the carrier transmission performance is affected. The thickness of the second p-type microcrystalline silicon layer is 10-100 nm. If the thickness is too thin, the passivation effect is poor. If the thickness is too thick, the parasitic absorption and the transmission performance are affected, which affects the conversion efficiency of the cell. Due to the plating around, a first intrinsic amorphous silicon layer and a first p-type microcrystalline silicon layer are formed on the side surface at the same time, and a PN junction structure is formed on the side, increasing the PN junction area and the probability of photogenerated carrier separation;

[0061] 6. Forming a first transparent conductive oxide layer and a second transparent conductive oxide layer (TCO) on the front and back surfaces of the substrate by PVD. The TCO layers on the front and back surfaces are not in contact and are insulated from each other. The thickness of the TCO layer is between 20-100 nm, which can collect the carriers collected by the second n-type poly-Si layer on the front surface and the first p-type doped microcrystalline silicon layer on the back surface, and also has good antireflection effect. A suitable film thickness is needed to form the antireflection effect. If the thickness of the TCO layer is too thin, the antireflection effect and carrier collection effect are poor. If the thickness of the TCO layer is too thick, the film layer absorbs too much light.

[0062] 7. Forming a silicon nitride film layer (antireflection layer) on the front and back of the substrate by low-temperature PECVD, covering the side surface of the substrate, which can reduce reflection, and the thickness of the silicon nitride film layer is 20-80nm.

[0063] 8. Forming a metalized contact on the front and back to transmit carriers.

[0064] In summary, according to the above-mentioned solar cell, by arranging the first tunneling oxide layer, the first doped polysilicon layer and the first antireflection layer in the first region, the first region has good passivation effect; by arranging the first intrinsic amorphous silicon layer, the first doped microcrystalline silicon layer and the second antireflection layer in the second region, the second region has good passivation effect, and due to the existence of the side structure close to the first surface or close to the second surface, the PN junction area is increased, the probability of separating the photo-generated carriers in the edge region is improved, thereby greatly strengthening the edge passivation, improving the efficiency of the solar cell, and the edge of the tunneling oxide layer and the doped polysilicon can be not removed from the plating, which is conducive to reducing the etching process and reducing the production cost.

[0065] The embodiment of the present application also provides a photovoltaic module (not shown), which comprises the above-mentioned solar cell.

[0066] The embodiment of the present application also provides a photovoltaic system, which comprises the photovoltaic module in any of the above embodiments. The photovoltaic system has the same advantages as the photovoltaic module, which will not be repeated here. The application field of the photovoltaic system is wide, which is not limited to photovoltaic power stations, such as ground power stations, roof power stations and water surface power stations, but also includes various devices and apparatuses using solar power, such as user solar power, solar street lamps, solar cars and solar buildings. Of course, it can be understood that the application field of the photovoltaic system is not limited to this, that is, the photovoltaic system can be applied in all fields requiring solar power generation. Taking a photovoltaic power generation system network as an example, the photovoltaic system can include a photovoltaic array, a combiner box and an inverter, the photovoltaic array can be an array combination of a plurality of photovoltaic modules, for example, a plurality of photovoltaic modules can form a plurality of photovoltaic arrays, the photovoltaic array is connected to the combiner box, the combiner box can combine the current generated by the photovoltaic array, the combined current flows through the inverter to convert into alternating current required by the power grid, and then is connected to the power network to realize solar power supply.

[0067] It should be noted that the terms "length", "width", "thickness", "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer" and the like merely refer to the orientation in the drawings in which the application is illustrated and described and are not intended to limit the application thereto. Such terms are used merely for the convenience of specific description and are in no way intended to limit the application. The terms "in" and "out" refer to the inner and outer contours of the components themselves. For example, if the device in the drawing is inverted, the device described as "above" or "over" other devices or structures would then be positioned "below" or "under" the other devices or structures. Thus, the exemplary term "above" can include both the "above" and "below" orientations. The device can also be positioned in other different ways (rotated 90 degrees or in other orientations), and the spatially relative descriptions used herein interpreted accordingly.

[0068] It should also be noted that the terms "one embodiment", "another embodiment", "an embodiment" and the like, as used herein, do not necessarily refer to the same embodiment, but instead can refer to different embodiments. Further, the particular features, structures, or characteristics described in connection with an embodiment can be combined in any suitable manner in one or more embodiments.

[0069] In the above embodiments, the description of each embodiment is focused on different aspects, and the parts not described in detail in a certain embodiment can be referred to the relevant description of other embodiments.

[0070] It should also be noted that the above are only the preferred embodiments of the application, and do not limit the patent protection scope of the application. Any equivalent structure or equivalent process transformation using the content of the specification and drawings, or direct or indirect application in other related technical fields, are also included in the patent protection scope of the application.

Claims

1. A solar cell, characterized by, Comprising: a substrate having opposite first and second surfaces and side surfaces between the first and second surfaces, the side surfaces being provided with a first region close to the first surface and a second region close to the second surface; a first tunneling oxide layer, a first doped polysilicon layer and a first anti-reflective layer are sequentially stacked on the first region; a first intrinsic amorphous silicon layer, a first doped microcrystalline silicon layer and a second anti-reflective layer are sequentially stacked on the second region; wherein along the thickness direction of the substrate, the width of the first region is L1, the width of the second region is L2, satisfying L1≤d, L2≤d, and L1+L2<d, d representing the thickness of the substrate.

2. The solar cell according to claim 1, characterized in that, Further comprising: in the direction of the first surface pointing to the second surface, the second surface comprises a second intrinsic amorphous silicon layer, a second doped microcrystalline silicon layer, a second TCO layer, and a fourth anti-reflective layer which are sequentially stacked. The doping type of the second doped polysilicon layer is opposite to the doping type of the second doped microcrystalline silicon layer, and the doping type of the second doped polysilicon layer is the same as the doping type of the substrate.

3. The solar cell according to claim 2, characterized in that, The thickness of the first TCO layer and the second TCO layer is 20-100nm.

4. The solar cell of claim 2, wherein A solar cell comprising any one of claims 1-4.

5. A photovoltaic module, characterized by, A photovoltaic module comprising claim 5.

6. A photovoltaic system characterized by, ​

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