Product identity recognition and current measurement device

Abstract

The utility model discloses a product identity recognition and current measurement device, which comprises a data processing circuit, a voltage output circuit, a current sampling circuit and a USB (Universal Serial Bus) interface circuit, the data processing circuit is connected with the voltage output circuit, and the voltage output circuit supplies power to the USB interface circuit; the USB interface circuit is used for connecting the data processing circuit and a product to be tested; the input end of the current sampling circuit is electrically connected with the USB interface circuit, the output end of the current sampling circuit is electrically connected with the data processing circuit, and the current sampling circuit feeds back current signals collected on the USB interface circuit to the data processing circuit. The utility model discloses a device which can automatically complete product identity recognition, adjust output voltage to be within a required range of a to-be-measured product, perform current acquisition and signal amplification processing, reduce manual intervention and complete identity recognition and measurement in one step.

Description

Technical Field

[0001] This utility model relates to the field of data acquisition and electronic measurement technology, and in particular to a product identification and current measurement device. Background Technology

[0002] With economic development and social progress, factories of all types are moving towards automation, intelligence, and digitalization. During the production process, it is necessary to test and measure various functions and then correlate the test results with the product being tested.

[0003] Current technologies typically employ barcode scanning devices to identify product information before conducting relevant tests, aiming to correlate test results with the product under test. However, this method is highly susceptible to human error, increasing the probability of errors. Furthermore, current technologies for testing product charging current often rely on power adapters or adjustable power supplies in conjunction with ammeters. The combination of these two devices is inconvenient to adjust and cumbersome to operate.

[0004] Therefore, there is an urgent need to develop a system that can automatically identify products, adjust the output voltage to the range required by the product under test, collect current and amplify signals, reduce manual intervention, and complete identification and measurement in one step. Utility Model Content

[0005] This invention overcomes the shortcomings of the prior art and provides a method that can automatically identify products, adjust the output voltage to the range required by the product under test, collect current and amplify signals, reduce manual intervention, and complete identification and measurement in one step.

[0006] To achieve the above objectives, the technical solution adopted by this utility model is as follows: a product identification and current measurement device, comprising: a data processing circuit, a voltage output circuit, a current sampling circuit, and a USB interface circuit; the data processing circuit is connected to the voltage output circuit, and the voltage output circuit supplies power to the USB interface circuit; the USB interface circuit is used to connect the data processing circuit and the product under test; the input terminal of the current sampling circuit is electrically connected to the USB interface circuit, and the output terminal of the current sampling circuit is electrically connected to the data processing circuit, and the current sampling circuit feeds back the current signal collected on the USB interface circuit to the data processing circuit.

[0007] In a preferred embodiment of this utility model, the USB interface circuit includes: a USB connector, wherein the VBUS terminal of the USB connector serves as the power supply VCC_USB1 node, and the VBUS terminal of the USB interface connector is also grounded through parallel ripple capacitors C1 and C2; the D- terminal of the USB interface connector is the SWDCLK pin, which serves as the clock pulse input terminal and is connected to the PD1 pin of the control chip of the external control system; the D+ terminal of the USB interface connector is the SWDIO1 pin, which serves as the bidirectional data transmission terminal and is connected to the PD2 pin of the control chip; the SH terminal of the USB interface connector is left floating; and the GND terminal of the USB interface connector is grounded through resistor R92.

[0008] In a preferred embodiment of this utility model, the current sampling circuit includes: a differential operational amplifier chip; the input pin IN-1 and the input pin IN+1 of the differential operational amplifier chip are respectively connected to the two ends of resistor R92, the VS pin of the differential operational amplifier chip is connected to the power supply AVCC_5V through resistor R91, and the VS pin of the differential operational amplifier chip is also grounded through capacitor C115; the GND pin of the differential operational amplifier chip is grounded, and the output pin OUT1 of the differential operational amplifier chip is electrically connected to the CC1_ADC node and the data processing circuit.

[0009] In a preferred embodiment of this utility model, the voltage output circuit includes: a power supply chip, wherein the GND pin of the power supply chip is grounded, the VIN pin of the power supply chip is a PWR node, and the PWR node is grounded through parallel capacitors C104 and C105; the ON / OFF pin of the power supply chip serves as the CC1_CTR pin; the output pin of the power supply chip has two leads, one of which is grounded through a Zener diode D13, and the other is connected to the VCC_USB1 node through an inductor L9; the output terminal of the inductor L9 is grounded through parallel capacitors C107 and C108; power supply The chip's FB pin has two leads. One lead is grounded through resistor R82, and the other is connected to the VCC_USB1 node through resistor R83. A capacitor C102 is connected in parallel with resistor R83. The connection point of resistors R82 and R83 is led out through resistors R80 and R79 in series to form the CV1 node. The CV1 node is connected to the PB7 pin of the control chip. The control chip generates a PWM signal to regulate the voltage of the CV1 node. The connection point of resistors R80 and R79 is grounded at the same point as the ground terminal of resistor R82 through capacitor C101.

[0010] In a preferred embodiment of this utility model, the data processing circuit includes: an analog-to-digital converter (ADC) chip, wherein the VDD pin of the ADC chip is connected to the power supply AVCC_5V, and the VDD pin of the ADC chip is also grounded through parallel capacitors C111 and C112; the GND pin of the ADC chip is grounded; a resistor R90 is connected in parallel between the MCLK_IN pin and the MCLK_OUT pin of the ADC chip, and a crystal oscillator circuit is connected in parallel across the two ends of the resistor R90 and grounded through the crystal oscillator circuit; the AIN1+ pin and A... A capacitor C103 is connected in parallel between the IN1- pins, and a resistor R84 is connected in parallel across the two ends of the capacitor C103. One end of the resistor R84 is connected to the CC1_ADC node through a resistor R87, and the other end of the resistor R84 is grounded through a resistor R85. A capacitor C106 is connected in parallel between the AIN2- and AIN2+ pins of the analog-to-digital converter chip, and a resistor R88 is connected in parallel across the two ends of the capacitor C106. One end of the resistor R88 is grounded through a resistor R86, and the other end of the resistor R88 is connected to the VCC_USB1 node through a resistor R89. The pin is pulled up to the AVCC_5V power supply through resistor R81; the analog-to-digital converter chip's... The pin is the ADC_RDY_CHIPC node, which is connected to the PE8 pin of the control chip. The pins of the analog-to-digital converter (ADC) chip are connected to the ADC_CS1_CHIPC node and the PE7 pin of the control chip; the SCLK pin of the ADC chip is connected to the ADC_SCLK_PE2 node and the PE2 pin of the control chip; the DIN pin of the ADC chip is connected to the ADC_MOSI_PE6 node and the PE6 pin of the control chip; the DOUT pin of the ADC chip is connected to the ADC_MISO_PE5 node and the PE5 pin of the control chip; the REFIN+ pin of the ADC chip is connected to the REF_IN+ node; and the REFIN- pin of the ADC chip is connected to the REF_IN- node. The REF_IN+ and REF_IN- nodes are connected to the positive and negative output nodes of the reference voltage circuit.

[0011] In a preferred embodiment of this utility model, the crystal oscillator circuit includes a crystal oscillator connected in parallel across the resistor R90, and the two ends of the crystal oscillator are grounded through capacitor C109 and capacitor C110, respectively.

[0012] In a preferred embodiment of this utility model, the data processing circuit further includes a reference voltage circuit connected to the analog-to-digital converter chip. The reference voltage circuit includes a reference voltage chip, and the negative and positive pins of the reference voltage chip are connected through a capacitor C116. The two ends of the capacitor C116 are connected to the REF_IN+ and REF_IN- nodes of the analog-to-digital converter chip through resistors R94 and R95, respectively. The positive pin of the reference voltage chip is also connected to the power supply AVCC_5V through a resistor R93.

[0013] In a preferred embodiment of this utility model, the control chip used is an STM32H743VIT6.

[0014] The differential operational amplifier chip used in the current sampling circuit is model INA2180A2IDGKR;

[0015] The power supply chip used in the voltage output circuit is model LM2596-ADJ;

[0016] The analog-to-digital converter chip used in the data processing circuit is model TM7705;

[0017] The reference voltage chip used in the reference voltage circuit is model LM385-2.5;

[0018] The USB interface connector is a USB-TAPY-A female connector.

[0019] Compared with the prior art, the beneficial effects achieved by this utility model are as follows:

[0020] This utility model discloses a device that can automatically identify products, adjust the output voltage to the range required by the product under test, collect current and amplify signals, reduce manual intervention, and complete identification and measurement in one step.

[0021] 1. By controlling the voltage output circuit, the magnitude of the device's external output voltage and whether to start output can be adjusted. At the same time, the data processing circuit can acquire the voltage value and provide it to other functional modules.

[0022] 2. When the product under test is connected, the current sampling circuit can acquire the current signal, amplify the signal and send it to the data processing circuit. The data processing circuit performs data analysis and obtains the real-time current value of the product under test. The magnitude of the current value determines whether the product under test is connected.

[0023] 3. During the current test, the product under test is connected to the test equipment via USB. The USB interface of the product under test has reserved SWD protocol interface pins. The standard USB 2.0 data communication pins D+ and D- are mapped to SWDIO and SWDCLK functions. The unique ID of the product control unit is read through the SWD protocol to realize the identification of the product. Attached Figure Description

[0024] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0025] Figure 1 This is a schematic diagram of the system framework of a product identification and current measurement device according to the present invention;

[0026] Figure 2 This is a schematic diagram of the USB interface circuit and current sampling circuit of a product identification and current measurement device according to this utility model;

[0027] Figure 3 This is a schematic diagram of the voltage output circuit of a product identification and current measurement device according to this utility model;

[0028] Figure 4 This is a schematic diagram of the data processing circuit of a product identification and current measurement device according to this utility model. Figure 1 ;

[0029] Figure 5 This is a schematic diagram of the data processing circuit of a product identification and current measurement device according to this utility model. Figure 2 .

[0030] Figure 6 This is a schematic diagram of the connection of the control chip of a product identification and current measurement device according to this utility model. Detailed Implementation

[0031] The present invention will now be described in detail with reference to the accompanying drawings and specific embodiments. It should be understood that the embodiments of the present invention and the specific features therein are detailed descriptions of the present invention, rather than limitations thereof. In the absence of conflict, the embodiments of the present invention and the technical features therein can be combined with each other.

[0032] The term "and / or" simply describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone. Additionally, the character " / " generally indicates that the preceding and following related objects have an "or" relationship. Example 1

[0033] like Figure 1As shown, a product identification and current measurement device includes: a data processing circuit, and a voltage output circuit, a current sampling circuit, and a USB interface circuit electrically connected to the data processing circuit; the voltage output circuit, the data processing circuit, and the current sampling circuit are respectively electrically connected to the USB interface circuit; the data processing circuit is connected to the voltage output circuit, and the voltage output circuit supplies power to the USB interface circuit; the USB interface circuit is used to connect the data processing circuit and the product under test; the input terminal of the current sampling circuit is electrically connected to the USB interface circuit, and the output terminal of the current sampling circuit is electrically connected to the data processing circuit, and the current sampling circuit feeds back the current signal collected on the USB interface circuit to the data processing circuit. Example 2

[0034] like Figures 1-6 As shown, a product identification and current measurement device includes: a data processing circuit, and a voltage output circuit, a current sampling circuit, and a USB interface circuit electrically connected to the data processing circuit; the voltage output circuit, the data processing circuit, and the current sampling circuit are all electrically connected to the USB interface circuit; the data processing circuit is connected to the voltage output circuit, and the voltage output circuit supplies power to the USB interface circuit; the USB interface circuit is used to connect the data processing circuit and the product under test; the input terminal of the current sampling circuit is electrically connected to the USB interface circuit, and the output terminal of the current sampling circuit is electrically connected to the data processing circuit, and the current sampling circuit feeds back the current signal collected on the USB interface circuit to the data processing circuit. The data processing circuit, voltage output circuit, current sampling circuit, and USB interface circuit are all electrically connected to the control chip in the control system. The control chip used is an STM32H743VIT6.

[0035] Specifically, the USB interface circuit includes: a USB interface connector; the VBUS terminal of the USB interface connector serves as the power supply VCC_USB1 node, and the VBUS terminal of the USB interface connector is also grounded through parallel ripple capacitors C1 and C2; the D- terminal of the USB interface connector is the SWDCLK pin as the clock pulse input segment; the D+ terminal of the USB interface connector is the SWDIO1 pin as the bidirectional data transmission terminal; the SH terminal of the USB interface connector is floating; and the GND terminal of the USB interface connector is grounded through resistor R92. Furthermore, in this embodiment, ripple capacitors C113 and C114 are used to reduce ripple voltage, filter out high-frequency interference, and ensure a relatively stable voltage supplied to the product. The USB interface in the USB interface circuit uses a USB-TAPY-A female connector.

[0036] Specifically, the current sampling circuit includes a differential operational amplifier (op-amp) chip. The IN-1 and IN+1 input pins of the op-amp chip are connected to the two ends of resistor R92, respectively. The VS pin of the op-amp chip is connected to the AVCC_5V power supply through resistor R91, and is also grounded through capacitor C115. The GND pin of the op-amp chip is grounded, and the OUT1 output pin is electrically connected to the CC1_ADC node and the data processing circuit. Furthermore, in this embodiment, current sampling and amplification are performed using a sampling resistor and differential op-amp. Therefore, the sampling resistor R92 is set at the low end to ensure better differential amplification and output of the differential signal when it is fed into the op-amp chip. For the D+ and D- signals of the USB interface, which are externally connected to the SWD interface of the product under test (DUT), this signal needs to be connected to the control system internally so that the control system can complete the data interaction with the DUT. The differential operational amplifier chip used in the current sampling circuit is model INA2180A2IDGKR.

[0037] Specifically, the voltage output circuit includes: a power supply chip, with its GND pin grounded; its VIN pin serving as the PWR node, connected to ground via parallel capacitors C104 and C105; its ON / OFF pin serving as the CC1_CTR pin; two output pins of the power supply chip, one connected to ground via Zener diode D13, and the other connected to the VCC_USB1 node via inductor L9; the output of inductor L9 connected to ground via parallel capacitors C107 and C108; two FB pins of the power supply chip, one connected to ground via resistor R82, and the other connected to the VCC_USB1 node via resistor R83; a capacitor C102 connected in parallel with resistor R83; the connection point of resistors R82 and R83 connected to the CV1 node via series resistors R80 and R79; and the connection point of resistors R80 and R79 connected to the ground point of resistor R82 via flashlight C101. Furthermore, the voltage output is achieved using a DC-DC power supply chip. This method allows adjustment of the power supply chip's output voltage by modifying the voltage relationship between the output voltage VCC_USB1 and the voltage at the FB node of the power supply chip, i.e., the resistance values ​​of resistors R82 and R83. Typically, one of the resistors is replaced with an adjustable potentiometer to achieve voltage regulation. The power supply chip used in the voltage output circuit is model LM2596-ADJ.

[0038] Specifically, the data processing circuit includes: an analog-to-digital converter (ADC) chip, whose VDD pin is connected to the AVCC_5V power supply, and is also grounded through parallel capacitors C111 and C112; the ADC chip's GND pin is grounded; a resistor R90 is connected in parallel between the ADC chip's MCLK_IN and MCLK_OUT pins, and a crystal oscillator circuit is connected in parallel across the resistor R90, and grounded through the crystal oscillator circuit. Further, the crystal oscillator circuit includes a crystal oscillator connected in parallel across the resistor R90, with its two ends grounded through capacitors C109 and C110 respectively. A capacitor C103 is connected in parallel between the AIN1+ and AIN1- pins of the analog-to-digital converter (ADC) chip. A resistor R84 is connected in parallel across the two ends of capacitor C103. One end of resistor R84 is connected to the CC1_ADC node via resistor R87, and the other end of resistor R84 is grounded via resistor R85. A capacitor C106 is connected in parallel between the AIN2- and AIN2+ pins of the ADC chip. A resistor R88 is connected in parallel across the two ends of capacitor C106. One end of resistor R88 is grounded via resistor R86, and the other end of resistor R88 is connected to the VCC_USB1 node via resistor R89. The pin is connected to the AVCC_5V power supply; the analog-to-digital converter chip... The pin is the ADC_RDY_CHIPC node; the analog-to-digital converter chip's... The pins are connected to the ADC_CS1_CHIPC node; the SCLK pin of the analog-to-digital converter (ADC) chip is connected to the ADC_SCLK_PE2 node; the DIN pin of the ADC chip is connected to the ADC_MOSI_PE6 node; the DOUT pin of the ADC chip is connected to the ADC_MISO_PE5 node; the REFIN+ pin of the ADC chip is connected to the REF_IN+ node; and the REFIN- pin of the ADC chip is connected to the REF_IN- node. More specifically, the data processing circuit also includes a reference voltage circuit connected to the ADC chip. The reference voltage circuit includes a reference voltage chip, and the negative and positive pins of the reference voltage chip are connected through a capacitor C116. The two ends of the capacitor C116 are connected to the REF_IN+ and REF_IN- nodes of the ADC chip through resistors R94 and R95, respectively. The positive pin of the reference voltage chip is also connected to the power supply AVCC_5V through resistor R93.

[0039] The analog-to-digital converter chip used in the data processing circuit is model TM7705. The reference voltage chip used in the reference voltage circuit is model LM385-2.5.

[0040] Furthermore, the data processing circuit uses an analog-to-digital converter to convert analog voltage and current magnitudes into digital signals for use by the control system. The reference voltage circuit provides a high-precision voltage reference for the ADC chip, improving the accuracy of the converted data. By adjusting the resistance values ​​of resistors R84-R87 and coordinating with the internal gain of the ADC chip, different input voltage values ​​and measurement accuracies can be accommodated. Example 3

[0041] like Figures 1-6 As shown, a product identification and current measurement device includes: a data processing circuit, and a voltage output circuit, a current sampling circuit, and a USB interface circuit electrically connected to the data processing circuit; the voltage output circuit, the data processing circuit, and the current sampling circuit are all electrically connected to the USB interface circuit; the data processing circuit is connected to the voltage output circuit, and the voltage output circuit supplies power to the USB interface circuit; the USB interface circuit is used to connect the data processing circuit and the product under test; the input terminal of the current sampling circuit is electrically connected to the USB interface circuit, and the output terminal of the current sampling circuit is electrically connected to the data processing circuit, and the current sampling circuit feeds back the current signal collected on the USB interface circuit to the data processing circuit. The data processing circuit, voltage output circuit, current sampling circuit, and USB interface circuit are all electrically connected to the control chip in the control system. The control chip used is an STM32H743VIT6.

[0042] Specifically, the USB interface circuit includes: a USB interface connector; the VBUS terminal of the USB interface connector serves as the power supply VCC_USB1 node, and the VBUS terminal of the USB interface connector is also grounded through parallel ripple capacitors C1 and C2; the D- terminal of the USB interface connector is the SWDCLK pin as the clock pulse input segment; the D+ terminal of the USB interface connector is the SWDIO1 pin as the bidirectional data transmission terminal; the SH terminal of the USB interface connector is floating; and the GND terminal of the USB interface connector is grounded through resistor R92. Furthermore, in this embodiment, ripple capacitors C113 and C114 are used to reduce ripple voltage, filter out high-frequency interference, and ensure a relatively stable voltage supplied to the product. The USB interface in the USB interface circuit uses a USB-TAPY-A female connector. During the current testing process, the product under test (DUT) is connected to the testing equipment via USB. The DUT's USB interface has reserved SWD protocol interface pins. The standard USB 2.0 data communication pins D+ and D- are mapped to SWDIO and SWDCLK functions. The unique ID of the product control unit is read through the SWD protocol to achieve product identification. Furthermore, the SWD protocol adopts the existing SWD protocol. The specific SWD protocol content will not be elaborated here; it is sufficient that the unique ID of the product control unit can be read through the SWD protocol to achieve product identification.

[0043] Specifically, the current sampling circuit includes a differential operational amplifier (op-amp) chip. The IN-1 and IN+1 input pins of the op-amp chip are connected to the two ends of resistor R92, respectively. The VS pin of the op-amp chip is connected to the AVCC_5V power supply through resistor R91, and is also grounded through capacitor C115. The GND pin of the op-amp chip is grounded, and the OUT1 output pin is electrically connected to the CC1_ADC node and the data processing circuit. Furthermore, in this embodiment, current sampling and amplification are performed using a sampling resistor and differential op-amp. Therefore, the sampling resistor R92 is set at the low end to ensure better differential amplification and output of the differential signal when it is fed into the op-amp chip. For the D+ and D- signals of the USB interface, which are externally connected to the SWD interface of the product under test (DUT), this signal needs to be connected to the control system internally so that the control system can complete the data interaction with the DUT. The differential operational amplifier chip used in the current sampling circuit is model INA2180A2IDGKR.

[0044] Specifically, the voltage output circuit includes: a power supply chip, with its GND pin grounded; its VIN pin serving as the PWR node, connected to ground via parallel capacitors C104 and C105; its ON / OFF pin serving as the CC1_CTR pin; two output pins of the power supply chip, one connected to ground via Zener diode D13, and the other connected to the VCC_USB1 node via inductor L9; the output of inductor L9 connected to ground via parallel capacitors C107 and C108; two FB pins of the power supply chip, one connected to ground via resistor R82, and the other connected to the VCC_USB1 node via resistor R83; a capacitor C102 connected in parallel with resistor R83; the connection point of resistors R82 and R83 connected to the CV1 node via series resistors R80 and R79; and the connection point of resistors R80 and R79 connected to the ground point of resistor R82 via flashlight C101. Furthermore, the voltage output is achieved using a DC-DC power supply chip. This method allows adjustment of the power chip's output voltage by adjusting the relationship between the output voltage VCC_USB1 and the voltage at the FB node of the power chip, i.e., the resistance values ​​of resistors R82 and R83. In this embodiment, resistors R79 and R80, and capacitor C101 are added at the output FB node. After adding these components, when the power chip U23 is operating normally, the average voltage at the FB node is constant. This voltage is provided by two parts: the first part is the output voltage of the power chip U23, i.e., VCC_USB1; the second part is the CV1 node. These two parts can be considered as two independent voltage sources. By using the superposition theorem, the relationship between the output voltage VCC_USB1 and CV1 can be obtained. By changing the voltage at the CV1 node, the voltage regulation function is achieved. The power chip used in the voltage output circuit is model LM2596-ADJ.

[0045] Specifically, the data processing circuit includes: an analog-to-digital converter (ADC) chip, whose VDD pin is connected to the AVCC_5V power supply, and is also grounded through parallel capacitors C111 and C112; the ADC chip's GND pin is grounded; a resistor R90 is connected in parallel between the ADC chip's MCLK_IN and MCLK_OUT pins, and a crystal oscillator circuit is connected in parallel across the resistor R90, and grounded through the crystal oscillator circuit. Further, the crystal oscillator circuit includes a crystal oscillator connected in parallel across the resistor R90, with its two ends grounded through capacitors C109 and C110 respectively. A capacitor C103 is connected in parallel between the AIN1+ and AIN1- pins of the analog-to-digital converter (ADC) chip. A resistor R84 is connected in parallel across the two ends of capacitor C103. One end of resistor R84 is connected to the CC1_ADC node via resistor R87, and the other end of resistor R84 is grounded via resistor R85. A capacitor C106 is connected in parallel between the AIN2- and AIN2+ pins of the ADC chip. A resistor R88 is connected in parallel across the two ends of capacitor C106. One end of resistor R88 is grounded via resistor R86, and the other end of resistor R88 is connected to the VCC_USB1 node via resistor R89. The pin is connected to the AVCC_5V power supply; the analog-to-digital converter chip... The pin is the ADC_RDY_CHIPC node; the analog-to-digital converter chip's... The pins are connected to the ADC_CS1_CHIPC node; the SCLK pin of the analog-to-digital converter (ADC) chip is connected to the ADC_SCLK_PE2 node; the DIN pin of the ADC chip is connected to the ADC_MOSI_PE6 node; the DOUT pin of the ADC chip is connected to the ADC_MISO_PE5 node; the REFIN+ pin of the ADC chip is connected to the REF_IN+ node; and the REFIN- pin of the ADC chip is connected to the REF_IN- node. More specifically, the data processing circuit also includes a reference voltage circuit connected to the ADC chip. The reference voltage circuit includes a reference voltage chip, with its negative and positive pins connected via capacitor C116. The two ends of capacitor C116 are connected to the REF_IN+ and REF_IN- nodes of the ADC chip via resistors R94 and R95, respectively. The positive pin of the reference voltage chip is also connected to the AVCC_5V power supply via resistor R93. The ADC chip used in the data processing circuit is the TM7705. The reference voltage chip used in the reference voltage circuit is model LM385-2.5.

[0046] Furthermore, the data processing circuit uses an analog-to-digital converter to convert analog voltage and current magnitudes into digital signals for use by the control system. The reference voltage circuit provides a high-precision voltage reference for the ADC chip, improving the accuracy of the converted data. By adjusting the resistance values ​​of resistors R84-R87 and coordinating with the internal gain of the ADC chip, different input voltage values ​​and measurement accuracies can be accommodated. Example 4

[0047] Based on Embodiment 3, the voltage output circuit uses a DC-DC power supply chip. This method adjusts the output voltage of the power supply chip by adjusting the voltage relationship between the output voltage VCC_USB1 and the voltage of the FB node of the power supply chip, i.e., the resistance values ​​of resistors R82 and R83. In this embodiment, resistors R79 and R80 and capacitor C101 are added at the output FB node. After adding these components, when the power supply chip U23 is working normally, the average voltage of the FB node is a constant. This voltage is provided by two parts: the first part is the output voltage of the power supply chip U23, i.e., VCC_USB1; the second part is the CV1 node. These two parts can be regarded as two independent voltage sources. By using the superposition theorem, the relationship between the output voltage VCC_USB1 and CV1 can be obtained. By changing the voltage of the CV1 node, the voltage regulation function is achieved. The CV1 node can be regulated by PWM. Through the data processing section, the control system can obtain the current voltage value in real time and adjust the voltage of CV1 to achieve accurate voltage regulation. Example 5

[0048] Based on Embodiment 3, the voltage output circuit uses a DC-DC power supply chip. This method adjusts the output voltage of the power supply chip by adjusting the voltage relationship between the output voltage VCC_USB1 and the voltage of the FB node of the power supply chip, i.e., the resistance values ​​of resistors R82 and R83. In this embodiment, resistors R79 and R80 and capacitor C101 are added at the output FB node. After adding these components, when the power supply chip U23 is working normally, the average voltage of the FB node is constant. This voltage is provided by two parts: the first part is the output voltage of the power supply chip U23, i.e., VCC_USB1; the second part is the CV1 node. These two parts can be regarded as two independent voltage sources. By using the superposition theorem, the relationship between the output voltage VCC_USB1 and CV1 can be obtained. By changing the voltage of the CV1 node, the voltage regulation function is achieved. The voltage of the CV1 node can be regulated by using analog voltage devices such as DACs. Through the data processing section, the control system can obtain the current voltage value in real time and adjust the voltage of CV1 to achieve accurate voltage regulation. Example 6

[0049] Based on any of the embodiments in Examples 3 to 5, in the voltage output circuit, after the current test is completed, the product under test (DUT) needs to undergo other functional tests. To avoid affecting these tests while charging, the power supply to the DUT needs to be cut off after the current test. The enable control pin of the power chip can effectively achieve this function. Power supply control can be achieved through CC1_CTR.

[0050] Working principle:

[0051] This utility model discloses a device that can automatically identify products, adjust the output voltage to the required range of the product under test, collect current and amplify the signal, reducing manual intervention and completing identification and measurement in one step. By controlling the voltage output circuit, the device can adjust the output voltage and whether to start output. Simultaneously, the data processing circuit acquires the voltage value and provides it to other functional modules. When the product under test is connected, the current sampling circuit acquires the current signal, amplifies it, and sends it to the data processing circuit. The data processing circuit analyzes the data to obtain the real-time current value of the product under test, and the magnitude of the current value determines whether the product under test is connected. During current testing, the product under test is connected to the testing equipment via USB. The USB interface of the product under test has reserved SWD protocol interface pins. The standard USB 2.0 data communication pins D+ and D- are mapped to SWDIO and SWDCLK functions. The unique ID of the product control unit is read through the SWD protocol to achieve product identification.

[0052] Based on the preferred embodiments of this utility model, and through the above description, those skilled in the art can make various changes and modifications without departing from the inventive concept. The technical scope of this invention is not limited to the contents of the specification, but must be determined according to the claims.

Claims

1. A product identification and current measurement device, characterized in that, include: Data processing circuit, voltage output circuit, current sampling circuit, USB interface circuit; The data processing circuit is connected to the voltage output circuit, and the voltage output circuit supplies power to the USB interface circuit. The USB interface circuit is used to connect the data processing circuit and the product under test. The input terminal of the current sampling circuit is electrically connected to the USB interface circuit, and the output terminal of the current sampling circuit is electrically connected to the data processing circuit. The current sampling circuit feeds back the current signal collected on the USB interface circuit to the data processing circuit.

2. The product identification and current measurement device according to claim 1, characterized in that: The USB interface circuit includes: a USB connector, the VBUS terminal of which serves as the power supply VCC_USB1 node, and the VBUS terminal of the USB interface connector is also grounded through parallel ripple capacitors C1 and C2; the D- terminal of the USB interface connector is the SWDCLK pin, which serves as the clock pulse input terminal and is connected to the PD1 pin of the control chip of the external control system; the D+ terminal of the USB interface connector is the SWDIO1 pin, which serves as the bidirectional data transmission terminal and is connected to the PD2 pin of the control chip; the SH terminal of the USB interface connector is left floating; and the GND terminal of the USB interface connector is grounded through resistor R92.

3. The product identification and current measurement device according to claim 2, characterized in that: The current sampling circuit includes: a differential operational amplifier chip; the input pin IN-1 and input pin IN+1 of the differential operational amplifier chip are respectively connected to the two ends of resistor R92, the VS pin of the differential operational amplifier chip is connected to the power supply AVCC_5V through resistor R91, the VS pin of the differential operational amplifier chip is also grounded through capacitor C115; the GND pin of the differential operational amplifier chip is grounded, and the output pin OUT1 of the differential operational amplifier chip is electrically connected to the CC1_ADC node and the data processing circuit.

4. The product identification and current measurement device according to claim 3, characterized in that: The voltage output circuit includes: a power supply chip, whose GND pin is grounded; its VIN pin is a PWR node, and the PWR node is grounded through parallel capacitors C104 and C105; the power supply chip's ON / OFF pin serves as the CC1_CTR pin; the power supply chip's output pin has two leads, one of which is grounded through a Zener diode D13, and the other is connected to the VCC_USB1 node through inductor L9; the output of inductor L9 is grounded through parallel capacitors C107 and C108; and the power supply chip's FB pin... Two paths are led out from the pin. One path is grounded through resistor R82, and the other path is connected to the VCC_USB1 node through resistor R83. A capacitor C102 is connected in parallel with resistor R83. The connection point of resistors R82 and R83 is led out through resistors R80 and R79 in series to form the CV1 node. The CV1 node is connected to the PB7 pin of the control chip. The control chip generates a PWM signal to regulate the voltage of the CV1 node. The connection point of resistors R80 and R79 is grounded at the same point as the ground terminal of resistor R82 through capacitor C101.

5. The product identification and current measurement device according to claim 4, characterized in that: The data processing circuit includes: an analog-to-digital converter (ADC) chip, whose VDD pin is connected to a power supply AVCC_5V, and whose VDD pin is also grounded through parallel capacitors C111 and C112; the ADC chip's GND pin is grounded; a resistor R90 is connected in parallel between the ADC chip's MCLK_IN and MCLK_OUT pins, and a crystal oscillator circuit is connected in parallel across the resistor R90 and grounded through the crystal oscillator circuit; and the ADC chip's AIN1+ and AIN1- pins... A capacitor C103 is connected in parallel between the AIN2- and AIN2+ pins of the analog-to-digital converter chip, and a resistor R84 is connected in parallel across the two ends of the capacitor C103. One end of the resistor R84 is connected to the CC1_ADC node through a resistor R87, and the other end of the resistor R84 is grounded through a resistor R85. A capacitor C106 is connected in parallel between the AIN2- and AIN2+ pins of the analog-to-digital converter chip, and a resistor R88 is connected in parallel across the two ends of the capacitor C106. One end of the resistor R88 is grounded through a resistor R86, and the other end of the resistor R88 is connected to the VCC_USB1 node through a resistor R89. The pin is pulled up to the AVCC_5V power supply through resistor R81; the analog-to-digital converter chip's... The pin is the ADC_RDY_CHIPC node, which is connected to the PE8 pin of the control chip; The pin is connected to the ADC_CS1_CHIPC node, which is connected to the PE7 pin of the control chip; the SCLK pin of the analog-to-digital converter chip is connected to the ADC_SCLK_PE2 node, which is connected to the PE2 pin of the control chip; the DIN pin of the analog-to-digital converter chip is connected to the ADC_MOSI_PE6 node, which is connected to the PE6 pin of the control chip; the DOUT pin of the analog-to-digital converter chip is connected to the ADC_MISO_PE5 node, which is connected to the PE5 pin of the control chip; the REFIN+ pin of the analog-to-digital converter chip is the REF_IN+ node; the REFIN- pin of the analog-to-digital converter chip is the REF_IN- node; the REF_IN+ and REF_IN- nodes are connected to the positive and negative output nodes of the reference voltage circuit.

6. The product identification and current measurement device according to claim 5, characterized in that: The crystal oscillator circuit includes a crystal oscillator connected in parallel across the resistor R90, with the two ends of the crystal oscillator grounded through capacitors C109 and C110, respectively.

7. The product identification and current measurement device according to claim 6, characterized in that: The data processing circuit also includes a reference voltage circuit connected to the analog-to-digital converter chip. The reference voltage circuit includes a reference voltage chip, and the negative and positive pins of the reference voltage chip are connected by a capacitor C116. The two ends of the capacitor C116 are connected to the REF_IN+ and REF_IN- nodes of the analog-to-digital converter chip through resistors R94 and R95, respectively. The positive pin of the reference voltage chip is also connected to the power supply AVCC_5V through resistor R93.

8. The product identification and current measurement device according to claim 5, characterized in that: The control chip used is model STM32H743VIT6; The differential operational amplifier chip used in the current sampling circuit is model INA2180A2IDGKR; The power supply chip used in the voltage output circuit is model LM2596-ADJ; The analog-to-digital converter chip used in the data processing circuit is model TM7705; The reference voltage chip used in the reference voltage circuit is model LM385-2.5; The USB interface connector is a USB-TAPY-A female connector.

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