LED chip and light-emitting device
By optimizing the structural parameters of the LED chip and reducing the number of light reflections between the N electrode and the Mesa step structure, the problem of low luminous efficiency in the existing technology is solved, and a simplified process is achieved to improve luminous efficiency.
Patent Information
- Application Number
- CN202423053522.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-11
- Publication Date
- 2026-01-23
- Estimated Expiration
- 2034-12-11
AI Technical Summary
In existing technologies, the luminous efficiency of LED chips suffers from light energy loss due to carrier recombination, and existing solutions for improving luminous efficiency are complex and difficult to achieve significant improvements while simplifying the process.
By optimizing the structural parameters of the LED chip, including the distance, height, and sidewall angle between the N electrode and the Mesa step structure, the number of light reflections is reduced, thus lowering light loss.
Without adding any extra process steps, the luminous efficiency of LED chips can be increased by 0.3%-1.0%, achieving a simple and effective improvement in luminous efficiency.
Smart Images

Figure CN223829720U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of LED, in particular to an LED chip and a light emitting device. BACKGROUND
[0002] LED (light Emitting Diode) is a widely used lighting lamp in the world market, which has the advantages of small size, high brightness, low power consumption, low heat generation, long service life, environmental protection, etc., and has a rich variety of color types, which is deeply loved by consumers. At the same time, as a backlight source, LED chip plays an indispensable role in electronic products such as mobile phones and televisions that require display screens. With the continuous reduction in the size of electronic products, it is also required that the size of LED chips be greatly reduced. Therefore, major LED chip manufacturers around the world have been committed to developing high-efficiency chip structures.
[0003] However, the light energy generated by the carrier recombination of the LED chip is often lost due to multiple reflections and multiple absorptions inside the LED chip, resulting in a decrease in the light emitting efficiency of the final LED chip. In the prior art, the schemes for improving the light emitting efficiency include surface roughening, improving the reflectivity of the reflection layer, and reducing the interface total reflection. Although these schemes can effectively improve the light emitting efficiency of the LED chip, the implementation schemes are relatively complex. For example, surface roughening involves micro-nano etching and other processing technologies; improving the reflectivity of the reflection layer may involve the deposition and surface passivation of Ag, Al and other reflective metals; and reducing the interface total reflection often requires the deposition of a high refractive index inorganic passivation layer such as SiN.
[0004] Therefore, how to optimize the structure of the LED chip to provide a simple implementation scheme and improve the light emitting efficiency of the LED chip is a technical problem that needs to be solved by those skilled in the art. CONTENT OF THE INVENTION
[0005] In view of the above problems, the present application provides an LED chip and a light emitting device, which achieve the purpose of simple implementation and improved light emitting efficiency of the LED chip. The specific scheme is as follows:
[0006] The first aspect of the present application provides an LED chip, which comprises:
[0007] a substrate;
[0008] an epitaxial wafer located on one side of the substrate, the epitaxial wafer comprising an N-type semiconductor layer, a multi-quantum well layer and a P-type semiconductor layer which are sequentially stacked on the substrate;
[0009] The epitaxial wafer has grooves that expose a portion of the surface of the N-type semiconductor layer to form a Mesa step structure on the epitaxial wafer;
[0010] The N electrode is located within the groove;
[0011] The structural parameters of the LED chip include the distance between the bottom of the N electrode and the sidewall of the Mesa step structure, the height of the Mesa step structure, the height of the N electrode, and the sidewall angle of the N electrode facing the Mesa step structure.
[0012] At least one of the structural parameters of the LED chip is optimized to reduce the number of light reflections between the N electrode and the Mesa step structure.
[0013] Preferably, in the above-mentioned LED chip, at least one of the structural parameters of the LED chip is optimized based on the performance parameters of the LED chip.
[0014] Preferably, in the above-mentioned LED chip, the performance parameter of the LED chip is current density;
[0015] When the current density is less than 0.1 mA / mil 2 At that time, the distance between the bottom of the N electrode and the sidewall of the Mesa stepped structure ranges from 9 μm to 15 μm.
[0016] Preferably, in the above-mentioned LED chip, the performance parameter of the LED chip is current density;
[0017] When the current density is greater than or equal to 0.1 mA / mil 2 And less than or equal to 0.2 mA / mil 2 At that time, the distance between the bottom of the N electrode and the sidewall of the Mesa stepped structure ranges from 6μm to 12μm.
[0018] Preferably, in the above-mentioned LED chip, the performance parameter of the LED chip is current density;
[0019] When the current density is greater than 0.2 mA / mil 2 At that time, the distance between the bottom of the N electrode and the sidewall of the Mesa stepped structure ranges from 3μm to 9μm.
[0020] Preferably, in the above-mentioned LED chip, the performance parameter of the LED chip is current density;
[0021] When the current density is less than 0.2 mA / mil 2 At that time, the height of the N electrode ranged from 16,000 angstroms to 20,000 angstroms.
[0022] Preferably, in the above-mentioned LED chip, the performance parameter of the LED chip is current density;
[0023] When the current density is less than 0.2 mA / mil 2 At that time, the sidewall angle of the N electrode facing the Mesa stepped structure is in the range of 50°-70°.
[0024] Preferably, in the above-mentioned LED chip, the performance parameter of the LED chip is current density;
[0025] When the current density is greater than or equal to 0.2 mA / mil 2 At that time, the height of the N electrode ranged from 25,000 angstroms to 30,000 angstroms.
[0026] Preferably, in the above-mentioned LED chip, the performance parameter of the LED chip is current density;
[0027] When the current density is greater than or equal to 0.2 mA / mil 2 At that time, the sidewall angle of the N electrode facing the Mesa stepped structure is in the range of 70°-90°.
[0028] Preferably, in the above-mentioned LED chip, the height range of the Mesa step structure is 11,000 angstroms to 13,000 angstroms.
[0029] A second aspect of this application provides a light-emitting device, the light-emitting device comprising the LED chip described in any of the preceding claims.
[0030] By employing the above technical solution, this application provides an LED chip and a light-emitting device. The structural parameters of the LED chip include the distance between the bottom of the N electrode and the sidewall of the Mesa step structure, the height of the Mesa step structure, the height of the N electrode, and the sidewall angle of the N electrode facing the Mesa step structure. Compared with the prior art, the technical solution of this application does not involve additional process steps. Based on the structure of the LED chip, it is only necessary to optimize at least one of the structural parameters of the LED chip to reduce the number of light reflections between the N electrode and the Mesa step structure, reduce the light loss of the N electrode, and achieve the goal of simple implementation and improved luminous efficiency of the LED chip. Attached Figure Description
[0031] The above and other features, advantages, and aspects of the embodiments of this disclosure will become more apparent from the accompanying drawings and the following detailed description. Throughout the drawings, the same or similar reference numerals denote the same or similar elements. It should be understood that the drawings are schematic, and the originals and elements are not necessarily drawn to scale.
[0032] Figure 1 This is a schematic diagram of the structure of an LED chip provided in an embodiment of the present utility model;
[0033] Figure 2 This is a schematic diagram of another LED chip structure provided in an embodiment of the present utility model;
[0034] Figure 3 A schematic flowchart illustrating a method for fabricating an LED chip according to an embodiment of this utility model;
[0035] Figures 4-8 for Figure 3 A partial structural schematic diagram corresponding to the preparation method shown. Detailed Implementation
[0036] The embodiments of this application are described below with reference to the accompanying drawings. The terminology used in the implementation section of this application is only for explaining specific embodiments and is not intended to limit the application. Those skilled in the art will recognize that, with technological advancements and the emergence of new scenarios, the technical solutions provided in the embodiments of this application are also applicable to similar technical problems.
[0037] It should be noted that the directional terms appearing in this utility model are based on the relative positional relationships shown in the accompanying drawings and should not be taken as absolute limitations on this application.
[0038] To make the above-mentioned objectives, features and advantages of this utility model more apparent and understandable, the utility model will be further described in detail below with reference to the accompanying drawings and specific embodiments.
[0039] refer to Figure 1 , Figure 1 This is a schematic diagram of the structure of an LED chip provided in an embodiment of the present invention. The LED chip provided in this embodiment of the present invention includes: a substrate 11.
[0040] An epitaxial wafer located on one side of the substrate 11, the epitaxial wafer comprising an N-type semiconductor layer 12, a multiple quantum well layer 13 and a P-type semiconductor layer 14 sequentially stacked on the substrate 11.
[0041] The epitaxial wafer has a groove 15 that exposes a portion of the surface of the N-type semiconductor layer 12 to form a Mesa step structure on the epitaxial wafer.
[0042] The N electrode 16 is located within the groove 15.
[0043] The structural parameters of the LED chip include the distance L between the bottom of the N electrode 16 and the sidewall of the Mesa step structure, the height H1 of the Mesa step structure, the height H2 of the N electrode 16, and the sidewall angle β of the N electrode 16 facing the Mesa step structure.
[0044] At least one of the structural parameters of the LED chip is optimized to reduce the number of light reflections between the N electrode 16 and the Mesa step structure.
[0045] It should be noted that the height of the Mesa step structure can also be understood to some extent as the depth of the groove 15.
[0046] Specifically, in this embodiment of the invention, the structural parameters of the LED chip include the distance L between the bottom of the N electrode 16 and the sidewall of the Mesa step structure, the height H1 of the Mesa step structure, the height H2 of the N electrode 16, and the sidewall angle β of the N electrode 16 facing the Mesa step structure. Compared with the prior art, the technical solution of this application does not involve additional process steps. Based on the structure of the LED chip, it is only necessary to optimize at least one of the structural parameters of the LED chip to reduce the number of light reflections between the N electrode 16 and the Mesa step structure, reduce the light loss of the N electrode 16, and achieve the goal of simple implementation and improved luminous efficiency of the LED chip.
[0047] In an optional embodiment of this utility model, at least one of the structural parameters of the LED chip is optimized based on the performance parameters of the LED chip.
[0048] In an optional embodiment of this utility model, the performance parameter of the LED chip is current density.
[0049] When the current density is less than 0.1 mA / mil 2 At that time, the distance between the bottom of the N electrode 16 and the sidewall of the Mesa step structure is in the range of 9μm-15μm, that is, 9μm≤L≤15μm.
[0050] When the current density is greater than or equal to 0.1 mA / mil 2 And less than or equal to 0.2 mA / mil 2 At that time, the distance between the bottom of the N electrode 16 and the sidewall of the Mesa step structure is in the range of 6μm-12μm, that is, 6μm≤L≤12μm.
[0051] When the current density is greater than 0.2 mA / mil 2At that time, the distance between the bottom of the N electrode and the sidewall of the Mesa stepped structure is in the range of 3μm-9μm, that is, 3μm≤L≤9μm.
[0052] Specifically, the technical effects achievable by the technical solution of this application are described and illustrated in the embodiments of this utility model by comparison.
[0053] In the comparative scheme, the distance between the bottom of the N electrode and the sidewall of the Mesa step structure is 5 μm, the height of the Mesa step structure is 14,000 angstroms, the height of the N electrode is 30,000 angstroms, and the sidewall angle of the N electrode facing the Mesa step structure is 80°.
[0054] In a specific embodiment, the distance L between the bottom of the N electrode 16 and the sidewall of the Mesa step structure is 7 μm, the height H1 of the Mesa step structure is 14000 angstroms, the height H2 of the N electrode 16 is 30000 angstroms, and the sidewall angle β of the N electrode 16 facing the Mesa step structure is 80°.
[0055] Actual testing revealed that the current density of the LED chip was 0.1 mA / mil. 2 When the distance L between the bottom of the N electrode 16 and the sidewall of the Mesa stepped structure was adjusted from 5 μm to 7 μm, the luminous efficiency of the prepared LED chip increased by 0.8%.
[0056] In an optional embodiment of this utility model, the performance parameter of the LED chip is current density.
[0057] When the current density is less than 0.2 mA / mil 2 At that time, the height of the N electrode 16 ranges from 16,000 angstroms to 20,000 angstroms, that is, 16,000 angstroms ≤ H2 ≤ 20,000 angstroms.
[0058] When the current density is greater than or equal to 0.2 mA / mil 2 At that time, the height range of the N electrode 16 is 25,000 angstroms to 30,000 angstroms, that is, 25,000 angstroms ≤ H2 ≤ 30,000 angstroms.
[0059] Specifically, the technical effects achievable by the technical solution of this application are described and illustrated in the embodiments of this utility model by comparison.
[0060] In the comparative scheme, the distance between the bottom of the N electrode and the sidewall of the Mesa step structure is 5 μm, the height of the Mesa step structure is 14,000 angstroms, the height of the N electrode is 30,000 angstroms, and the sidewall angle of the N electrode facing the Mesa step structure is 80°.
[0061] In a specific embodiment, the distance L between the bottom of the N electrode 16 and the sidewall of the Mesa step structure is 5 μm, the height H1 of the Mesa step structure is 14000 angstroms, the height H2 of the N electrode 16 is 18000 angstroms, and the sidewall angle β of the N electrode 16 facing the Mesa step structure is 80°.
[0062] Actual testing revealed that the current density of the LED chip was 0.05 mA / mil. 2 When the height H2 of the N electrode 16 is adjusted from 30,000 angstroms to 18,000 angstroms, the luminous efficiency of the prepared LED chip is increased by 0.5%.
[0063] In an optional embodiment of this utility model, the performance parameter of the LED chip is current density.
[0064] When the current density is less than 0.2 mA / mil 2 At that time, the sidewall angle of the N electrode facing the Mesa step structure is in the range of 50°-70°, that is, 50°≤β≤70°.
[0065] When the current density is greater than or equal to 0.2 mA / mil 2 At that time, the sidewall angle of the N electrode facing the Mesa step structure is in the range of 70°-90°, that is, 70°≤β≤90°.
[0066] Specifically, the technical effects achievable by the technical solution of this application are described and illustrated in the embodiments of this utility model by comparison.
[0067] In the comparative scheme, the distance between the bottom of the N electrode and the sidewall of the Mesa step structure is 5 μm, the height of the Mesa step structure is 14,000 angstroms, the height of the N electrode is 30,000 angstroms, and the sidewall angle of the N electrode facing the Mesa step structure is 80°.
[0068] In a specific embodiment, the distance L between the bottom of the N electrode 16 and the sidewall of the Mesa step structure is 5 μm, the height H1 of the Mesa step structure is 14000 angstroms, the height H2 of the N electrode 16 is 30000 angstroms, and the sidewall angle β of the N electrode 16 facing the Mesa step structure is 60°.
[0069] Actual testing revealed that the current density of the LED chip was 0.05 mA / mil. 2 When the sidewall angle β of the N electrode 16 facing the Mesa stepped structure is adjusted from 80° to 60°, the luminous efficiency of the prepared LED chip will increase by 0.4%.
[0070] In an optional embodiment of this utility model, the height H1 of the Mesa step structure ranges from 11,000 angstroms to 13,000 angstroms.
[0071] Specifically, the technical effects achievable by the technical solution of this application are described and illustrated in the embodiments of this utility model by comparison.
[0072] In the comparative scheme, the distance between the bottom of the N electrode and the sidewall of the Mesa step structure is 5 μm, the height of the Mesa step structure is 14,000 angstroms, the height of the N electrode is 30,000 angstroms, and the sidewall angle of the N electrode facing the Mesa step structure is 80°.
[0073] In a specific embodiment, the distance L between the bottom of the N electrode 16 and the sidewall of the Mesa step structure is 5 μm, the height H1 of the Mesa step structure is 12000 angstroms, the height H2 of the N electrode 16 is 30000 angstroms, and the sidewall angle β of the N electrode 16 facing the Mesa step structure is 80°.
[0074] Actual testing revealed that the current density of the LED chip was 0.08 mA / mil. 2 When the height of the Mesa step structure H1 is adjusted from 14,000 angstroms to 12,000 angstroms, the luminous efficiency of the prepared LED chip increases by 0.3%.
[0075] As described above, the technical solution of this application improves the luminous efficiency of LED chips by optimizing the structural design of LED chips without adding extra production processes. The technical solution of this application can be implemented based on existing equipment and raw materials for LED chip production, thereby reducing the number of light reflections between the N electrode 16 and the Mesa step structure, reducing the light loss of the N electrode 16, and ultimately achieving the goal of a simple implementation scheme that can improve the luminous efficiency of LED chips.
[0076] It should be noted that the technical solution of this application is for high luminous efficiency LED chips operating at low current density. After optimization by the technical solution of this application, the luminous efficiency of the LED chip can be improved by 0.3%-1.0%.
[0077] In an optional embodiment of this utility model, reference is made to Figure 2 , Figure 2 A schematic diagram of another LED chip provided in an embodiment of the present invention. The LED chip provided in this embodiment of the present invention further includes:
[0078] A current spreading layer 17 is located on the side of the P-type semiconductor layer 14 away from the substrate 11.
[0079] The current blocking layer 18 and the P electrode 19 are located on the side of the current spreading layer 17 opposite to the substrate 11.
[0080] Specifically, in this embodiment of the invention, the material of the current spreading layer 17 includes, but is not limited to, ITO material; the material of the current blocking layer 18 includes, but is not limited to, SiO2 material; the material of the P electrode 19 can be the same as or different from the material of the N electrode 16; and the electrode material includes, but is not limited to, metal material.
[0081] It should be noted that the LED chip provided in this utility model embodiment may also include other functional film layers, such as surface passivation layer and DBR reflector. Since these functional film layers have not been improved in this application, they will not be described in detail here. Only the current spreading layer 17, the current blocking layer 18 and the P electrode 19 are shown as examples.
[0082] Based on the above embodiments of this utility model, another embodiment of this utility model also provides a method for preparing an LED chip, see reference. Figure 3 , Figure 3 This is a schematic flowchart illustrating a method for fabricating an LED chip according to an embodiment of the present invention. The method for fabricating an LED chip according to an embodiment of the present invention includes:
[0083] S101: As Figure 4 As shown, a substrate 11 is provided.
[0084] S102: As Figure 5 As shown, an epitaxial wafer is formed on one side of the substrate 11. The epitaxial wafer includes an N-type semiconductor layer 12, a multiple quantum well layer 13, and a P-type semiconductor layer 14 that are sequentially stacked on the substrate 11.
[0085] S103: As Figure 6 As shown, the epitaxial wafer is processed to give it a groove 15, which exposes a portion of the surface of the N-type semiconductor layer 12 to form a Mesa step structure on the epitaxial wafer.
[0086] Specifically, this step includes, but is not limited to, using a mixed solution of sulfuric acid and hydrogen peroxide. Figure 5 The prepared epitaxial wafer is cleaned and then etched to form a Mesa step structure.
[0087] S104: As Figure 7 As shown, a current spreading layer 17 is formed on the side of the P-type semiconductor layer 14 opposite to the substrate 11.
[0088] Specifically, this step includes, but is not limited to, fabricating a patterned current spreading layer 17 using methods such as deposition, photolithography, and etching.
[0089] S105: As Figure 8 As shown, a current blocking layer 18 is formed on the side of the current spreading layer 17 opposite to the substrate 11.
[0090] Specifically, this step includes, but is not limited to, fabricating a patterned current blocking layer 18 using methods such as deposition, photolithography, and etching.
[0091] S106: As Figure 2 As shown, an N-electrode 16 and a P-electrode 19 are fabricated. The N-electrode 16 is located within the groove 15, and the P-electrode 19 is located on the side of the current spreading layer 17 facing away from the substrate 11. The structural parameters of the LED chip include the distance L between the bottom of the N-electrode 16 and the sidewall of the Mesa step structure, the height H1 of the Mesa step structure, the height H2 of the N-electrode 16, and the sidewall angle β of the N-electrode 16 facing the Mesa step structure. At least one of the structural parameters of the LED chip is optimized to reduce the number of light reflections between the N-electrode 16 and the Mesa step structure.
[0092] Specifically, this step includes, but is not limited to, using a negative gel lift-off process to prepare the N electrode 16 and the P electrode 19.
[0093] Based on the above embodiments of the present invention, another embodiment of the present invention provides a light-emitting device, which includes the LED chip described in the above embodiments.
[0094] The present invention provides a detailed description of an LED chip and a light-emitting device. Specific examples have been used to illustrate the principle and implementation of the present invention. The description of the above embodiments is only for the purpose of helping to understand the method and core idea of the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation and application scope based on the idea of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.
[0095] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to the method section.
[0096] It should also be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that elements inherent to a process, method, article, or apparatus that comprises a list of elements, or elements inherent to such processes, methods, articles, or apparatus, are also included. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.
[0097] The above description of the disclosed embodiments enables those skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims
1. An LED chip, characterized in that, The LED chip includes: Substrate; An epitaxial wafer located on one side of the substrate, the epitaxial wafer comprising an N-type semiconductor layer, a multiple quantum well layer and a P-type semiconductor layer sequentially stacked on the substrate; The epitaxial wafer has grooves that expose a portion of the surface of the N-type semiconductor layer to form a Mesa step structure on the epitaxial wafer; The N electrode is located within the groove; The structural parameters of the LED chip include the distance between the bottom of the N electrode and the sidewall of the Mesa step structure, the height of the Mesa step structure, the height of the N electrode, and the sidewall angle of the N electrode facing the Mesa step structure. At least one of the structural parameters of the LED chip is optimized to reduce the number of light reflections between the N electrode and the Mesa step structure; At least one of the structural parameters of the LED chip is optimized based on the performance parameters of the LED chip; when the height of the Mesa step structure in the structural parameters of the LED chip is optimized, the height range of the Mesa step structure is 11000 angstroms to 13000 angstroms. The performance parameter of the LED chip is current density; The distance between the bottom of the N-electrode and the sidewall of the Mesa stepped structure in the structural parameters of the LED chip is optimized, and the current density is less than 0.1 mA / mil. 2 At that time, the distance between the bottom of the N electrode and the sidewall of the Mesa stepped structure ranges from 9 μm to 15 μm; Alternatively, the distance between the bottom of the N-electrode and the sidewall of the Mesa step structure in the structural parameters of the LED chip is optimized, and the current density is greater than or equal to 0.1 mA / mil. 2 And less than or equal to 0.2 mA / mil 2 At that time, the distance between the bottom of the N electrode and the sidewall of the Mesa stepped structure ranges from 6 μm to 12 μm; Alternatively, the distance between the bottom of the N-electrode and the sidewall of the Mesa step structure in the structural parameters of the LED chip is optimized, and when the current density is greater than 0.2 mA / mil 2 At that time, the distance between the bottom of the N electrode and the sidewall of the Mesa stepped structure ranges from 3 μm to 9 μm; Alternatively, the height of the N-electrode in the structural parameters of the LED chip is optimized, and when the current density is less than 0.2 mA / mil 2 At that time, the height of the N electrode ranged from 16,000 angstroms to 20,000 angstroms; Alternatively, the sidewall angle of the N electrode facing the Mesa step structure in the structural parameters of the LED chip is optimized, and when the current density is less than 0.2 mA / mil 2 At that time, the sidewall angle of the N electrode facing the Mesa stepped structure is in the range of 50°-70°; Alternatively, the height of the N-electrode in the structural parameters of the LED chip is optimized, and the current density is greater than or equal to 0.2 mA / mil. 2 At that time, the height of the N electrode ranged from 25,000 angstroms to 30,000 angstroms; Alternatively, the sidewall angle of the Mesa step structure on one side of the LED chip's structural parameters is optimized, and the current density is greater than or equal to 0.2 mA / mil. 2 At that time, the sidewall angle of the N electrode facing the Mesa stepped structure is in the range of 70°-90°.
2. A light-emitting device, characterized in that, The light-emitting device includes the LED chip as described in claim 1.