Voltage detection circuit

Abstract

The utility model discloses a voltage detection circuit, which belongs to the field of voltage detection and comprises a voltage sampling circuit, a voltage amplifying circuit and a voltage-to-current circuit which are connected in sequence, the voltage sampling circuit is connected with a voltage acquisition position, and acquired voltage is transmitted to the voltage-to-current circuit through the voltage amplifying circuit. And the voltage-to-current circuit is used for converting the acquired voltage into current and outputting the current. Signals are acquired from a voltage acquisition position, signal intensity is enhanced through the voltage amplification circuit, and finally voltage signals are converted into current signals to be output through the voltage-to-current circuit, so that accurate measurement of the voltage signals is realized, the phenomenon of attenuation when the transmission distance is long is reduced, the anti-interference capability in a high-frequency environment is enhanced, and the measurement accuracy is improved. And compatibility with other current input type detection equipment is facilitated.

Description

Technical Field

[0001] This utility model belongs to the field of voltage detection, specifically, it relates to a voltage detection circuit. Background Technology

[0002] In industrial applications, input voltage detection is crucial, playing a vital role in ensuring the safe operation of power systems, the normal functioning of equipment, and energy conservation. A well-designed voltage detection circuit ensures that products operate only within the normal input voltage range, preventing damage to components caused by excessively low or high input voltages. Common voltage detection circuits typically employ voltage output methods, with traditional methods often using voltage sensors or simple resistor dividers to measure voltage levels. However, these methods have inherent limitations, such as weak signals, susceptibility to interference, low measurement accuracy, and difficulty in compatibility with subsequent circuits. Furthermore, voltage signals attenuate over long transmission distances, and are particularly susceptible to interference in high-frequency environments.

[0003] In view of the above, this application is hereby submitted. Utility Model Content

[0004] The technical problem to be solved by this utility model is to overcome the shortcomings of the prior art and provide a voltage detection circuit.

[0005] To achieve the above objectives, the technical solution of this utility model is as follows:

[0006] A voltage detection circuit includes a voltage sampling circuit, a voltage amplification circuit, and a voltage-to-current conversion circuit connected in sequence. The voltage sampling circuit is connected to a voltage acquisition point. The acquired voltage is transmitted to the voltage-to-current conversion circuit through the voltage amplification circuit, and the voltage-to-current conversion circuit converts the acquired voltage into current for output.

[0007] Preferably, the voltage sampling circuit is connected to the input voltage and transmits the voltage signal to the voltage amplification circuit through output point A and output point B;

[0008] The voltage amplifier circuit includes a first operational amplifier U1, the non-inverting input terminal of the first operational amplifier U1 is connected to the output point A, and the negative-inverting input terminal of the first operational amplifier U1 is connected to the output point B.

[0009] Preferably, the voltage-to-current circuit includes an output point M, and a second operational amplifier U2, a first transistor Q1, and a second transistor Q2 are further disposed between the output point M and the voltage amplifier circuit;

[0010] The first transistor Q1 is an NPN transistor;

[0011] The second transistor Q2 is a PNP type transistor;

[0012] The non-inverting input terminal of the second operational amplifier U2 is connected to the output terminal of the first operational amplifier U1. The output terminal of the second operational amplifier U2 is simultaneously connected to the base of the first transistor Q1 and the second transistor Q2. The emitter of the first transistor Q1 and the collector of the second transistor Q2 are both connected to the input terminal of the output current control resistor R9. The output terminal of the output current control resistor R9 is connected to the output point M.

[0013] Preferably, the output point M is grounded after passing through the output load resistor R10;

[0014] Furthermore, the output point M is connected to the non-inverting input terminal of the second operational amplifier U2 via the third positive input resistor R6.

[0015] Preferably, the non-inverting input terminal of the second operational amplifier U2 is connected to the output terminal of the first operational amplifier U1 through the second positive input resistor R5;

[0016] The negative input terminal of the second operational amplifier U2 is grounded through the negative input resistor R7, and the positive input terminal of the first operational amplifier U1 is grounded through the first positive input resistor R4.

[0017] Preferably, the negative phase input terminal of the second operational amplifier U2 is also connected to the input terminal of the output current control resistor R9 through the negative input feedback resistor R8.

[0018] Preferably, the emitter of the first transistor Q1, the collector of the second transistor Q2, and the negative input feedback resistor R8 are connected to one end of the output current control resistor R9 to form a junction point, and a voltage monitoring point Vb is provided between the junction point and the output current control resistor R9.

[0019] Preferably, the non-inverting input terminal of the first operational amplifier U1 is connected to the output point A through the positive input differential resistor R2, and the negative input terminal of the first operational amplifier U1 is connected to the output point B through the negative input differential resistor R1.

[0020] The negative input terminal of the first operational amplifier U1 and the output terminal of the first operational amplifier U1 are also connected through a feedback resistor R3.

[0021] After adopting the above technical solution, the voltage detection circuit provided by this utility model has the following beneficial effects compared with the prior art.

[0022] (1) This utility model obtains the signal from the voltage acquisition point, enhances the signal strength through the voltage amplification circuit, and finally converts the voltage signal into a current signal output through the voltage-to-current circuit, thereby realizing the accurate measurement of the voltage signal, reducing the attenuation phenomenon when the transmission distance is long, enhancing the anti-interference capability in the high frequency environment, and facilitating compatibility with other current input detection devices.

[0023] (2) By adding a second operational amplifier U2 and a first transistor Q1 and a second transistor Q2, this utility model enables the circuit to have a stronger current driving capability, effectively converting voltage signals into current signals for output, while increasing the stability and reliability of the circuit.

[0024] (3) This utility model forms a complete feedback loop by connecting the output point M to the positive input terminal of the second operational amplifier U2 via the third positive input resistor R6, and connecting the Vb point to the negative input terminal of the second operational amplifier U2 via the output negative input feedback resistor R8, which helps to maintain the stability of the system and improve the output accuracy.

[0025] The specific embodiments of this utility model will be described in further detail below with reference to the accompanying drawings. Attached Figure Description

[0026] The accompanying drawings, as part of this utility model, are used to provide a further understanding of the present utility model. The illustrative embodiments and descriptions of the present utility model are used to explain the present utility model, but do not constitute an undue limitation of the present utility model. Obviously, the drawings described below are merely some embodiments; those skilled in the art can obtain other drawings based on these drawings without creative effort. In the drawings:

[0027] Figure 1 This is a schematic diagram of the composition structure of this utility model;

[0028] Figure 2 This is a schematic diagram of the specific circuit of this utility model.

[0029] It should be noted that these accompanying drawings and textual descriptions are not intended to limit the scope of the present invention in any way, but rather to illustrate the concept of the present invention to those skilled in the art by referring to specific embodiments. Detailed Implementation

[0030] To make the objectives, technical solutions, and advantages of the embodiments of this utility model clearer, the technical solutions in the embodiments will be clearly and completely described below with reference to the accompanying drawings. The following embodiments are used to illustrate this utility model, but are not intended to limit the scope of this utility model.

[0031] In the description of this utility model, it should be noted that the terms "upper", "lower", "front", "rear", "left", "right", "vertical", "inner", and "outer" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model.

[0032] In the description of this utility model, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium. Those skilled in the art can understand the specific meaning of the above terms in this utility model based on the specific circumstances.

[0033] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this utility model, "a plurality of" means two or more, unless otherwise explicitly specified.

[0034] like Figure 1 and Figure 2 As shown, the present invention provides a voltage detection circuit, including a voltage sampling circuit, a voltage amplification circuit, and a voltage-to-current conversion circuit connected in sequence. The voltage sampling circuit is connected to the voltage acquisition point, and the acquired voltage is transmitted to the voltage-to-current conversion circuit through the voltage amplification circuit. The voltage-to-current conversion circuit converts the acquired voltage into current for output.

[0035] By acquiring signals from the voltage acquisition point and amplifying the signal strength through a voltage amplification circuit, and finally converting the voltage signal into a current signal output through a voltage-to-current conversion circuit, accurate measurement of the voltage signal is achieved. This reduces attenuation over long transmission distances, enhances anti-interference capabilities in high-frequency environments, and facilitates compatibility with other current input detection devices.

[0036] The voltage sampling circuit is connected to the input voltage and transmits the voltage signal to the voltage amplification circuit through output points A and B. The voltage amplification circuit includes a first operational amplifier U1, the non-inverting input terminal of the first operational amplifier U1 is connected to output point A, and the negative-inverting input terminal of the first operational amplifier U1 is connected to output point B.

[0037] Preferably, the voltage-to-current circuit includes an output point M, and a second operational amplifier U2, a first transistor Q1, and a second transistor Q2 are further disposed between the output point M and the voltage amplifier circuit.

[0038] By incorporating a second operational amplifier U2 and a first transistor Q1 and a second transistor Q2, the circuit gains a stronger current driving capability, effectively converting voltage signals into current signals for output, while also increasing the circuit's stability and reliability.

[0039] Specifically, the first transistor Q1 is an NPN transistor, and the second transistor Q2 is a PNP transistor. The non-inverting input of the second operational amplifier U2 is connected to the output of the first operational amplifier U1. The output of the second operational amplifier U2 is connected to the bases of both the first transistor Q1 and the second transistor Q2. The emitter of the first transistor Q1 and the collector of the second transistor Q2 are both connected to the input of the output current control resistor R9. The output of the output current control resistor R9 is connected to the output point M.

[0040] Preferably, the output point M is grounded after passing through the output load resistor R10, and the output point M is connected to the non-inverting input terminal of the second operational amplifier U2 through the third positive input resistor R6. By connecting the output point M to the non-inverting input terminal of the second operational amplifier U2 via the third positive input resistor R6, and connecting the Vb point to the negative input terminal of the second operational amplifier U2 via the output negative input feedback resistor R8, a complete feedback loop is formed, which helps to maintain the stability of the system and improve the output accuracy and response speed. Furthermore, the output load resistor R10 is located at the user end, and the user can convert the current value by acquiring the voltage across R10.

[0041] More specifically, the voltage difference between point M and point Vb = (Vb-Vm) = R3 / R1 Vc, and the output current Io = (Vb-Vm) / R9 = R3(Vb-Vm)Vc / (R1*R9).

[0042] The non-inverting input terminal of the second operational amplifier U2 is connected to the output terminal of the first operational amplifier U1 through the second positive input resistor R5. Furthermore, the negative input terminal of the second operational amplifier U2 is grounded through the negative input resistor R7, and the non-inverting input terminal of the first operational amplifier U1 is grounded through the first positive input resistor R4.

[0043] The input design of the second operational amplifier U2 ensures the linearity and gain of signal transmission, and the noise suppression capability and gain adjustment during signal processing are further optimized through the resistor network (second positive input resistor R5 and negative input resistor R7).

[0044] Preferably, the emitter of the first transistor Q1, the collector of the second transistor Q2, and the negative input feedback resistor R8 are connected to one end of the output current control resistor R9 to form a junction point, and a voltage monitoring point Vb is provided between the junction point and the output current control resistor R9.

[0045] More preferably, the non-inverting input terminal of the first operational amplifier U1 is connected to the output point A through the positive input differential resistor R2, the negative input terminal of the first operational amplifier U1 is connected to the output point B through the negative input differential resistor R1, and the negative input terminal and the output terminal of the first operational amplifier U1 are also connected through the feedback resistor R3.

[0046] The first operational amplifier U1, as a stage-one op-amp, uses a differential amplifier circuit. Typically, the resistor values ​​are set as follows: the negative input differential resistor R1 is equal to the positive input differential resistor R2, and the feedback resistor R3 is equal to the first positive input resistor R4. The amplification factor is equal to the ratio of the feedback resistor R3 to the negative input differential resistor R1.

[0047] After voltage sampling, differential amplification is performed by the first operational amplifier U1. By setting the values ​​of the negative input differential resistor R1, the positive input differential resistor R2, the feedback resistor R3, and the first positive input resistor R4, the output of operational amplifier U1 can be made into a proportional value. The first operational amplifier U1 uses a positive and negative voltage power supply, with the power supply pins connected to Vin+ and Vin- respectively. When the voltage at output point A is greater than the voltage at output point B, the first operational amplifier U1 outputs a positive voltage. At this time, the second operational amplifier U2 controls the first transistor Q1 to conduct, the voltage at voltage monitoring point Vb is greater than the voltage at output point M, and the circuit outputs a positive current. When the voltage at output point B is greater than the voltage at output point A, the first operational amplifier U1 outputs a negative voltage. At this time, the second operational amplifier U2 controls the second transistor Q2 to conduct, the voltage at voltage monitoring point Vb is less than the voltage at output point M, and the circuit outputs a negative current.

[0048] For the resistance values ​​at the second operational amplifier U2, set the second positive input resistor R5 to be equal to the negative input resistor R7, and the third positive input resistor R6 to be equal to the negative input feedback resistor R8.

[0049] Based on the virtual short, we know that the V+ of operational amplifier U2 is equal to V-.

[0050] Further, based on the fact that the virtual shortness is short, we can obtain:

[0051]

[0052] Based on the two formulas above, we can obtain:

[0053] This leads to the method for calculating the output current:

[0054]

[0055] Therefore, it is possible to convert the input voltage signal into a current signal output to avoid signal attenuation. At the same time, positive and negative current can be output at the output point M, thus enabling the detection of both AC and DC voltage.

[0056] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0057] The above description is merely a preferred embodiment of the present utility model and is not intended to limit the present utility model in any way. Although the present utility model has been disclosed above with reference to preferred embodiments, it is not intended to limit the present utility model. Any person skilled in the art can make some modifications or alterations to the above-described technical content to create equivalent embodiments without departing from the scope of the present utility model. The implementation schemes in the above embodiments can also be further combined or replaced. Any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of the present utility model without departing from the scope of the present utility model shall still fall within the scope of the present utility model.

Claims

1. A voltage detection circuit, characterized in that: It includes a voltage sampling circuit, a voltage amplification circuit, and a voltage-to-current conversion circuit connected in sequence. The voltage sampling circuit is connected to the voltage acquisition point. The acquired voltage is transmitted to the voltage-to-current conversion circuit through the voltage amplification circuit. The voltage-to-current conversion circuit converts the acquired voltage into current for output. The voltage sampling circuit is connected to the input voltage and transmits the voltage signal to the voltage amplification circuit through output point A and output point B; The voltage amplifier circuit includes a first operational amplifier U1, the non-inverting input terminal of the first operational amplifier U1 is connected to the output point A, and the negative-inverting input terminal of the first operational amplifier U1 is connected to the output point B. The voltage-to-current conversion circuit includes an output point M, and a second operational amplifier U2, a first transistor Q1, and a second transistor Q2 are also provided between the output point M and the voltage amplifier circuit. The first transistor Q1 is an NPN transistor; The second transistor Q2 is a PNP type transistor; The non-inverting input terminal of the second operational amplifier U2 is connected to the output terminal of the first operational amplifier U1. The output terminal of the second operational amplifier U2 is simultaneously connected to the base of the first transistor Q1 and the second transistor Q2. The emitter of the first transistor Q1 and the collector of the second transistor Q2 are both connected to the input terminal of the output current control resistor R9. The output terminal of the output current control resistor R9 is connected to the output point M.

2. The voltage detection circuit according to claim 1, characterized in that: The output point M is grounded after passing through the output load resistor R10; Furthermore, the output point M is connected to the non-inverting input terminal of the second operational amplifier U2 via the third positive input resistor R6.

3. A voltage detection circuit according to claim 2, characterized in that: The non-inverting input terminal of the second operational amplifier U2 is connected to the output terminal of the first operational amplifier U1 through the second positive input resistor R5; The negative input terminal of the second operational amplifier U2 is grounded through the negative input resistor R7, and the positive input terminal of the first operational amplifier U1 is grounded through the first positive input resistor R4.

4. A voltage detection circuit according to claim 3, characterized in that: The negative phase input of the second operational amplifier U2 is also connected to the input of the output current control resistor R9 through the negative input feedback resistor R8.

5. A voltage detection circuit according to claim 4, characterized in that: The emitter of the first transistor Q1, the collector of the second transistor Q2, and the negative input feedback resistor R8 are connected to one end of the output current control resistor R9 to form a junction point. A voltage monitoring point Vb is provided between the junction point and the output current control resistor R9.

6. A voltage detection circuit according to claim 3, characterized in that: The non-inverting input terminal of the first operational amplifier U1 is connected to the output point A through the positive input differential resistor R2, and the negative input terminal of the first operational amplifier U1 is connected to the output point B through the negative input differential resistor R1. The negative input terminal of the first operational amplifier U1 and the output terminal of the first operational amplifier U1 are also connected through a feedback resistor R3.

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