Driving circuit, display panel and display device

Abstract

The utility model provides a driving circuit, a display panel and a display device, the driving circuit comprises a first gate signal line and a first test signal line, and the first gate signal line is arranged along a first direction; the first test signal line is vertically intersected with the grid signal line; wherein a second grid signal line and a second test signal line are arranged on the outer side of the first grid signal line and the outer side of the first test signal line, the second test signal line is connected with the first grid signal line, and the second test signal line is alternately connected with the second grid signal line. And the second test signal line is connected with the first grid signal line, and the second test signal line is alternately connected with the second grid signal line, so that multiple metal conversion handover is realized, the signal coupling condition is reduced, and the capacitive coupling condition between different grid signals is reduced.

Description

Technical Field

[0001] This application relates to the field of display panel technology, and in particular to a driving circuit, a display panel, and a display device. Background Technology

[0002] Display panels are components in electronic devices used to display images and text, typically consisting of three main parts: display units, a glass substrate, and driving circuitry. Display panels are widely used in televisions, computer monitors, mobile phones, tablets, e-readers, automotive displays, and other fields. They are crucial infrastructure for daily life and the modern electronic information industry. With technological advancements, display panels are also being applied to emerging fields such as wearable devices, smart homes, and medical devices, driving the development of related industries.

[0003] Display panels typically require driving circuits to drive pixel units to achieve display functions. To ensure display quality, signal analysis and measurement are often performed on the signal lines of the driving circuit. Since each gate output signal line and test signal line overlaps, capacitive coupling occurs at the overlap points, causing multiple gate signal lines to couple with each other through the test signal lines. Furthermore, since the gate signal lines are relatively important and have high voltage values ​​in the display screen, the resulting capacitive coupling affects the display effect of the display device.

[0004] Therefore, providing a driving circuit, display panel, and display device that reduces capacitive coupling has become a technical problem that urgently needs to be solved by those skilled in the art. Utility Model Content

[0005] This application provides a driving circuit, a display panel, and a display device.

[0006] This application provides a driving circuit, including a first gate signal line and a first test signal line.

[0007] The first gate signal line is disposed along a first direction; the first test signal line intersects the gate signal line perpendicularly; wherein, a second gate signal line and a second test signal line are disposed outside the first gate signal line and the first test signal line, the second test signal line is connected to the first gate signal line, and the second test signal line and the second gate signal line are alternately connected.

[0008] In some embodiments, the second gate signal line includes at least two sub-gate signal lines, and the second test signal line includes at least two sub-test signal lines, wherein the sub-gate signal lines and the sub-test signal lines are alternately connected.

[0009] In some embodiments, the second test signal line and the first gate signal line are connected by laser fusion.

[0010] In some embodiments, the sub-gate signal line and the sub-test signal line are alternately connected by laser fusion.

[0011] In some embodiments, an insulating layer is provided between the connection point of the sub-gate signal line and the sub-test signal line.

[0012] In some embodiments, the spacing between the sub-gate signals is greater than the line width of the sub-gate signal line, which is less than twice the line width of the sub-gate signal line.

[0013] In some embodiments, a shielded signal line is provided between the sub-gate signal lines.

[0014] In some embodiments, the connection point between the first gate signal line and the second test signal line does not exceed half the line width of the second test signal line.

[0015] Another embodiment of this application provides a display panel including the driving circuit described in the above embodiments.

[0016] Another embodiment of this application provides a display device, including the display panel described in the above embodiments.

[0017] This application provides a driving circuit, including a first gate signal line and a first test signal line.

[0018] The first gate signal line is disposed along a first direction; a first test signal line intersects the gate signal line perpendicularly; wherein, a second gate signal line and a second test signal line are disposed outside the first gate signal line and the first test signal line, the second test signal line is connected to the first gate signal line, and the second test signal line and the second gate signal line are alternately connected. Connecting the second test signal line to the first gate signal line and alternately connecting the second test signal line and the second gate signal line achieves multiple metal transitions, reduces signal coupling, and reduces capacitive coupling between different gate signals. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 This is a schematic diagram of the driving circuit provided in an embodiment of this application.

[0021] Figure 2This is another schematic diagram of the driving circuit provided in an embodiment of this application.

[0022] Figure 3 This is another schematic diagram of the driving circuit provided in the embodiments of this application.

[0023] Figure 4 This is a schematic diagram of the structure of the display panel provided in an embodiment of this application.

[0024] Figure 5 This is a schematic diagram of the display device structure provided in an embodiment of this application. Detailed Implementation

[0025] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0026] In the description of this application, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicating orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of the stated features. In the description of this application, "a plurality of" means two or more, unless otherwise explicitly specified.

[0027] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection, an electrical connection, or a connection that allows communication between them; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication between two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0028] In this application, unless otherwise expressly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature being directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature being directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0029] The following disclosure provides many different embodiments or examples for implementing different structures of this application. To simplify the disclosure, specific examples of components and arrangements are described below. Of course, these are merely examples and are not intended to limit the scope of this application. Furthermore, reference numerals and / or letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed. In addition, various specific examples of processes and materials are provided in this application, but those skilled in the art will recognize the application of other processes and / or the use of other materials.

[0030] This application provides a driving circuit, a display panel, and a display device.

[0031] Please see Figures 1 to 3 This application provides a driving circuit 10, including a first gate signal line 11 and a first test signal line 12. The first gate signal line 11 is disposed along a first direction; the first test signal line 12 intersects the gate signal line perpendicularly; wherein, a second gate signal line 13 and a second test signal line 14 are disposed outside the first gate signal line 11 and the first test signal line 12, the second test signal line 14 is connected to the first gate signal line 11, and the second test signal line 14 and the second gate signal line 13 are alternately connected.

[0032] It should be noted that the first gate signal line 11 is set along the first direction, which is usually set in the horizontal direction. Of course, the first direction can be adjusted as needed. However, unless otherwise specified in the embodiments of this application, the first direction is assumed to be horizontal.

[0033] The first gate signal line 11 is arranged along the first direction. In the driving circuit 10, the gate signal line is usually used to transmit control signals to drive display devices (such as liquid crystal pixels in a liquid crystal display). It is a key line in the driving circuit 10 used to control the row selection of a certain group of display units, laying the foundation for subsequent signal transmission and display control.

[0034] The first test signal line 12 intersects the first gate signal line 11 perpendicularly. The first test signal line 12 is used to detect, adjust, or inject test signals into the gate signal to test and monitor the performance of the drive circuit 10. A second gate signal line 13 and a second test signal line 14 are provided outside the first gate signal line 11 and the first test signal line 12. These two sets of signal lines are not isolated but are closely connected to the internal first set of signal lines.

[0035] The second test signal line 14 is connected to the first gate signal line 11, and the second test signal line 14 is alternately connected to the second gate signal line 13. This connection method is to achieve multiple metal transitions, reduce signal coupling, and minimize capacitive coupling between different gate signals.

[0036] In the driving circuit 10 of a liquid crystal display (LCD) or organic light-emitting diode (OLED) display panel, this structure may be used for precise control and testing of the gate signal. For example, in large-size, high-resolution display panels, strict monitoring and adjustment of the gate signal are required to ensure that each row of pixels responds accurately to the driving signal. By testing the first gate signal line 11 through the first test signal line 12, and simultaneously utilizing the connection relationship between the second test signal line 14 and the first and second gate signal lines 13, comparison and calibration of the gate signals in different areas can be achieved, thereby improving the uniformity and stability of the displayed image and avoiding display defects such as horizontal lines and flickering.

[0037] During the research, development, production, and debugging phases of the driver circuit 10, this structure provides a convenient testing method. Different test signals can be injected through the first test signal line 12 to observe the response of the first gate signal line 11 and its associated second gate signal line 13. Due to the connection between the second test signal line 14 and both, the transmission and interaction of signals between different lines can be detected more comprehensively. When a circuit fault occurs, testing these signal lines can quickly pinpoint the problem, such as determining which gate signal line is short-circuited, open-circuited, or experiencing signal distortion.

[0038] In some embodiments, the second gate signal line 13 includes at least two sub-gate signal lines 131, and the second test signal line 14 includes at least two sub-test signal lines 141, wherein the sub-gate signal lines 131 and the sub-test signal lines 141 are alternately connected.

[0039] It is understood that the second gate signal line 13 may include two sub-gate signal lines 131, three sub-gate signal lines 131, or ten sub-gate signal lines 131. The number of sub-gate signal lines 131 is not limited in this embodiment. Similarly, the second test signal line 14 may include two sub-test signal lines 141, three sub-test signal lines 141, or ten sub-test signal lines 141. The number of sub-test signal lines 141 is not limited in this embodiment. Multiple sub-gate signal lines 131 and sub-test signal lines 141 are alternately connected. This connection method is to further achieve multiple metal transitions, reduce signal coupling, and decrease capacitive coupling between different gate signals.

[0040] In some embodiments, the second test signal line 14 and the first gate signal line 11 are connected by laser fusion.

[0041] It should be noted that laser fusion enables extremely precise connections, with the spot size precisely controlled at the micrometer or even sub-micrometer level. This is crucial for the delicate signal line connections in the drive circuit 10, ensuring that the second test signal line 14 and the first gate signal line 11 are accurately connected at the target location, avoiding adverse effects on signal transmission due to connection deviations, such as signal leakage or short circuits. In the high-density wiring of the drive circuit 10, this high-precision connection helps maintain the circuit's compactness and reliability.

[0042] Because laser fusion achieves high precision and minimal mechanical damage at the connection points, the resistance and capacitance characteristics of these points are relatively stable. This helps reduce signal reflection and attenuation at the connection points, ensuring the integrity of signal transmission from the first gate signal line 11 to the second test signal line 14, thereby improving the signal transmission stability of the entire drive circuit 10. Especially for high-frequency signals, stable connection points effectively prevent signal distortion, ensuring the performance of the drive circuit 10 during high-speed operation.

[0043] A precise and reliable connection allows the second test signal line 14 to accurately acquire the signal state of the first gate signal line 11. During testing of the drive circuit 10, a stable connection ensures accurate injection of the test signal and reliable acquisition of the feedback signal, improving the reliability of the test results. This is crucial for timely detection of potential faults and performance issues in the drive circuit 10, contributing to improved overall reliability and yield.

[0044] In some embodiments, the sub-gate signal line 131 and the sub-test signal line 141 are alternately connected by laser fusion.

[0045] It is understood that the sub-gate signal line 131 and the sub-test signal line 141 are alternately connected by laser fusion. This allows for testing of any row of gate signal lines.

[0046] In some embodiments, an insulating layer 15 is provided between the sub-gate signal line 131 and the sub-test signal line 141.

[0047] The material of the insulating layer 15 is selected based on its high dielectric constant, insulation strength, and good heat resistance. For example, for the drive circuit 10 used for high-frequency signal transmission, an insulating material with a low dielectric constant is chosen to reduce signal attenuation. Simultaneously, the insulating material must have sufficiently high insulation strength to withstand the voltage in the circuit. Common insulating materials include silicon dioxide (SiO2) and polyimide; the specific selection depends on the operating environment and performance requirements of the drive circuit 10.

[0048] The insulating layer 15 helps improve signal integrity. In the drive circuit 10, both the gate signals used to control display pixels and the test signals used for testing need to be transmitted accurately. The presence of the insulating layer 15 makes the signal more stable during transmission, reducing signal distortion and noise, thereby improving the performance of the drive circuit 10. For example, in a high-resolution display drive circuit 10, improved signal integrity can result in clearer images and more accurate colors. Preventing short circuits and reducing signal interference directly improves the reliability of the drive circuit 10. Because the insulating layer 15 reduces the possibility of circuit failure, the drive circuit 10 can maintain stable performance during long-term operation. This is especially important for drive circuits 10 in equipment that requires long-term stable operation (such as industrial control equipment, communication equipment, etc.). Enhanced reliability can also reduce maintenance costs and extend the lifespan of the equipment.

[0049] In some embodiments, the spacing between the sub-gate signals is greater than the line width of the sub-gate signal line 131, which is less than twice the line width of the sub-gate signal line 131.

[0050] Understandably, when the spacing between the sub-gate signal lines 131 is greater than the line width but less than twice the line width, it can control the capacitive coupling between adjacent sub-gate signal lines 131 to a certain extent. If the spacing is too large, it will increase the circuit size and hinder integration; while if the spacing is too small, the capacitive coupling effect will be significantly enhanced, leading to signal crosstalk and affecting signal integrity and accuracy. For example, in the high-frequency drive circuit 10, excessive capacitive coupling may slow down the rising and falling edges of the signal, increase signal transmission delay, and even cause malfunctions. A suitable spacing helps to form a relatively uniform electric field distribution between the sub-gate signal lines 131. This is crucial to ensuring that each sub-gate signal line 131 can effectively control the conduction and cutoff of the device (such as a transistor) it is connected to. If the electric field distribution is uneven, it may cause changes in the threshold voltage of the transistor, affecting the performance and stability of the entire circuit.

[0051] In some embodiments, a shielding signal line 16 is provided between the sub-gate signal line 131 and the sub-gate signal line 131.

[0052] Understandably, the signal transmitted by the sub-gate signal line 131 may be affected by electromagnetic interference from adjacent signal lines, leading to signal distortion or errors. The shielded signal line 16, by grounding, can absorb and shield surrounding electromagnetic radiation, reducing crosstalk between sub-gate signal lines 131. For example, when a sub-gate signal line 131 transmits a high-frequency signal, the electromagnetic field it generates can affect adjacent sub-gate signal lines 131. The shielded signal line 16 can guide these interfering electromagnetic fields to ground, thereby ensuring the signal integrity of other sub-gate signal lines 131.

[0053] In some embodiments, the connection point between the first gate signal line 11 and the second test signal line 14 does not exceed half the line width of the second test signal line 14.

[0054] Understandably, limiting the connection point size to half the width of the second test signal line 14 effectively reduces parasitic capacitance at the connection point. Parasitic capacitance affects signal transmission characteristics, leading to signal delay, attenuation, and waveform distortion. A smaller connection point means a smaller capacitor plate area. According to the capacitance formula C = ε0 * A / d, where C represents capacitance (unit: farad, F), ε0 represents the dielectric constant of vacuum (unit: farad / meter, F / m), A represents the area of ​​the parallel plates facing each other (unit: square meter, m²), and d represents the distance between the parallel plates (unit: meter, m), the parasitic capacitance will be reduced accordingly. This helps maintain fast signal rise and fall times, improving the accuracy and speed of signal transmission, which is especially crucial for high-frequency signal transmission.

[0055] This application provides a driving circuit 10, including a first gate signal line 11 and a first test signal line 12. The first gate signal line 11 is disposed along a first direction; the first test signal line 12 intersects the gate signal line perpendicularly. A second gate signal line 13 and a second test signal line 14 are disposed outside the first gate signal line 11 and the first test signal line 12. The second test signal line 14 is connected to the first gate signal line 11, and the second test signal line 14 and the second gate signal line 13 are alternately connected. By connecting the second test signal line 14 to the first gate signal line 11 and alternately connecting the second test signal line 14 and the second gate signal line 13, multiple metal transitions are achieved, reducing signal coupling and capacitive coupling between different gate signals.

[0056] Please see Figure 4 Another embodiment of this application also provides a display panel 100, including the driving circuit 10 described in the above embodiments. Since the driving circuit 10 has been described in detail in the above embodiments, the driving circuit 10 in this application will not be described in detail again.

[0057] Please see Figure 5 Another embodiment of this application also provides a display device 1000, including the display panel 100 described in the above embodiments. Since the display panel 100 has been described in detail in the above embodiments, the display panel 100 in this application will not be described in detail again.

[0058] The driving circuit, display panel, and display device provided in the embodiments of this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are only for the purpose of helping to understand this application. At the same time, those skilled in the art will recognize that, based on the ideas of this application, there will be changes in the specific implementation methods and application scope. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A driving circuit, characterized in that, include: The first gate signal line is disposed along a first direction; The first test signal line intersects the gate signal line perpendicularly; Wherein, a second gate signal line and a second test signal line are provided outside the first gate signal line and the first test signal line, the second test signal line is connected to the first gate signal line, and the second test signal line and the second gate signal line are alternately connected.

2. The driving circuit according to claim 1, characterized in that, The second gate signal line includes at least two sub-gate signal lines, and the second test signal line includes at least two sub-test signal lines, wherein the sub-gate signal lines and the sub-test signal lines are alternately connected.

3. The driving circuit according to claim 1, characterized in that, The second test signal line is connected to the first gate signal line via laser fusion.

4. The driving circuit according to claim 2, characterized in that, The sub-gate signal line and the sub-test signal line are alternately connected by laser fusion.

5. The driving circuit according to claim 2, characterized in that, An insulating layer is provided between the connection point of the sub-gate signal line and the sub-test signal line.

6. The driving circuit according to claim 2, characterized in that, The spacing between the sub-gate signal and the sub-gate signal line is greater than the line width of the sub-gate signal line but less than twice the line width of the sub-gate signal line.

7. The driving circuit according to claim 2, characterized in that, A shielded signal line is provided between the sub-gate signal lines.

8. The driving circuit according to claim 2, characterized in that, The connection point between the first gate signal line and the second test signal line does not exceed half the line width of the second test signal line.

9. A display panel, characterized in that, Includes the driving circuit as described in any one of claims 1 to 8.

10. A display device, characterized in that, Includes the display panel as described in claim 9.

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