Packaging substrate based on via hole structure, packaging chip and electronic equipment

Abstract

The utility model provides a packaging substrate based on a via hole structure, a packaging chip and electronic equipment, and relates to the field of chip packaging. The packaging substrate comprises a substrate structure, wherein the substrate structure comprises a core board and multiple copper-clad dielectric layers which are respectively arranged at two sides of the core board; the substrate structure comprises a plurality of via hole structures, and the via hole structures are used for connecting crystal grain bumps and solder balls; each via hole structure comprises two laser hole arrays and a mechanical hole; the mechanical hole is formed in the core board, the two laser hole arrays are formed in the copper-clad dielectric layers on different sides of the core board respectively, and each laser hole array penetrates through all the copper-clad dielectric layers on the side where the laser hole array is located to be connected with the mechanical hole; wherein every two adjacent copper-clad dielectric layers are connected through at least two laser holes of the laser hole array, and the plurality of laser holes connecting the two adjacent copper-clad dielectric layers are connected. The packaging substrate can improve the impedance consistency and continuity of the signal transmission channel.

Description

TECHNICAL FIELD

[0001] The application provides a packaging substrate based on a via structure, a packaged chip and an electronic device, and relates to the field of chip packaging. BACKGROUND

[0002] In a packaged chip, a die is arranged on a packaging substrate, and the die on the upper surface of the packaging substrate is led out to the bottom of the packaging substrate through a via structure of the packaging substrate, so that the die is interconnected with the solder balls at the bottom of the packaging substrate.

[0003] The packaging substrate is a multi-level structure, including a core board layer and metal layers and dielectric layers on both sides of the core board layer. The core board layer usually has mechanical holes opened by a mechanical drill bit. The metal layers and the dielectric layers on both sides of the core board layer have laser holes opened by laser, that is, the via structure includes mechanical holes and laser holes. Please refer to Figure 1 , Figure 1 It is a schematic diagram of the prior art via structure. The laser holes are arranged on both sides of the mechanical holes and are connected with the mechanical holes through the hole discs of the mechanical holes. The core board layer has a plurality of alternating metal layers and dielectric layers arranged on both sides, and the layers are connected through a single laser hole and finally connected with the mechanical holes.

[0004] As shown in Figure 1 , the sizes of the holes opened by the mechanical drill bit and the laser are inconsistent, which makes the laser holes much smaller than the mechanical holes. At the same time, the laser holes are opened on the copper-clad dielectric layer, which includes metal layers and dielectric layers, and the mechanical holes are opened on the core board layer. The materials of the layer structures at the positions where the laser holes and the mechanical holes are opened are inconsistent. The above two aspects make the impedance at the laser holes inconsistent and discontinuous with the impedance at the mechanical holes. In the process of signal transmission, high-speed signals will reflect and oscillate at the impedance discontinuous position, so that the signals are attenuated and the signal quality is affected. CONTENT OF THE INVENTION

[0005] Therefore, the application aims to provide a packaging substrate based on a via structure, a packaged chip and an electronic device to improve the impedance consistency and continuity of the signal transmission channel on the packaging substrate.

[0006] In a first aspect, an embodiment of the present application provides a packaging substrate based on a via structure, comprising: a substrate structure, the substrate structure comprising a core board and a plurality of copper-coated dielectric layers arranged on both sides of the core board; the substrate structure comprising a plurality of via structures, the via structures being used to connect die bumps and ball grid array solder balls; each via structure comprising: two laser hole arrays and a mechanical hole; the mechanical hole being arranged on the core board, and the two laser hole arrays being arranged on the copper-coated dielectric layers on different sides of the core board, and each laser hole array being connected with the mechanical hole through all the copper-coated dielectric layers on the side; wherein at least two laser holes of each adjacent two laser hole arrays are connected, and a plurality of laser holes connecting adjacent two copper-coated dielectric layers are connected.

[0007] The laser holes are arranged between adjacent two copper-coated dielectric layers. In an embodiment of the present application, a plurality of laser holes are arranged between adjacent two copper-coated dielectric layers, and the plurality of laser holes between adjacent two copper-coated dielectric layers are connected, so that signals can be transmitted between the laser holes. Thus, the size of the laser holes between adjacent two copper-coated dielectric layers is increased, and the signal transmission is changed from a single laser hole to a plurality of laser holes. Compared with a single laser hole, the size of the plurality of laser holes is larger, which can effectively reduce the impedance at the laser holes, so that the overall impedance of the laser hole array on the copper-coated dielectric layer is closer to the impedance of the mechanical hole, and the impedance is continuous and consistent, thereby reducing the possibility of signal reflection and oscillation and reducing signal attenuation.

[0008] In an embodiment, all the laser holes connecting adjacent two copper-coated dielectric layers are located in a same preset area, and the preset area is an area capable of completely containing a first shape; and the first shape is a same shape as the cross section of the mechanical hole.

[0009] In an embodiment of the present application, the preset area comprises all the laser holes connecting adjacent two copper-coated dielectric layers, so that the preset area has a same cross section as the mechanical hole, that is, the overall shape of all the laser holes connecting adjacent two copper-coated dielectric layers is the same as the cross section of the mechanical hole. This helps to make the overall shape of the laser hole array on the copper-coated dielectric layer closer to the shape of the mechanical hole, thereby helping to reduce the impedance difference caused by the shape difference between the laser holes and the mechanical hole.

[0010] In an embodiment, the shape and size of the preset area are the same as the shape and size of the cross section of the mechanical hole.

[0011] In an embodiment of the present application, the shape and size of the preset area are the same as the shape and size of the cross section of the mechanical hole, which helps to reduce the impedance difference caused by the shape and size difference, and helps to improve the impedance consistency and continuity.

[0012] In an embodiment, the connection foils are connected between the laser holes of two adjacent copper clad dielectric layers.

[0013] In the embodiments of the present application, the connection foils are connected between the laser holes, and the area of the connection foils is larger than that of the wires, which helps to reduce the impedance.

[0014] In an embodiment, the connection foils are circular foils, and the connection foils can completely include all the laser holes of two adjacent copper clad dielectric layers.

[0015] In the embodiments of the present application, the connection foils are circular, which makes the connection foils consistent with the mechanical holes, and the overall shape formed by the connection foils between the multiple copper clad dielectric layers is similar to a cylinder, which is similar to the shape of the mechanical holes, and reduces the problem that the impedance difference is too large and discontinuous due to the shape difference.

[0016] In an embodiment, the shape and size of the connection foils are the same as the shape and size of the cross section of the mechanical holes.

[0017] In the embodiments of the present application, the shape and size of the connection foils are the same as the shape and size of the cross section of the mechanical holes, which helps to make the overall shape formed by all the connection foils and laser holes consistent with the mechanical holes, thereby reducing the impedance difference between the laser holes and the mechanical holes.

[0018] In an embodiment, the connection foils are copper foils.

[0019] In the embodiments of the present application, copper has good electrical conductivity, which helps to reduce the impedance of the connection foils, and at the same time, copper also has good ductility and low cost, which helps to reduce the manufacturing cost.

[0020] In an embodiment, the thickness of the connection foils is the same as the thickness of the copper clad dielectric layer where the connection foils are located.

[0021] In the embodiments of the present application, the thickness of the connection foils is the same as the thickness of the copper clad dielectric layer, which can make the connection foils as thick as possible while avoiding the situation that the connection foils cause the copper clad dielectric layers to be misaligned.

[0022] In a second aspect, the embodiments of the present application provide a packaged chip, comprising: the via structure based packaging substrate according to any one of the first aspect; and a die disposed on the packaging substrate.

[0023] In a third aspect, the embodiments of the present application provide an electronic device, comprising the packaged chip according to the second aspect. BRIEF DESCRIPTION OF DRAWINGS

[0024] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments of the present application. It should be understood that the following drawings only show some embodiments of the present application, and therefore should not be regarded as a limitation to the scope, and for those skilled in the art, other related drawings can also be obtained without creative labor on the basis of these drawings.

[0025] Figure 1 A schematic diagram of a prior art via structure;

[0026] Figure 2 A schematic diagram of a packaging substrate based on a via structure provided by an embodiment of the present application;

[0027] Figure 3 A schematic diagram of impedance variation of a prior art via structure;

[0028] Figure 4 A schematic diagram of loss of a prior art via structure;

[0029] Figure 5 A three-dimensional schematic diagram of a via structure provided by an embodiment of the present application;

[0030] Figure 6 A comparative schematic diagram of a laser hole provided by an embodiment of the present application;

[0031] Figure 7 A schematic diagram of array arrangement of a laser hole provided by an embodiment of the present application;

[0032] Figure 8 A cylindrical equivalent schematic diagram of a laser hole array provided by an embodiment of the present application;

[0033] Figure 9 A diagram of impedance variation of a via structure provided by an embodiment of the present application;

[0034] Figure 10 A loss effect diagram of a via structure provided by an embodiment of the present application.

[0035] Legend: core board 110; copper clad dielectric layer 120; mechanical hole 210; mechanical hole pad 211; laser hole array 220; laser hole 221; solder pad 310; solder ball 320. DETAILED DESCRIPTION

[0036] In order to make the purpose, technical solutions and advantages of the embodiments of the present application more clear, the following will further describe the present application in combination with the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application, and should not be regarded as a limitation to the present application.

[0037] First, the present application provides a packaging substrate based on a via structure, please refer toFigure 2 , Figure 2 This is a schematic diagram of a via-structure-based packaging substrate provided in an embodiment of this application.

[0038] In embodiments of this application, the via-structure based packaging substrate includes: a substrate structure and via structures formed on the substrate structure.

[0039] The substrate structure includes a core board 110 and multilayer copper dielectric layers 120 respectively disposed on both sides of the core board 110. The copper dielectric layers 120 are disposed on both sides of the core board 110, such as... Figure 2 As shown, the core board 110 has multiple copper dielectric layers 120 on both the top and bottom sides.

[0040] In the embodiments of this application, the copper dielectric layer 120 includes a metal layer and a dielectric layer, which are alternately arranged. For example, the copper dielectric layer 120 on one side of the core board 110 consists of a metal layer, a dielectric layer, a metal layer, a dielectric layer, and so on, a metal layer and a dielectric layer.

[0041] The above-mentioned substrate structure can be referred to existing technology, and will not be elaborated here.

[0042] Multiple via structures are provided on the substrate, and the via structures penetrate the entire substrate structure so that the upper surface of the packaging substrate can be connected to the lower surface of the substrate, thereby connecting the chips and solder balls 320 on both sides of the substrate. The side connected to the chips can be called the Top layer, and the side with the solder balls 320 is called the Bottom layer.

[0043] The substrate structure is a multi-layered structure. The copper dielectric layer 120 and the core layer are made of different materials, and the types of vias they have are also different. For example... Figure 1 and 2 As shown, the via structure includes a laser via 221, a mechanical via 210, a mechanical via pad 211, and a solder pad 310. The mechanical via pad 211 connects the mechanical via 210 to the laser via 221, and the solder pad 310 connects the laser via 221 to the solder ball 320. The mechanical via 210 is a hole drilled on the core board 110 using a mechanical drill bit, and the laser via 221 is a hole printed on the copper dielectric layer 120 using a laser. The core board 110 and the copper dielectric layer 120 are stacked after the corresponding holes are drilled to obtain the substrate structure.

[0044] In the embodiments of this application, the substrate structure can be provided with a single-ended communication via structure, i.e., a single via structure, or it can be provided with a differential communication via structure, such as... Figure 2 As shown, two adjacent via structures are set, but there are no restrictions on this.

[0045] like Figure 1As shown, the existing via structure sequentially includes: laser via, mechanical via disk, mechanical via, mechanical via disk, laser via, pad, and solder ball. The die is used to connect with... Figure 2 The laser-connected holes shown above are solder balls used for connections to devices such as printed circuit boards, or for electrical connections to other circuits and components.

[0046] On the one hand, the different materials used in the core board and the copper-clad dielectric layer result in material differences between laser-drilled and mechanically drilled vias. On the other hand, the different sizes of mechanical drill bits and lasers mean that the diameter of mechanically drilled vias is much larger than that of laser-drilled vias. This leads to significant impedance inconsistencies between the laser-drilled and mechanically drilled vias. Impedance consistency refers to impedance variations remaining within a specified range, not complete uniformity. Impedance continuity means that impedance variations across different layers (different vias) remain within a specified range.

[0047] When a signal passes through an existing via structure, layer switching occurs at the junction of the mechanical and laser vias. As a result, the signal passes through an inhomogeneous physical structure, leading to significant impedance differences and impedance discontinuities. For high-speed signals, these discontinuities result in multiple reflections and oscillations, causing substantial signal attenuation and increased insertion and return losses.

[0048] As signal rates increase, carrier frequencies rise, wavelengths shorten, and signal edges become steeper. Shortwave signals passing through this structure will experience a noticeable sudden increase in impedance, and impedance exceeding limits will occur twice, above and below the mechanical aperture.

[0049] Please see Figure 3 , Figure 3 This diagram illustrates the impedance variation of an existing via structure, where differential signals are transmitted through different via signals. Figure 3 The upper and lower graphs in the figure correspond to the impedance changes of different via structures for differential signals, with the horizontal axis representing time and the vertical axis representing impedance. m1 and m2 are two different points. In this embodiment, the expected impedance is 85Ω, and the process requirement is not to exceed 10%. Figure 3 The graph above shows the impedance curve for a 10ps rise time. The peak value at m1 reaches 101Ω, exceeding the expected impedance by 17%. Similarly, due to another layer change at the mechanical aperture exit, the curve corresponding to m1 has a second peak, which also exceeds 95 ohms. See also... Figure 3 The figure below shows the impedance curve for a 5ps rise time. In another via structure for differential communication, the peak is 106Ω, which exceeds the expected impedance by 24%, and the trough is also about 80Ω. The impedance difference between the peak and the trough is about 26Ω, indicating a large impedance change.

[0050] Meanwhile, when a high-speed signal passes through the existing via structure, signal reflection and oscillation make the signal attenuation more serious as the signal frequency increases. Referring to the above example, please see Figure 4 , Figure 4 is a diagram of the existing via structure loss. The horizontal axis is the frequency, and the vertical axis is the insertion loss caused by oscillation and the return loss caused by reflection, respectively. It can be seen from Figure 4 that the insertion loss increases with the increase of the signal frequency, and starts to decrease at 40 GHz. At m2, the insertion loss is about -0.5. The return loss starts to rise at more than 20 GHz, and at m2, the return loss is about -11.8.

[0051] In one existing method, adjusting the physical size of the mechanical hole and / or the physical size of the laser hole can adjust the impedance at the corresponding position, but due to the limitations of electrical performance, process, reliability, etc., the physical size of the mechanical hole, the hole disc and the pad cannot be adjusted arbitrarily, and the laser size for opening the laser hole cannot be adjusted, which makes it impossible to adjust the size of the mechanical hole, the hole disc and the pad. In another existing method, a reference metal network around the anti-pad of various shapes can be designed to adjust the distance between the mechanical hole, the hole disc and the pad and the reference network, thereby adjusting the impedance of the region, but this method makes the distance between the laser hole and the reference metal farther, and the impedance of the laser hole in different layers at the connection is higher, which also has the problem of impedance discontinuity.

[0052] In the embodiments of the present application, a laser hole array 220 can be opened at the position of the original laser hole 221 in the via structure, and two laser hole arrays 220 are respectively arranged on the copper-clad dielectric layer 120 on different sides of the core board 110, and each laser hole array 220 passes through all the copper-clad dielectric layers 120 on the side and is connected with the mechanical hole 210.

[0053] That is, for each via structure, a laser hole array 220 is arranged on each copper-clad dielectric layer 120 at both ends of the mechanical hole 210. Please see Figure 5 , Figure 5 is a three-dimensional diagram of the via structure provided by an embodiment of the present application. In the via structure of the present application, from the Top layer to the Bottom layer, it includes the laser hole array 220, the mechanical hole disc 211, the mechanical hole 210, the mechanical hole disc 211, the laser hole array 220, the pad 310, and the solder ball 320.

[0054] Unlike the laser hole 221 in the existing via structure, in the embodiments of the present application, the laser hole array 220 includes a plurality of laser holes 221, at least two laser holes 221 of the laser hole array 220 on each adjacent two copper-clad dielectric layers 120 are connected, and the plurality of laser holes 221 connecting the adjacent two copper-clad dielectric layers 120 are connected.

[0055] Please refer to Figure 6 , Figure 6 The laser hole 221 provided in an embodiment of the present application is shown in the contrast schematic diagram. As shown in the figure, Figure 6 In the original via structure, the two adjacent copper-coated dielectric layers 120 are connected by a single laser hole 221, while in the present application, a plurality of laser holes 221 (some laser holes 221 are not shown in the figure due to the viewing angle) are arranged between the two adjacent copper-coated dielectric layers 120, wherein the plurality refers to two or more.

[0056] In an embodiment of the present application, the laser hole array 220 is arranged such that at least two laser holes 221 of the laser hole array 220 connect the two adjacent copper-coated dielectric layers 120, and the plurality of laser holes 221 connecting the two adjacent copper-coated dielectric layers 120 are connected, thereby enabling the signal to be transmitted between the two adjacent copper-coated dielectric layers 120 through two laser holes 221 simultaneously. The size of two or more laser holes 221 is larger than the size of a single laser hole 221, which is equivalent to increasing the physical size of the laser hole 221 in the via structure. Thus, through the laser hole array 220, it can approach the physical size of the mechanical hole 210, thereby effectively reducing the impedance difference between the impedance at the position of the laser hole 221 and the impedance of the mechanical hole 210, and improving the impedance consistency and continuity.

[0057] In an embodiment of the present application, all laser holes 221 connecting the two adjacent copper-coated dielectric layers 120 are located in the same preset area, and the preset area is an area capable of completely containing the first shape; the first shape is the same shape as the cross section of the mechanical hole 210.

[0058] Instead, the preset area in the embodiment of the present application is not an actually existing area, but a specific domain covering an area of all laser holes 221 connecting the two adjacent copper-coated dielectric layers 120.

[0059] Please refer to Figure 7 , Figure 7 The arrangement schematic diagram of the laser hole array 220 provided in an embodiment of the present application is shown. For example, the number of laser holes 221 between the two adjacent copper-coated dielectric layers 120 can be 2, 3, 4, 5, 6 or more, Figure 7 The preset area shown in the figure is a circular shape, and in other embodiments, the preset area can be a rectangular shape, a triangular shape or other shapes. The preset area can include all laser holes 221, wherein the preset area is the smallest area including all laser holes 221.

[0060] In an embodiment of the present application, the preset area is made to completely include the same shape of the cross section of the mechanical hole 210, which is equivalent to making the impedance of the laser hole array 220 close to the impedance reached by the shape formed by the preset area. For example, the preset area is circular, and the impedance of all the laser holes 221 in the laser hole array 220 is close to the impedance reached by all the circular preset areas (similar to a cylinder). Thus, the impedance of the laser hole array 220 can be made close to the similar shape of the mechanical hole 210 by different arrangement of the laser holes 221 in the laser hole array 220, thereby reducing the problem that the impedance of the laser hole 221 is too different from that of the mechanical hole 210 due to the difference in shape and physical size.

[0061] Therefore, in an embodiment of the present application, the shape and size of the preset area can be made the same as the shape and size of the cross section of the mechanical hole 210, so that the equivalent shape of the laser hole array 220 is the same as the shape of the mechanical hole 210, such as a cylinder with the same radius as the mechanical hole 210. Wherein, the same means that the error is within the process allowable range, and the subsequent same will not be described here.

[0062] In an embodiment of the present application, the plurality of laser holes 221 of the two adjacent copper-clad dielectric layers 120 are connected by a connecting foil.

[0063] The plurality of laser holes 221 of the two adjacent copper-clad dielectric layers 120 need to be connected to be able to transmit signals. In this embodiment, the connecting foil is used to connect the plurality of laser holes 221 of the two adjacent copper-clad dielectric layers 120. Compared with the wire, the foil has a larger surface area, which makes the impedance of the connecting foil smaller than that of the wire, and the impedance at the laser hole 221 can be further reduced by the connecting foil.

[0064] In addition to the function of connecting the laser holes 221, the connecting foil can also form a more complete whole with the laser hole array 220, so that the shape and size of the laser hole array 220 are closer to the mechanical hole 210, thereby reducing the impedance difference caused by the shape difference.

[0065] In an embodiment, the connecting foil is a circular foil and the connecting foil can completely include all the laser holes 221 connecting the two adjacent copper-clad dielectric layers 120.

[0066] As mentioned above, making the shape and size of the laser hole array 220 close to that of the mechanical hole 210 helps to make the impedance at the laser hole 221 consistent with that of the mechanical hole 210, thus making the impedance consistent and continuous. The mechanical hole is usually circular, thus in the embodiments of the present application, the connecting foil can be made circular to connect all the laser holes 221 through the circular foil. In this way, the shape of the laser hole array 220 and the connecting foil as a whole can be similar to the cylinder of the mechanical hole 210, thus improving the impedance consistency and continuity.

[0067] In an embodiment, the shape and size of the connecting foil are the same as that of the cross section of the mechanical hole 210.

[0068] In the foregoing embodiments, making the plurality of laser holes 221 in the same preset area and making the shape and size of the preset area the same as that of the cross section of the mechanical hole 210 helps to reduce the impedance of the laser hole 221, and in the embodiments of the present application, the foregoing preset area can be implemented as a solid, i.e. using a connecting foil with the same shape and size as that of the cross section of the mechanical hole 210 as the foregoing preset area, and making all the mechanical holes 210 arranged on the surface of the connecting foil and connecting the laser holes 221 of the upper and lower layers through the connecting foil. Please refer to Figure 8 , Figure 8 The cylindrical equivalent schematic diagram of the laser hole array 220 provided in an embodiment of the present application, thus the laser hole array 220 and the connecting foil can be similar to a metal cylinder, thus having a more uniform size with the mechanical hole 210.

[0069] In an embodiment, the thickness of the connecting foil is the same as that of the copper clad dielectric layer 120 where the connecting foil is located.

[0070] In the present embodiment, the laser hole 221 is pre-opened in each copper clad dielectric layer 120, and before opening the laser hole 221, a corresponding area can be arranged on the copper clad dielectric layer 120 to access the connecting foil, and then the laser hole 221 is opened. Thus, making the thickness of the connecting foil the same as that of the copper clad dielectric layer 120 where the connecting foil is located can make the connecting foil as thick as possible while avoiding the situation that the layer stacking of the copper clad dielectric layer 120 is misaligned due to the connecting foil being too thick.

[0071] In an embodiment, the connecting foil can be a copper foil.

[0072] Copper has both ductility and conductivity, and the cost is relatively low. In other embodiments, silver foil with better conductivity, gold foil with better stability, or foil of other materials according to the needs of other characteristics can be selected, which will not be expanded here.

[0073] Please refer to Figure 9 ,Figure 9 Impedance variation diagram of the via structure provided in the embodiment of the present application. The via structure in this embodiment is the same as the via structure shown in the foregoing Figure 3 embodiment, the impedance peak for differential communication, one signal is reduced from 101 to 89, and the other is reduced from 106 to 92, from originally more than 85Ω±10% to within 85Ω±10%, so that the impedance variation of the packaging substrate is smaller, and the impedance consistency and continuity are improved.

[0074] Please refer to Figure 10 , Figure 10 Loss effect diagram of the via structure provided in the embodiment of the present application. As shown in the foregoing Figure 10 insertion loss of the via structure at 32GHz is reduced from -0.5dB to -0.21dB, and there is no obvious resonance in the whole insertion loss curve. The signal reflection loss is reduced more significantly, from originally -11.85dB at 32GHz to below -25.79dB.

[0075] It can be seen that in the embodiment of the present application, a plurality of laser holes 221 are opened in the adjacent two copper-clad dielectric layers 120, and at the same time, the plurality of laser holes 221 between the adjacent two copper-clad dielectric layers 120 are connected through the connecting foil, which effectively increases the size of the laser hole 221, thereby effectively reducing the impedance at the laser hole 221, so that the overall impedance of the laser hole array 220 on the copper-clad dielectric layer 120 can be closer to the impedance of the mechanical hole 210, so that the impedance is continuous and consistent, thereby reducing the possibility of signal reflection and oscillation and reducing signal attenuation.

[0076] Based on the same concept, the embodiment of the present application also provides a packaging chip, which comprises a die and the packaging substrate based on the via structure provided in the foregoing embodiment, and the die is arranged on the packaging substrate and electrically connected to the solder ball 320 at the bottom of the packaging substrate through the via structure on the packaging substrate.

[0077] In the embodiment of the present application, the packaging chip can include one or more, which is not limited here.

[0078] The die can be of any type, for example, it can be a die of an electronic component, such as a diode, a triode, a bipolar junction transistor, and the die can also be a die of a functional module or a large integrated circuit, such as a communication module, a sensor, a processor, a memory, etc., which is not limited here.

[0079] Based on the same concept, the embodiment of the present application also provides an electronic device, which is configured with the packaging chip provided in the foregoing embodiment.

[0080] In the embodiments of the present application, the electronic device includes but is not limited to mobile devices, industrial devices, automobiles, household appliances, display devices, and various devices including packaged chips, and the packaged chips included in the electronic device can be electronic devices made of processors, functional modules, or other packaged chips. The above is only an example and should not be considered as a limitation of the present application.

[0081] The above embodiments can be combined with each other without conflict to obtain new embodiments, and these combined embodiments are also within the protection scope of the present application.

[0082] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto, and any person skilled in the art can easily think of changes or replacements within the technical range disclosed in the present application, which should be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

[0083] It should be noted that in this document, the terms "comprising", "including", or any other variant thereof are intended to cover non-exclusive inclusions, so that the articles or devices including a series of elements not only include those elements, but also include other elements not explicitly listed, or include elements inherent to such articles or devices. Without more limitations, the element defined by the statement "including a" does not exclude the presence of another identical element in the article or device including the element.

Claims

1. A via structure based package substrate, comprising: The application relates to a substrate structure, comprising: a substrate structure, comprising a core board and a plurality of copper-clad dielectric layers arranged on both sides of the core board; a plurality of via structures arranged on the substrate structure, the via structures being used for connecting die bumps and ball grid array solder balls; each via structure comprises two laser hole arrays and a mechanical hole; the mechanical hole is arranged on the core board, the two laser hole arrays are arranged on the copper-clad dielectric layers on different sides of the core board, and each laser hole array is connected with the mechanical hole through all the copper-clad dielectric layers on the side; wherein, at least two laser holes in each laser hole array are used for connecting two adjacent copper-clad dielectric layers, and a plurality of laser holes used for connecting the two adjacent copper-clad dielectric layers are connected.

2. The via structure based package substrate of claim 1, wherein, All the laser holes used for connecting the two adjacent copper-clad dielectric layers are located in a same preset area, the preset area is an area capable of completely containing a first shape; the first shape is a shape same as a cross section of the mechanical hole.

3. The via structure based package substrate of claim 2, wherein, The shape and size of the preset area are same as those of the cross section of the mechanical hole.

4. The via structure based package substrate of claim 1, wherein, The plurality of laser holes between the two adjacent copper-clad dielectric layers are connected through a connecting foil.

5. The via structure based package substrate of claim 4, wherein, The connecting foil is a circular foil, and the connecting foil is capable of completely containing all the laser holes used for connecting the two adjacent copper-clad dielectric layers.

6. The via structure based package substrate of claim 4, wherein, The shape and size of the connecting foil are same as those of the cross section of the mechanical hole.

7. The via structure based package substrate of claim 4, wherein, The connecting foil is a copper foil.

8. The via structure based package substrate of claim 4, wherein, The thickness of the connecting foil is same as that of the copper-clad dielectric layer on which the connecting foil is arranged.

9. A packaged chip, comprising: The application relates to a via structure-based packaging substrate, comprising: a via structure-based packaging substrate according to any one of claims 1-8; a die arranged on the packaging substrate.

10. An electronic device, comprising: The application relates to a packaged chip, comprising the packaging chip according to claim 9.

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