Chip packaging structure

Abstract

The utility model provides a chip packaging structure which comprises a printed circuit board, an assembling mechanism is arranged on the surface of the printed circuit board, the assembling mechanism comprises a plurality of wiring layers which are arranged in parallel, a heat dissipation mechanism is arranged above the assembling mechanism, a chip mechanism is installed between the assembling mechanism and the heat dissipation mechanism, the chip mechanism comprises a chip body and a plurality of welding layers, the number and the positions of the plurality of welding layers are in one-to-one correspondence with those of the plurality of wiring layers, and a plurality of welding balls arranged in an array are arranged on one surface, facing the wiring layers, of each welding layer. According to the utility model, the plurality of welding layers which are arranged in parallel are arranged in the chip mechanism, the plurality of welding balls are arranged on each welding layer in an array manner, and the plurality of welding balls on the adjacent welding layers are arranged in a staggered manner, so that the number of electrical connection points between the chip body and the printed circuit board is obviously increased, and the chip packaging efficiency is greatly improved on the premise of not enlarging the chip packaging area. The density of circuit wiring is greatly improved, so that the connection requirement of a complex circuit can be easily met, and powerful support is provided for electronic equipment to realize integration of more functions.

Description

Technical Field

[0001] This utility model belongs to the field of electronic packaging technology, specifically, it relates to a chip packaging structure. Background Technology

[0002] In today's wave of digitalization, electronic devices are rapidly advancing towards high integration, lightweight portability, and superior performance. The booming development of cutting-edge technologies such as 5G communication, artificial intelligence, and big data processing has placed almost stringent demands on the core "chips" of electronic devices and their packaging technologies.

[0003] However, the shortcomings of existing chip packaging structures are becoming increasingly apparent when faced with today's complex circuit requirements. In terms of circuit wiring density, conventional packaging methods are struggling to accommodate the massive number of electronic component connections, resulting in intricate and complex wiring. Utility Model Content

[0004] In view of the shortcomings of the prior art described above, this utility model provides a chip packaging structure, including a printed circuit board (PCB). An assembly mechanism is disposed on the surface of the PCB, and the assembly mechanism includes multiple wiring layers arranged in parallel. A heat dissipation mechanism is disposed above the assembly mechanism, and a chip mechanism is mounted between the assembly mechanism and the heat dissipation mechanism. The chip mechanism includes a chip body and multiple solder layers. The number and position of the solder layers correspond one-to-one with the multiple wiring layers. Each solder layer has multiple solder balls arranged in an array on the side facing the wiring layer. This utility model, by setting multiple parallel solder layers in the chip mechanism, with multiple solder balls arranged in an array on each solder layer, and the solder balls on adjacent solder layers being staggered, significantly increases the number of electrical connection points between the chip body and the PCB. Without increasing the chip packaging area, it greatly improves the density of circuit wiring, thus easily meeting the connection requirements of complex circuits and providing strong support for the integration of more functions in electronic devices.

[0005] To achieve the above and other related objectives, this utility model provides a chip packaging structure, comprising:

[0006] Printed circuit boards;

[0007] An assembly mechanism includes a mounting base and wiring layers. The mounting base is disposed on the surface of the printed circuit board, and the mounting base has multiple wiring layers arranged side by side in a first direction.

[0008] A heat dissipation mechanism is disposed above the assembly mechanism;

[0009] The chip assembly, located between the assembly mechanism and the heat dissipation mechanism, includes a chip body and a solder layer. The chip body is disposed near the heat dissipation mechanism, and the solder layer is disposed near the assembly mechanism. The number and position of the solder layer correspond one-to-one with the wiring layer. The side of the solder layer facing the wiring layer has a plurality of solder balls arranged in an array. The plurality of solder balls on two adjacent solder layers are staggered in a second direction, which is perpendicular to the first direction.

[0010] Optionally, the printed circuit board has through holes at its four corners, and the inner wall of each through hole is fitted with a metal ring.

[0011] Optionally, the wiring layer has a plurality of pads arranged in an array on the side facing the solder layer, and the number and position of the pads correspond one-to-one with the solder balls.

[0012] Optionally, the number of wiring layers is at least three.

[0013] Optionally, the mounting base is provided with multiple slots at its edge for connecting the heat dissipation mechanism.

[0014] Optionally, the heat dissipation mechanism includes a protective cover and a heat dissipation plate, with the heat dissipation plate located on the top surface of the protective cover.

[0015] Optionally, multiple locking blocks are provided at the edge of the bottom surface of the protective cover, and the number and position of the locking blocks correspond one-to-one with the locking slots, for connecting the mounting base.

[0016] Optionally, the heat sink has heat dissipation fins.

[0017] Optionally, in the first direction, the thickness of the weld layer at the middle position is greater than the thickness of the weld layer at the two side positions.

[0018] Optionally, the chip body and the solder layer are connected by metal wires.

[0019] The chip packaging structure provided by this utility model has at least the following beneficial effects:

[0020] 1) The chip structure includes multiple parallel solder layers, each with an array of solder balls. The solder balls on adjacent solder layers are staggered, which significantly increases the number of electrical connection points between the chip body and the printed circuit board. Without increasing the chip package area, the density of circuit wiring is greatly improved, which can easily meet the connection requirements of complex circuits and provide strong support for electronic devices to achieve more functional integration. At the same time, the optimized signal transmission path greatly reduces signal interference, ensures the efficiency and stability of signal transmission, and effectively improves the overall operating performance of electronic devices.

[0021] 2) By setting up a heat dissipation mechanism to protect the chip structure, heat is also quickly dissipated into the surrounding environment, thereby effectively reducing the chip's operating temperature. This not only helps to improve the chip's working efficiency, but also significantly extends the lifespan of the chip and the entire electronic device. Attached Figure Description

[0022] Figures 1a-1b The diagram shown is a schematic representation of the chip packaging structure provided in the embodiment.

[0023] Figure 2 The diagram shown is a structural schematic of the assembly mechanism provided in the embodiment.

[0024] Figure 3 The diagram shown is a schematic representation of the chip mechanism provided in the embodiment.

[0025] Component designation explanation

[0026] 1 Printed Circuit Board

[0027] 10 Through Holes

[0028] 2 Assembly mechanism

[0029] 21 Mounting base

[0030] 22 Wiring Layer

[0031] 23 Card Slots

[0032] 24 pads

[0033] 3. Heat dissipation mechanism

[0034] 31 Protective Shield

[0035] 32 Heat sink

[0036] 33 Card Blocks

[0037] 34 Heat dissipation fins

[0038] 4. Chip Structure

[0039] 41 Chip Body

[0040] 42 weld layer

[0041] 43 Metal wire

[0042] 44 Welding balls Detailed Implementation

[0043] The following specific examples illustrate the implementation of this utility model. Those skilled in the art can easily understand other advantages and effects of this utility model from the content disclosed in this specification. This utility model can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of this utility model.

[0044] It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of this utility model. Although the illustrations only show components related to this utility model and are not drawn according to the actual number, shape and size of the components, the shape, quantity, positional relationship and proportion of each component can be arbitrarily changed under the premise of realizing the technical solution of this utility model, and the layout of the components may also be more complex.

[0045] Example

[0046] This embodiment provides a chip packaging structure, such as Figures 1a-1b As shown, it includes a printed circuit board 1, an assembly mechanism 2, a heat dissipation mechanism 3, and a chip mechanism 4. The printed circuit board 1 serves as the basic carrier, providing a basic platform for support and electrical connection for the entire packaging structure. The assembly mechanism 2 is located on the surface of the printed circuit board 1, the heat dissipation mechanism 3 is located above the assembly mechanism 2, and the chip mechanism 4 is located between the assembly mechanism 2 and the heat dissipation mechanism 3.

[0047] like Figures 1a-1b As shown, the printed circuit board (PCB) 1 has through holes 10 at its four corners, and the inner wall of the through holes 10 is fitted with a metal ring (not shown in the figure). As an example, the through holes 10 cooperate with bolts (not shown in the figure) to connect the printed circuit board 1 to an external structure, thereby achieving assembly; the metal rings (not shown in the figure) on the inner wall of the through holes 10 effectively protect the inner wall of the through holes 10, reducing damage to the inner wall of the through holes 10 caused by the bolts, and preventing breakage at the corners of the printed circuit board 1.

[0048] like Figure 2 As shown, the assembly mechanism 2 includes a mounting base 21 and wiring layers 22. The mounting base 21 is disposed on the surface of the printed circuit board 1, and multiple wiring layers 22 are arranged in the mounting base 21 along a first direction ( Figure 2 The wiring layers 22 are arranged side-by-side (as shown in the X-axis direction). The mounting base 21 is firmly connected to the surface of the printed circuit board 1, and the multiple wiring layers 22 arranged side-by-side inside it are responsible for orderly connecting the external circuits and the chip mechanism 4, providing a path for signal transmission.

[0049] As an example, the edge of the mounting base 21 is provided with multiple slots 23 for connecting the heat dissipation mechanism 3.

[0050] As an example, the number of wiring layers 22 is at least three; the side of the wiring layer 22 facing the chip assembly 4 has a plurality of pads 24 arranged in an array, which can provide corresponding solder points for the welding of the assembly assembly 2 and the chip assembly 4, and play a role in realizing the transmission of different types of signals.

[0051] like Figure 3 As shown, the chip structure 4 includes a chip body 41 and a solder layer 42. The chip body 41 is located near the heat dissipation mechanism 3, and the solder layer 42 is located near the assembly mechanism 2. The chip body 41 and the solder layer 42 are connected by a metal wire 43.

[0052] As an example, solder layers 42 are mounted inside the mounting base 21, and the number and position of solder layers 42 correspond one-to-one with the wiring layers 22, meaning there are at least three solder layers 42. More solder layers 42 mean that more electrical connection points can be provided within the same chip package area, which allows for denser and more complex circuit wiring on the printed circuit board 1, meeting the chip's needs for a large number of data transmission lines and complex functional circuit connections.

[0053] As an example, the side of the solder layer 42 facing the wiring layer 22 has a plurality of solder balls 44 arranged in an array, and the number and position of the solder balls 44 correspond one-to-one with the pads 24. When the chip mechanism 4 is working, the electrical signal generated by the chip body 41 is conducted to the solder layer 42 through the metal wire 43, and then transmitted to the wiring layer 22 of the printed circuit board 1 through the solder balls 44 mounted in the bottom array, realizing the electrical connection and signal interaction between the chip and the external circuit.

[0054] As an example, multiple solder balls 44 on two adjacent solder layers 42 in the second direction ( Figure 3 The solder balls 44 of different solder layers 42 are arranged in an alternating pattern (as shown in the Y-axis direction), meaning that they are not perfectly aligned but staggered. Figure 3 Taking the multiple solder balls 44 at the middle position (shown in the Y-axis direction) as an example, the connection line of the multiple solder balls 44 on the middle solder layer 42 is L1, and the connection line of the multiple solder balls 44 on the edge solder layer 42 is L2. The connection line L1 and the connection line L2 do not coincide. The same applies to the solder balls 44 at other positions on two adjacent solder layers 42. The above design can increase the number of electrical connection points, allowing the chip to have more connection channels with external circuits within the same package area, thus improving the circuit wiring density. At the same time, it can also optimize the signal transmission path. The solder balls of different solder layers can provide more diverse signal transmission lines, reduce mutual interference between signals, and improve the electrical performance of the chip package structure.

[0055] As an example, in the first direction ( Figure 3In the X-axis direction (as shown), the thickness of the solder layer 42 in the middle position is greater than the thickness of the solder layers 42 on both sides. The thicker middle solder layer 42 can provide better shielding, reduce crosstalk between adjacent signals, improve the isolation between different signals, ensure that each signal can be transmitted independently and accurately, and avoid data errors or system failures caused by mutual interference between signals. In addition, combined with multiple solder balls 44 on two adjacent solder layers 42 in the second direction ( Figure 3 The staggered arrangement design (as shown in the Y-axis direction) of the solder balls 44 on multiple solder layers 42 presents a similar "staggered stacking" shape. This staggered arrangement makes the entire solder ball array form a more complex but more efficient structure in three-dimensional space.

[0056] like Figure 1b As shown, the heat dissipation mechanism 3 includes a protective cover 31 and a heat sink 32, with the heat sink 32 located on the top surface of the protective cover 31. During operation, the chip body 41 generates heat. The heat dissipation mechanism 3 is mounted on the top of the assembly mechanism 2, and its function is to dissipate the heat generated by the chip assembly 41 in a timely manner to ensure that the chip operates stably within a suitable temperature range. The heat is transferred from the chip body 41 to the solder layer 42, then conducted through the solder balls 44 to the mounting base 21, and finally quickly dissipated into the surrounding environment by the heat dissipation mechanism 3.

[0057] As an example, multiple locking blocks 33 are provided at the edge of the bottom surface of the protective cover 31. The number and position of the locking blocks 33 correspond one-to-one with the locking slots 23, and are used to connect the mounting base 21. During the assembly process, after the protective cover 31 is fitted onto the top of the mounting base 21, the locking blocks 33 at the bottom of the protective cover 31 are simultaneously inserted into the interior of the locking slots 23. After insertion, due to the complementary shapes, a certain friction or resistance will be generated between the locking blocks 33 and the locking slots 23. This friction or resistance makes it difficult for the protrusion to fall out of the groove, thereby achieving the locking effect between the assembly mechanism 2 and the heat dissipation mechanism 3.

[0058] As an example, the heat sink 32 can effectively absorb and conduct the heat emitted by the chip structure 4. The heat sink 32 has heat dissipation fins 34, which are used to increase the heat dissipation area and can more effectively transfer heat to the air, thereby improving the overall heat dissipation efficiency. This design allows the heat sink 32 to dissipate more heat in the same amount of time, which helps to maintain the temperature stability of the device or space.

[0059] The above embodiments are merely illustrative of the principles and effects of this utility model and are not intended to limit the scope of this utility model. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of this utility model. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in this utility model should still be covered by the claims of this utility model.

Claims

1. A chip packaging structure, characterized in that, include: Printed circuit boards; An assembly mechanism includes a mounting base and wiring layers. The mounting base is disposed on the surface of the printed circuit board, and the mounting base has multiple wiring layers arranged side by side in a first direction. A heat dissipation mechanism is disposed above the assembly mechanism; The chip assembly, located between the assembly mechanism and the heat dissipation mechanism, includes a chip body and a solder layer. The chip body is disposed near the heat dissipation mechanism, and the solder layer is disposed near the assembly mechanism. The number and position of the solder layer correspond one-to-one with the wiring layer. The side of the solder layer facing the wiring layer has a plurality of solder balls arranged in an array. The plurality of solder balls on two adjacent solder layers are staggered in a second direction, which is perpendicular to the first direction.

2. The chip packaging structure according to claim 1, characterized in that, The printed circuit board has through holes at its four corners, and the inner wall of each through hole is fitted with a metal ring.

3. The chip packaging structure according to claim 1, characterized in that, The wiring layer has multiple pads arranged in an array on the side facing the solder layer, and the number and position of the pads correspond one-to-one with the solder balls.

4. The chip packaging structure according to claim 1, characterized in that, The number of wiring layers is at least three.

5. The chip packaging structure according to claim 1, characterized in that, The mounting base has multiple slots at its edge for connecting the heat dissipation mechanism.

6. The chip packaging structure according to claim 5, characterized in that, The heat dissipation mechanism includes a protective cover and a heat dissipation plate, with the heat dissipation plate located on the top surface of the protective cover.

7. The chip packaging structure according to claim 6, characterized in that, Multiple locking blocks are provided at the edge of the bottom surface of the protective cover. The number and position of the locking blocks correspond one-to-one with the locking slots and are used to connect the mounting base.

8. The chip packaging structure according to claim 6, characterized in that, The heat sink has heat dissipation fins.

9. The chip packaging structure according to claim 1, characterized in that, In the first direction, the thickness of the weld layer at the middle position is greater than the thickness of the weld layer at the two sides.

10. The chip packaging structure according to claim 1, characterized in that, The chip body and the solder layer are connected by metal wires.

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