Solar cell and photovoltaic module

Abstract

The utility model provides a solar cell and a photovoltaic module, and the cell comprises a substrate which is provided with a front surface, a back surface and a side surface; the emitter layer is located on the front surface, and the doping type of the emitter layer is opposite to that of the substrate; the first passivation layer is located on the side, away from the substrate, of the emitter layer; the first electrode is electrically connected with the emitter layer; the tunneling dielectric layer is positioned on the back surface; the doped conductive layer is located on one side, away from the substrate, of the tunneling dielectric layer, and the doping type of the doped conductive layer is the same as that of the substrate; the second passivation layer is located on the side, away from the substrate, of the doped conductive layer; the second electrode is electrically connected with the doped conductive layer; and at least one conductive structure in contact with the emitter layer and the doped conductive layer, respectively. The conductive structure can replace a current flowing path of the battery to normally transmit most of current from the doped conductive layer to the emitter layer, the generating capacity and the power of the battery are not greatly influenced, and the problem that the battery efficiency is low when the battery generates a hot spot effect is solved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of solar cells, in particular to a solar cell and a photovoltaic module. BACKGROUND

[0002] A conventional tunnel oxide passivating contact (TopCon) cell is made into a module, which is usually installed in a place with a wide area and sufficient sunlight, but it is inevitable to be blocked by dust, fallen leaves and other objects during long-term use, forming a local shadow. The active degree of electron transition in this part is reduced, the corresponding resistance is increased, the temperature is increased, and a hot spot effect is formed. In addition, there may be hidden cracks in a single cell unit in the module, and the resistance of the hidden crack part is increased, which also causes a hot spot effect.

[0003] The hot spot effect can cause the power of the module to decrease, and the power generation to decrease. If the heat exceeds a certain limit, it will cause permanent damage such as dark spots, melting of welding points, and damage of packaging materials. CONTENT OF THE INVENTION

[0004] The main purpose of the present application is to provide a solar cell and a photovoltaic module to solve the problem of reduced cell efficiency caused by the hot spot effect of the solar cell in the prior art.

[0005] In order to achieve the above-mentioned purpose, according to one aspect of the present application, a solar cell is provided, comprising: a substrate having a front surface, a back surface and a side surface; an emitter layer located on the front surface, the emitter layer being opposite in doping type to the substrate; a first passivation layer located on a side of the emitter layer away from the substrate; a first electrode electrically connected to the emitter layer; a tunneling medium layer located on the back surface; a doped conductive layer located on a side of the tunneling medium layer away from the substrate, the doped conductive layer being the same in doping type as the substrate; a second passivation layer located on a side of the doped conductive layer away from the substrate; a second electrode electrically connected to the doped conductive layer; and at least one conductive structure in contact with the emitter layer and the doped conductive layer, respectively.

[0006] Optionally, the conductive structure is in contact with the side surface of the substrate, the side surface of the emitter layer and the side surface of the doped conductive layer.

[0007] Optionally, at least part of at least one of the first side surface, the second side surface, the third side surface and the fourth side surface is a passivated surface, the first side surface being a side surface of the conductive structure in contact with a side surface of the substrate, a side surface of the emitter layer and a side surface of the doped conductive layer respectively, the second side surface being a side surface of the substrate in contact with the conductive structure, the third side surface being a side surface of the emitter layer in contact with the conductive structure, the fourth side surface being a side surface of the doped conductive layer in contact with the conductive structure, the passivated surface being a surface after passivation treatment.

[0008] Optionally, the conductive structure comprises a first portion, a second portion and a third portion, wherein the first portion is in contact with the emitter layer, the second portion is in contact with the doped conductive layer, and the third portion is spaced apart from the side surface and connected to the first portion and the second portion respectively.

[0009] Optionally, the conductive structure is arranged in a circumferential direction of the side surface of the substrate.

[0010] Optionally, a minimum distance between two adjacent conductive structures is 90 μm to 110 μm.

[0011] Optionally, a proportion of the conductive structure on the side surface of the substrate is 25% to 50%.

[0012] Optionally, the conductive structure comprises a third passivation layer and a first conductive layer, the third passivation layer is between the first conductive layer and the substrate, and the first conductive layer is in contact with the emitter layer and the doped conductive layer respectively.

[0013] Optionally, the conductive structure comprises a first conductive layer and a second conductive layer, the second conductive layer is between the first conductive layer and the side surface of the substrate, the second conductive layer is the same material as the tunneling medium layer, and the first conductive layer is the same material as the doped conductive layer.

[0014] According to another aspect of the present application, there is provided a photovoltaic module comprising a plurality of the solar cells.

[0015] The technical scheme of the application provides a solar cell, which comprises a substrate, an emitter layer, a first passivation layer, a first electrode, a tunneling medium layer, a doped conductive layer, a second passivation layer, a second electrode and a conductive structure, wherein the conductive structure is in contact with the emitter layer and the doped conductive layer respectively, in the case that the solar cell is shaded or has a hidden crack and further generates a hot spot effect, the solar cell becomes a larger load and damages the current flow of the entire solar cell, at this time, the conductive structure replaces the current flow path of the solar cell and normally conducts most of the current from the doped conductive layer to the emitter layer, thereby reducing the influence on the efficiency of the solar cell in the case that the solar cell generates a hot spot effect, in other words, even if the solar cell generates a hot spot effect, since the solar cell has a backup current path, most of the current can be normally transmitted, and the power generation capacity and power of the solar cell are not greatly affected, and the problem of low battery efficiency of the solar cell in the case of generating a hot spot effect is improved. BRIEF DESCRIPTION OF DRAWINGS

[0016] The drawings accompanying the specification of the present application form a part thereof, serve to provide further understanding of the present application, and together with the description of the present application, serve to explain the present application, and do not constitute improper limitations to the present application. In the drawings:

[0017] Figure 1 A cross-sectional structure schematic diagram of a solar cell is shown according to an embodiment of the present application;

[0018] Figure 2 Another cross-sectional structure schematic diagram of a solar cell is shown according to an embodiment of the present application;

[0019] Figure 3 Still another cross-sectional structure schematic diagram of a solar cell is shown according to an embodiment of the present application;

[0020] Figure 4 Still another cross-sectional structure schematic diagram of a solar cell is shown according to an embodiment of the present application;

[0021] Figure 5 A cross-sectional structure schematic diagram of a solar cell is shown according to an embodiment of the present application; Figure 1 or Figure 2 A cross-sectional structure schematic diagram of a solar cell is shown according to an embodiment of the present application;

[0022] Figure 6 Another cross-sectional structure schematic diagram of a solar cell is shown according to an embodiment of the present application; Figure 1 or Figure 2 Another cross-sectional structure schematic diagram of a solar cell is shown according to an embodiment of the present application;

[0023] Figure 7 Still another cross-sectional structure schematic diagram of a solar cell is shown according to an embodiment of the present application;

[0024] Figure 8Fig. 3 shows a cross-sectional structure of another solar cell according to an embodiment of the present application.

[0025] In the drawings, like reference numerals refer to like items throughout the various figures and embodiments.

[0026] 10, substrate; 20, emitter layer; 30, first passivation layer; 40, first electrode; 50, tunneling dielectric layer; 60, doped conductive layer; 70, second passivation layer; 80, second electrode; 90, conductive structure; 91, first portion; 92, second portion; 93, third portion; 94, third passivation layer; 95, first conductive layer; 96, second conductive layer. DETAILED DESCRIPTION

[0027] It should be noted that the following detailed description is merely exemplary in nature and is intended to provide further description of the application. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs.

[0028] It is to be understood that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of example embodiments in accordance with the present application. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and / or "comprising," when used in this specification, specify the presence of stated features, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, steps, operations, elements, components, and / or groups thereof.

[0029] It should be noted that the terms "first", "second", and the like, used in the description and the claims of the present application as well as above-mentioned drawings of the application merely denote different instances of similar objects without necessarily requiring or implying any specific order or chronology thereof. It is to be understood that the data thus used in the description can be interchanged, where appropriate, to describe embodiments of the application described herein. Furthermore, the terms "comprising", "containing", "having" and "including" and any variations thereof used herein are intended to cover a non-exclusive inclusion such that a process, method, system, product or apparatus that comprises, contains, has or includes a list of steps or elements, but not only those steps or elements, can include other steps or elements not expressly listed or inherent to such process, method, system, product or apparatus.

[0030] It will be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" another element, it can be directly on the other element or intervening elements can also be present. In addition, it will be understood that when an element is referred to as being "connected" to another element, it can be directly connected to the other element, or electrically connected to the other element via a third element.

[0031] For the convenience of description, the following describes some nouns or terms related to embodiments of the present application:

[0032] Hot spot effect: under certain conditions, a shaded solar cell module in a series branch will consume the energy generated by other solar cell modules with light, as a load. The shaded solar cell module will heat up at this time, forming a hot spot effect.

[0033] As introduced in the background, solar cells will inevitably be shaded by dust, fallen leaves and other objects during long-term use, forming local shadows. The active level of electron transition in this part decreases, the corresponding resistance increases, and the temperature rises, forming a hot spot effect. To solve the problem of reduced battery efficiency caused by the hot spot effect of solar cells, embodiments of the present application provide a solar cell and a photovoltaic module.

[0034] As shown in Figure 1 and Figure 2 , the above-mentioned solar cell comprises: a substrate 10 having a front surface, a back surface and a side surface; an emitter layer 20 located on the front surface, the emitter layer 20 being opposite in doping type to the substrate 10; a first passivation layer 30 located on the side of the emitter layer 20 away from the substrate 10; a first electrode 40 electrically connected to the emitter layer 20; a tunneling dielectric layer 50 located on the back surface; a doped conductive layer 60 located on the side of the tunneling dielectric layer 50 away from the substrate 10, the doped conductive layer 60 being the same in doping type as the substrate 10; a second passivation layer 70 located on the side of the doped conductive layer 60 away from the substrate 10; a second electrode 80 electrically connected to the doped conductive layer 60; and at least one conductive structure 90 in contact with the emitter layer 20 and the doped conductive layer 60, respectively.

[0035] By providing at least one conductive structure on the side surface of the solar cell, the conductive structure forms a current flow path with the emitter layer and the doped conductive layer, thus providing the solar cell with at least one standby current flow path. In the case of shading or cracking of the solar cell, thus generating a hot spot effect, the current channel formed by the doped conductive layer, the tunneling dielectric layer, the substrate and the emitter layer in the solar cell increases the resistance to current, so that most of the current flows from the doped conductive layer, through the conductive structure and into the emitter layer, i.e. most of the current flows through the standby current flow path, and only a small amount of current flows through the current channel in the original solar cell, thereby reducing the amount of current flowing through the load. This can reduce the current density and temperature of the local area of the solar cell that generates a hot spot effect, and thus reduce the impact on the battery efficiency of the solar cell in the case of a hot spot effect. In other words, even if the solar cell generates a hot spot effect, it can still normally transmit most of the current due to the standby current path, and will not have a great impact on the power generation and power of the battery, thus improving the problem of low battery efficiency when the battery generates a hot spot effect.

[0036] In some embodiments, the material of the substrate can be an elemental semiconductor material. The elemental semiconductor material is composed of a single element, such as silicon or germanium. The elemental semiconductor material can be at least one of a single-crystalline state, a polycrystalline state, an amorphous state, or a microcrystalline state (a state having both a single-crystalline state and an amorphous state, referred to as a microcrystalline state). The material of the substrate can also be a compound semiconductor material. Common compound semiconductor materials include, but are not limited to, silicon germanium, silicon carbide, gallium arsenide, indium gallium, perovskite, cadmium telluride, copper indium selenium, and the like.

[0037] In some embodiments, the substrate can be an N-type semiconductor substrate or a P-type semiconductor substrate. The N-type semiconductor substrate is doped with an N-type doping element, which can be any one of a group V element, such as a phosphorus (P) element, a bismuth (Bi) element, an antimony (Sb) element, or an arsenic (As) element. The P-type semiconductor substrate is doped with a P-type element, which can be any one of a group III element, such as a boron (B) element, an aluminum (Al) element, a gallium (Ga) element, or an indium (In) element.

[0038] In some embodiments, the emitter layer material on the front side of the solar cell includes one or more stacked composite thin film layers of N-type doped or P-type doped amorphous silicon, amorphous silicon oxide, amorphous silicon carbide, microcrystalline silicon, hydrogenated microcrystalline silicon, microcrystalline silicon oxide, microcrystalline silicon carbide, or polycrystalline silicon semiconductor thin film. The doping element in the emitter layer is of a different conductivity type than the doping element of the substrate, for example, the substrate has an N-type doping element and the emitter layer has a P-type doping element, or the substrate has a P-type doping element and the emitter layer has an N-type doping element. In this way, a PN junction is formed between the substrate and the emitter layer, and the minority carriers and the majority carriers flow to the corresponding P region and N region under the respective forces, which is beneficial to accelerating the mobility of the carriers.

[0039] In some embodiments, the doped conductive layer is an emitter layer at the back side of the solar cell, and the material includes at least one of a doped amorphous silicon layer, a doped polycrystalline silicon layer, a doped microcrystalline silicon layer, a doped silicon carbide layer, or a doped crystalline silicon layer. The doping element in the doped conductive layer is of the same conductivity type as the doping element of the substrate, for example, the substrate has an N-type doping element and the doped conductive layer has an N-type doping element, or the substrate has a P-type doping element and the doped conductive layer has a P-type doping element. In this way, the doped conductive layer and the substrate have the same conductivity type of doping element, and by setting the concentration of the doping element in the doped conductive layer to be greater than the concentration of the doping element in the substrate, a high-low junction is formed between the substrate and the doped conductive layer. Under the action of the built-in electric field formed by the high-low junction, the carriers can quickly migrate from the substrate to the doped conductive layer, and then be collected by the first electrode.

[0040] In some embodiments, the material of the tunneling medium layer can include at least one of silicon oxide, silicon oxynitride, titanium oxide, and silicon nitride, and the thickness of the tunneling medium layer is generally small, about 1.5 nm to 2 nm, and the specific thickness can be set according to actual conditions, which is not limited herein. Exemplarily, the tunneling medium layer can be an ultra-thin silicon oxide layer, so that the tunneling medium layer has good passivation characteristics, and can make the carriers more easily tunnel from the substrate to the doped conductive layer. In some feasible implementations, the tunneling medium layer can be formed on the back side of the substrate by using an ozone oxidation method, a high-temperature thermal oxidation method, a nitric acid oxidation method, a chemical vapor deposition method, or a low-pressure chemical vapor deposition method.

[0041] The tunneling medium layer described above reduces the interface state density between the back side of the substrate (N-type base) and the doped conductive layer, so that the concentration of majority carriers is much higher than that of minority carriers, thereby reducing the recombination probability of electrons and holes, increasing the fill factor, short-circuit current, and open-circuit voltage of the solar cell, and improving the cell efficiency of the solar cell.

[0042] In some embodiments, the first passivation layer can inhibit the recombination of carriers at the emitter layer interface, which can avoid the problem of reducing the photo-generated current due to carrier recombination, thereby ensuring that the cell efficiency of the cell is high. Optionally, the material of the first passivation layer described above can be a single-layer film layer or a composite film layer of aluminum oxide, silicon nitride, silicon oxide, and silicon oxynitride. For example, when the first passivation layer is a single-layer film layer, the first passivation layer can be an aluminum oxide single-layer film layer, a silicon nitride single-layer film layer, a silicon oxide single-layer film layer, or a silicon oxynitride single-layer film layer; when the first passivation layer is a multi-layer film layer, the first passivation layer can be a composite film layer of aluminum oxide and silicon oxide, or a composite film layer of aluminum oxide, silicon oxide, and silicon nitride. Of course, the material of the first passivation layer of the present application is not limited to the above-mentioned materials, and any suitable material can be selected by those skilled in the art to form the first passivation layer of the present application according to actual conditions.

[0043] In some embodiments, the second passivation layer can also inhibit the recombination of carriers at the doped conductive layer interface, thereby ensuring that the cell efficiency of the cell is high. Similarly, the material of the second passivation layer can be a single-layer film layer or a composite film layer of aluminum oxide, silicon nitride, silicon oxide, and silicon oxynitride, and the film layer combination of the second passivation layer can refer to the description of the film layer combination of the first passivation layer, which is not repeated herein.

[0044] In some embodiments, the material of the conductive structure can be any one of a metal material, a semiconductor material, a metal oxide material and a metal nitride material. When the material of the conductive structure is a metal material, the metal material can be at least one of silver, aluminum, copper, tin, gold, lead or nickel. The metal layer has a smaller resistance, and thus, for the solar cell, the metal layer can have a smaller area on the side surface while ensuring a conductive channel with a large enough overcurrent capacity, thereby improving the area of the solar cell side surface that is shielded and improving the aesthetic appearance. Moreover, the metal layer has a high self-stability, which can reduce the corrosion and damage of the metal layer by the external environment.

[0045] When the material of the conductive structure is a metal oxide material, the metal oxide material can be tin oxide, copper oxide, silver oxide, zinc oxide, tungsten oxide and cobalt oxide, etc. When the material of the conductive structure is a metal nitride material, the metal nitride material can be titanium nitride, tungsten nitride, zinc nitride and cobalt nitride, etc. By using the conductivity and passivation of the metal oxide material or the metal nitride material, the physical conduction between the emitter layer and the doped conductive layer can be achieved, and the conductive structure can passivate the side surface of the substrate to reduce the recombination rate of the side surface.

[0046] When the material of the conductive structure is a semiconductor material, the contact performance between the conductive structure and the emitter layer or the doped conductive layer is good, and the conductive structure can be formed on the side surface simultaneously in the process of preparing the doped conductive layer and / or the tunneling medium layer, thereby omitting at least one step of going around plating, reducing the preparation process and thus reducing the preparation cost.

[0047] When the material of the conductive structure is a metal material, a metal oxide and a metal nitride, the structure of the solar cell can be as shown in FIG. 1, the conductive structure and the tunneling medium layer are different structures, and the conductive structure and the doped conductive layer are different structures. Figure 1 When the material of the conductive structure is a semiconductor material, the structure of the solar cell can be as shown in FIG. 2, part of the conductive structure and the tunneling medium layer are the same structure and / or part of the conductive structure and the doped conductive layer are the same structure. Figure 2

[0048] In some optional embodiments, as shown in FIG. 3, the conductive structure and the tunneling medium layer are the same structure, and / or the conductive structure and the doped conductive layer are the same structure. Figure 3 ​As shown, the conductive structure 90 is in contact with the side surface of the substrate 10, the side surface of the emitter layer 20 and the side surface of the doped conductive layer 60. There is only one conductive structure 90 on each side surface of the substrate 10 of the solar cell, which covers the side surfaces of the substrate 10, the emitter layer 20 and the doped conductive layer 60. When the solar cell is shaded or there is a hidden crack, the conductive structure 90 will guide most of the current from the doped conductive layer 60 into the emitter layer 20. The side surface of the conductive structure 90 is in contact with the side surface of the substrate 10, the emitter layer 20 and the doped conductive layer 60 respectively, which can make the current flow path shorter and reduce current loss. And only one conductive structure 90 is used on the side surface of the substrate 10, which makes the volume of the solar cell smaller, the structure simpler, and the process of preparing the conductive structure 90 simpler, further improving the preparation efficiency of the cell. Figure 3 Structural references not mentioned in the above description Figure 1 and Figure 2 .

[0049] In some optional embodiments, at least part of at least one of the first side surface, the second side surface, the third side surface and the fourth side surface is a passivated surface, the first side surface is a side surface where the conductive structure is in contact with the side surface of the substrate, the side surface of the emitter layer and the side surface of the doped conductive layer respectively, the second side surface is a side surface where the substrate is in contact with the conductive structure, the third side surface is a side surface where the emitter layer is in contact with the conductive structure, the fourth side surface is a side surface where the doped conductive layer is in contact with the conductive structure, and the passivated surface is a surface after passivation treatment. Passivation treatment of any one or more of the above-mentioned first side surface, second side surface, third side surface and fourth side surface can reduce the phenomenon of surface carrier recombination, which can avoid the problem of reducing photo-generated current caused by carrier recombination, thereby further ensuring that the photoelectric conversion efficiency of the cell is high. For example, the surface subjected to passivation treatment can be one, two, three or four, and the more passivated surfaces, the better the corresponding effect.

[0050] In some optional embodiments, as shown in Figure 4 The conductive structure 90 includes a first part 91, a second part 92 and a third part 93, wherein: the first part 91 is in contact with the emitter layer 20, the second part 92 is in contact with the doped conductive layer 60, and the third part 93 is arranged in a spaced manner with the side surface and connected with the first part 91 and the second part 92 respectively. The conductive structure 90 is not in contact with the side surface of the substrate 10, which can avoid the phenomenon of carrier recombination caused by the contact between the conductive structure 90 and the side surface of the substrate 10, which can avoid the problem of reducing photo-generated current caused by carrier recombination, thereby further ensuring that the photoelectric conversion efficiency of the cell is high. Figure 4 Structural references not mentioned in the above description Figure 1 andFigure 2 The description.

[0051] In some embodiments, the materials of the first part, the second part, and the third part may be the same or different. For example, the materials of the first part, the second part, and the third part may be any type of metallic material, any type of semiconductor material, or any type of metal oxide or metal nitride. The materials of the first part, the second part, and the third part may also be any combination of metallic materials, semiconductor materials, metal oxides, and metal nitrides, respectively. There is no specific limitation on the selection of materials for the first part, the second part, and the third part.

[0052] In some alternative implementations, such as Figure 5 and Figure 6 As shown, conductive structures 90 are arranged at intervals on the circumferential direction of the side surface of the substrate 10. Figure 5 and Figure 6 For along Figure 1 or Figure 2 A schematic diagram of the side surface of the solar cell viewed from direction A. Multiple conductive structures 90 are arranged on the side surface of the substrate 10 to provide multiple conductive paths for current, allowing more current to flow simultaneously and more effectively preventing overheating in localized areas of the solar cell.

[0053] In some alternative implementations, such as Figure 5 and Figure 6 As shown, the minimum distance between two adjacent conductive structures 90 is 90μm to 110μm. Setting the spacing between adjacent conductive structures 90 within this range not only ensures a shorter current flow path to the conductive structure 90, reducing current loss, but also avoids circuit interference between adjacent conductive structures 90, thereby further ensuring improved cell efficiency when hot spot effects occur. Furthermore, limiting the spacing between adjacent conductive structures 90 simplifies the control conditions of the fabrication process and reduces process complexity. Figure 5 The material of the conductive structure 90 is different from that of the doped conductive layer 60. Figure 6 The material of the conductive structure 90 is the same as that of the doped conductive layer 60.

[0054] In some optional embodiments, the conductive structure located on the side surface of the substrate occupies 25% to 50% of the side surface area. By setting the range of the conductive structure's area on the side surface of the substrate within the above range, when the solar cell is operating normally without hot spot effect, only a small portion of the charge carriers will recombine through the conductive structure, which has a minimal impact on the photocurrent. This not only ensures the photoelectric conversion efficiency of the cell but also further ensures that the solar cell still has a large cell efficiency and open-circuit voltage.

[0055] In some implementations, multiple solar cells can be connected in series to form a battery string. In the event of a hot spot effect in any one or more solar cells in the battery string, setting the range of the conductive structure's area on the battery side surface to the aforementioned range can ensure that when the current path in the solar cell becomes a load, the current of the solar cells on both sides of the faulty solar cell is promptly turned on, allowing the overall current of the battery string to flow normally, thereby ensuring the overall current output of the battery string.

[0056] In some alternative implementations, such as Figure 7 As shown, the conductive structure 90 includes a third passivation layer 94 and a first conductive layer 95. The third passivation layer 94 is located between the first conductive layer 95 and the substrate 10. The first conductive layer 95 is in contact with the emitter layer 20 and the doped conductive layer 60, respectively. The placement of the third passivation layer 94 between the first conductive layer 95 and the side surface of the substrate 10 avoids direct contact between the first conductive layer and the side surface of the substrate, thereby suppressing carrier recombination at the side surface interface. This prevents a decrease in photocurrent due to carrier recombination, further ensuring a high photoelectric conversion efficiency of the battery.

[0057] Optionally, the material of the third passivation layer can be a single layer or a composite layer such as aluminum oxide, silicon nitride, silicon oxide, and silicon oxynitride.

[0058] In some alternative implementations, such as Figure 8 As shown, the conductive structure 90 includes a first conductive layer 95 and a second conductive layer 96. The second conductive layer 96 is located between the first conductive layer 95 and the side surface of the substrate 10. The material of the second conductive layer 96 is the same as that of the tunneling dielectric layer 50. The second conductive layer 96 does not require additional fabrication processes. It can be formed simultaneously during the fabrication of the tunneling dielectric layer 50, thus eliminating the step of removing the tunneling dielectric layer 50 by plating, reducing fabrication processes, and improving fabrication efficiency. The first conductive layer 95 is made of the same material as the doped conductive layer 60. The first conductive layer 95 also does not require additional fabrication processes. It can be formed simultaneously on the side surface of the substrate 10 during the fabrication of the doped conductive layer 60, thus eliminating the step of removing the doped conductive layer 60 by plating, further improving fabrication efficiency.

[0059] In some embodiments, such as Figure 8As shown, when the material of the second conductive layer 96 is the same as the material of the tunneling dielectric layer 50, because the tunneling dielectric layer 50 has good passivation characteristics, the second conductive layer 96 also has the characteristics, the interface state density between the first conductive layer 95 and the side surface of the substrate 10 can be reduced, the concentration of the majority carriers is much higher than the concentration of the minority carriers, thereby reducing the recombination probability of the electrons and holes, and the minority carriers entering the substrate 10 can more easily tunnel into the first conductive layer 95 through the conductive structure 90 to flow into the emitter layer 20, further reducing the current flowing through the faulty battery. Figure 7 and Figure 8 the structures not mentioned in Figure 1 and Figure 2 are described.

[0060] According to another aspect of the present application, a photovoltaic module is provided, which comprises a plurality of the above-mentioned solar cells.

[0061] In some embodiments, a plurality of the above-mentioned solar cells can be connected in series as a battery string, and one battery string or a plurality of battery strings are connected in parallel to form a photovoltaic module. In the case that any one or more of the solar cells in the battery string exhibits a hot spot effect, the conductive structure can timely conduct the current of the solar cells on the adjacent two sides of the faulty solar cell, so that the overall current of the battery string flows normally, thereby further ensuring the current output of the photovoltaic module.

[0062] The technical solution of the present application can be used in photovoltaic cells such as tunnel oxide passivated contact (TOPcon) cells, TOPcon-IBC (Interdigitated Back Contact, IBC) cells, and laminated cells comprising TOPcon cells.

[0063] The above is the structure of the solar cell of the present application. In the following, the preparation method of the solar cell is introduced by taking the first conductive layer as being prepared by doping and plating, and the second conductive layer as being prepared by plating during the preparation of the tunneling dielectric layer. The preparation method comprises:

[0064] Step S1: providing an N-type single crystal silicon wafer as a substrate, and texturing the substrate to form a double-sided textured structure;

[0065] Step S2: boron-doping the substrate, forming a boron-doped layer (emitter layer) with a junction depth of 1.2 μm on the upper and lower surfaces and the side surface of the substrate, and oxidizing the surface of the boron-doped layer to form a boron-doped silicon oxide layer;

[0066] Step S3: removing the boron-doped silicon oxide layer on the lower surface and the side surface of the substrate by HF, and retaining the boron-doped silicon oxide layer on the upper surface;

[0067] Step S4: Polishing the lower surface and side surface of the substrate protected by the boron-doped silicon oxide layer by using a tank-type alkali etching process, and washing away the boron-doped layer on the lower surface and side surface of the substrate protected by the boron-doped silicon oxide layer, while retaining the boron-doped layer on the upper surface and the boron-doped silicon oxide layer;

[0068] Step S5: Sequentially forming a tunneling medium layer and an amorphous silicon layer on the lower surface and side surface of the substrate, and on the boron-doped silicon oxide layer on the upper surface by using a Low Pressure Chemical Vapor Deposition (LPCVD) process;

[0069] Step S6: Phosphorus-doping the amorphous silicon layer, annealing the amorphous silicon layer to recrystallize and dope the amorphous silicon layer with phosphorus atoms, forming a doped conductive layer (N-type emitter layer), and oxidizing the surface of the doped conductive layer to form a phosphorus-doped silicon oxide layer;

[0070] Step S7: Plating a silicon oxide layer on the surface of the phosphorus-doped silicon oxide layer by using a Plasma-Enhanced Chemical Vapor Deposition (PECVD) process, serving as a mask;

[0071] Step S7: Removing the mask plating and the phosphorus-doped silicon oxide layer on the upper surface of the substrate by using HF, exposing the doped conductive layer on this surface, while retaining the mask and the doped conductive layer on the other surface and the side surface;

[0072] Step S8: Removing the plating and the exposed doped conductive layer by using a tank-type alkali etching process;

[0073] Step S9: Removing the boron-doped silicon oxide layer on the upper surface of the substrate, the phosphorus-doped silicon oxide layer on the lower surface, and the mask by using a tank-type acid etching process and a chemical wet cleaning process, and cleaning the surface of the substrate;

[0074] Step S10: Forming an aluminum oxide or silicon nitride passivation layer on the doped conductive layer and the emitter layer, with the passivation layer on the emitter layer being a first passivation layer and the passivation layer on the doped conductive layer being a second passivation layer;

[0075] Step S11: Opening the first passivation layer and the second passivation layer to expose the emitter layer and the doped conductive layer;

[0076] Step S12: Printing an electrode paste on the first passivation layer and the second passivation layer by using a screen printing process, with the electrode paste contacting the emitter layer and the doped conductive layer, and sintering the electrode paste to form an electrode.

[0077] The above merely provides preferred embodiments of the present application, and is not used to limit the present application. For those skilled in the art, the present application can have various modifications and changes. Any modifications, equivalent replacements, improvements, etc. made within the principles and technical scope of the present application shall fall into the scope of the present application.

Claims

1. A solar cell, characterized by, The solar cell comprises: a substrate having a front surface, a back surface and a side surface; an emitter layer on the front surface, the emitter layer being opposite in doping type to the substrate; a first passivation layer on a side of the emitter layer facing away from the substrate; a first electrode electrically connected to the emitter layer; a tunneling dielectric layer on the back surface; a doped conductive layer on a side of the tunneling dielectric layer facing away from the substrate, the doped conductive layer being the same in doping type as the substrate; a second passivation layer on a side of the doped conductive layer facing away from the substrate; a second electrode electrically connected to the doped conductive layer; at least one conductive structure in contact with the emitter layer and the doped conductive layer respectively.

2. The solar cell according to claim 1, characterized in that, The conductive structure is in contact with the side surface of the substrate, the side surface of the emitter layer and the side surface of the doped conductive layer.

3. The solar cell according to claim 2, characterized in that, At least part of at least one of the first side surface, the second side surface, the third side surface and the fourth side surface is a passivated surface, the first side surface being the side surface of the conductive structure in contact with the side surface of the substrate, the side surface of the emitter layer and the side surface of the doped conductive layer respectively, the second side surface being the side surface of the substrate in contact with the conductive structure, the third side surface being the side surface of the emitter layer in contact with the conductive structure, the fourth side surface being the side surface of the doped conductive layer in contact with the conductive structure, and the passivated surface being a surface after passivation treatment.

4. The solar cell of claim 1, wherein The conductive structure comprises a first part, a second part and a third part, wherein: the first part is in contact with the emitter layer, the second part is in contact with the doped conductive layer, and the third part is spaced apart from the side surface and connected to the first part and the second part respectively.

5. The solar cell according to any one of claims 1 to 4, characterized in that, The spaced apart arrangement of the conductive structure is in the circumferential direction of the side surface of the substrate.

6. The solar cell according to claim 5, characterized in that, The minimum distance between two adjacent conductive structures is 90 μm to 110 μm.

7. The solar cell of claim 1, wherein The proportion of the conductive structure on the side surface of the substrate is 25% to 50% of the area of the side surface.

8. The solar cell of claim 1, wherein, The conductive structure comprises a third passivation layer and a first conductive layer, the third passivation layer is between the first conductive layer and the substrate, and the first conductive layer is in contact with the emitter layer and the doped conductive layer respectively.

9. The solar cell of claim 1, wherein, The conductive structure comprises a first conductive layer and a second conductive layer, the second conductive layer is between the first conductive layer and the side surface of the substrate, the second conductive layer is the same material as the tunneling dielectric layer, and the first conductive layer is the same material as the doped conductive layer.

10. A photovoltaic module, characterized by, The solar cell comprises a plurality of the solar cell according to any one of claims 1 to 9.

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