Probe card for circuit probe test system

Abstract

A probe card for a circuit probe test system. The probe card includes a substrate portion and a probe head including a guide plate below the substrate portion and having a plurality of openings therethrough and a conductive trace on the guide plate and extending between a pair of openings. A plurality of probe pins extend through openings in the guide plate, wherein a pair of probe pins are electrically connected by conductive traces to form a loopback signal path. Thus, loopback signals may be routed through conductive traces located on and / or within the guide plate rather than through a substrate portion of the probe card. This can significantly reduce the total length of the loopback signal path, so that signal integrity during loopback testing of the device under test can be improved.

Description

Technical Field

[0001] This utility model relates to a probe card for a circuit probe testing system. Background Technology

[0002] The semiconductor industry has experienced sustained growth due to the ever-increasing integration density of various electronic components such as transistors, diodes, resistors, and capacitors. To a large extent, this increase in integration density stems from the continuous reduction in the minimum feature size, which allows more components to be integrated into a given area. Utility Model Content

[0003] The purpose of this invention is to provide a probe card for a circuit probe testing system to solve at least one of the above-mentioned problems.

[0004] This invention provides, in several embodiments, a probe card for a circuit probe testing system. The probe card includes a probe head. The probe head includes a guide plate and a plurality of probe pins. The guide plate includes a plurality of openings through the guide plate and conductive traces extending between a pair of openings. The probe pins extend through the openings in the guide plate, wherein a pair of probe pins is electrically connected via the conductive traces to form a loopback signal path.

[0005] According to one embodiment of the present invention, it further includes: a substrate portion, wherein the guide plate is located below the substrate portion, and the plurality of probe pins include at least one first probe pin, wherein the at least one first probe pin forms a continuous conductive path along a length of the first probe between a tip of the first probe and the substrate portion of the probe card.

[0006] According to one embodiment of the present invention, the plurality of probe pins include at least one second probe pin, which is in electrical contact with the conductive trace of the guide plate.

[0007] According to one embodiment of the present invention, the at least one second probe pin includes a lower conductive portion and an insulating portion. The lower conductive portion extends from a tip of the second probe pin to the conductive trace of the guide plate, and the insulating portion is located above the lower conductive portion. The at least one second probe pin includes an upper conductive portion located above the insulating portion.

[0008] According to one embodiment of the present invention, the length of the at least one second probe pin is equal to the length of the at least one first probe pin, wherein the length of the at least one first probe pin and the length of the at least one second probe pin are at least 4 mm, and the distance between the tip of the second probe pin and the conductive trace of the guide plate is 3 mm or less.

[0009] According to one embodiment of the present invention, the plurality of probe pins includes at least one third probe pin, which electrically contacts the conductive trace of the guide plate, wherein the length of the at least one third probe pin is less than the length of the at least one first probe pin, wherein the at least one third probe pin includes a conductive material along the length of the at least one third probe pin, wherein the length of the at least one first probe pin is at least 4 mm, and the distance between a tip of the third probe pin and the conductive trace of the guide plate is 3 mm or less.

[0010] According to one embodiment of the present invention, the guide plate includes a lower guide plate, and the probe card further includes an upper guide plate located between the substrate portion and the lower guide plate, wherein at least a portion of the plurality of probe pins extend through a plurality of openings in the upper guide plate.

[0011] According to one embodiment of the present invention, the conductive trace includes a coating of conductive material on a surface of the lower guide plate.

[0012] According to one embodiment of the present invention, a thin film is further adhered to a surface of the lower guide plate, the thin film comprising a dielectric material having the conductive trace embedded therein.

[0013] This invention provides a probe card for a circuit probe testing system. The probe card includes a substrate portion and a probe head. The probe head includes a guide plate and a plurality of probe pins. The guide plate is located below the substrate portion and includes a plurality of openings through the guide plate and at least one conductive trace extending between a pair of openings. The probe pins extend through the openings in the guide plate, wherein the probe pins include at least one first probe pin having a first length dimension, the first probe pin providing a continuous conductive path between the tip of the first probe pin and the substrate portion of the probe card, and the probe pins include at least one second probe pin having a second length dimension smaller than the first length dimension, the second probe pin electrically contacting the conductive trace of the guide plate. Attached Figure Description

[0014] The concept of embodiments of this utility model will be better understood by referring to the following detailed description and the accompanying drawings. It should be noted that, according to standard industry practice, the various features in the drawings are not necessarily drawn to scale. In fact, the dimensions of various features may be arbitrarily enlarged or reduced for clarity of illustration.

[0015] Figure 1 This is a vertical cross-sectional view of a circuit probe test system according to various embodiments of the present invention, which can be used to perform circuit probe tests on a device-under-test (DUT), such as loopback testing.

[0016] Figure 2 This is an enlarged vertical cross-sectional view of the second probe pin according to various embodiments of the present invention.

[0017] Figure 3 This is a vertical cross-sectional view of a part of a circuit probe testing system according to another embodiment of the present invention.

[0018] Figure 4 This is a vertical cross-sectional view showing a pair of third probe pins mounted in a lower guide plate according to an embodiment of the present invention.

[0019] Figure 5 This is a top view of the surface of a lower guide plate on which conductive traces are formed, according to various embodiments of the present invention.

[0020] Figure 6 This is a top view of the surface of a lower guide plate on which conductive traces are formed, according to another embodiment of the present invention.

[0021] Figure 7 This is a flowchart illustrating a method for manufacturing a probe card for a circuit probe test system according to various embodiments of the present invention.

[0022] The attached figures are labeled as follows:

[0023] 100: Circuit Probe Testing System

[0024] 101: Device under test

[0025] 102: Lower support component

[0026] 103a: Probe pin / First probe pin

[0027] 103b, 103b1, 103b2: Probe pins / second probe pins

[0028] 103c: Probe pin / Third probe pin

[0029] 104, 1041, 1042: Contact Area

[0030] 105: Substrate portion

[0031] 106: Electrical contacts

[0032] 108: Conductive traces

[0033] 109: Fin-like elements / fin-like portions

[0034] 110: Probe head

[0035] 111: Guide plate / Upper guide plate

[0036] 112: Guide plate / lower guide plate

[0037] 112a: Upper part

[0038] 112b: lower part

[0039] 113: Spacer

[0040] 114: Opening

[0041] 121: Lower tip

[0042] 122: Upper end

[0043] 123: Lower conductive part / lower section

[0044] 125: Insulation Part

[0045] 127: Upper conductive part / upper part

[0046] 131: Surface

[0047] 133: Opening

[0048] 135:Thin film

[0049] 137: Coating

[0050] 150: System Controller

[0051] 200: Method

[0052] 201,203: Steps

[0053] d: distance

[0054] P: Loopback signal path

[0055] L1, L2: Length dimension / Length

[0056] L3: Length dimension / Length / Total length

[0057] Lc: Length

[0058] hd1, hd2: Horizontal direction Detailed Implementation

[0059] The following disclosure provides numerous different embodiments or examples to implement various features of the present invention. Specific examples of components and configurations are described below to simplify the description of the present invention. Of course, these specific examples are merely illustrative and not intended to limit the embodiments of the present invention. For example, in the following description, reference to a first feature being formed on or above a second feature indicates that it may include embodiments where the first and second features are in direct contact, or embodiments where an additional feature is formed between the first and second features, so that the first and second features may not be in direct contact. Furthermore, reference numerals and / or letters may be repeated in various examples. Such repetition is for simplicity and clarity and does not in itself limit the relationship between the various embodiments and / or configurations described.

[0060] Furthermore, spatially related terms such as “below,” “under,” “lower,” “above,” “higher,” and similar terms may be used herein to describe the relationship between one element or feature shown in the accompanying drawings and another element(s). In addition to the orientations shown in the accompanying drawings, these spatially related terms are intended to include different orientations of the device in use or operation. The device may be turned to different orientations (rotated 90 degrees or other orientations), and the spatially related terms used herein may be interpreted accordingly. Unless otherwise expressly stated, each element having the same reference numeral is assumed to have the same material composition and a thickness within the same thickness range.

[0061] This utility model relates to a circuit probe testing system and a method thereof for performing circuit probe testing on electronic devices such as semiconductor integrated circuit devices.

[0062] Circuit probe testing is an essential tool in the manufacturing process of electronic devices (e.g., semiconductor integrated circuit (IC) devices). A circuit probe testing system, also known as a wafer prober, is a specialized system used to test and verify the design functionality of electronic circuits. Circuit probe testing can identify faulty or defective devices (e.g., semiconductor IC devices) at a relatively early stage of the entire production process (e.g., before wafer dicing or packaging), thereby potentially leading to further cost savings.

[0063] A circuit probe test system typically includes a probe card with probe heads comprising multiple probe pins that can contact contact pads on the device under test (DUT). The probe card may also include a substrate portion comprising a printed circuit board (PCB) that serves as the interface between the circuit probe test system and the DUT. The circuit probe test system transmits electrical test signals to the DUT through the substrate portion and the probe pins of the probe head, and detects electrical response signals received from the DUT through the probe pins and the substrate portion. Each probe pin comprises an elongated structure having a length of 1 mm or longer (e.g., between 4 mm and 7 mm). The probe head typically also includes a probe head fixture comprising one or more ceramic guide plates having openings through which the probe pins extend. The probe head fixture is used to maintain proper alignment of the probe pins during testing while still allowing the probe pins a degree of elastic deformation capability.

[0064] One type of test that can be performed using a circuit probe test system is the "loopback" test. Loopback testing can be used to test the communication functionality of the device under test (DUT), such as the functionality of the transmitter (Tx) and / or receiver (Rx) components for different communication protocols (e.g., USB, PCIe, etc.). Probe cards are used to route signals between different contact pads / bumps on the DUT to test its communication capabilities. An important parameter for performing circuit probe testing is the signal integrity (SI) of the electronic signals transmitted between the circuit probe test system and the DUT. In the case of loopback testing, signal integrity (SI) is partly a function of the total length of the loopback signal path between the different contact pads / bumps on the DUT, where a longer loopback signal path can lead to poorer SI performance.

[0065] In the probe card design described above, the loopback signal path is typically routed through the base plate portion of the probe card. Therefore, the total length of the loopback path includes the length of the probe pins that transmit the signal from the device under test (DUT) to the base plate portion of the probe card, the length of the conductive path within the base plate portion of the probe card, and the length of the probe pins that transmit the signal back from the base plate portion of the probe card to the DUT. Thus, the total length of the loopback path is at least twice the length of the probe pins, and can be 8 to 14 mm or longer. This can potentially lead to poor SI performance during loopback testing.

[0066] Therefore, there is a need to improve circuit probe test systems to provide improved signal integrity (SI) for loopback testing of devices under test (DUTs). Various embodiments of this invention include probe cards for circuit probe test systems and methods of manufacturing the same. The probe card may include a substrate portion and a probe head. The probe head includes a guide plate located beneath the substrate portion and has multiple openings through the guide plate, and conductive traces on the guide plate extending between a pair of openings. Multiple probe pins may extend through the openings in the guide plate, wherein a pair of probe pins may be electrically connected via the conductive traces to form a loopback signal path. Therefore, the loopback signal can be routed via the conductive traces located on and / or within the guide plate instead of through the substrate portion of the probe card. This can significantly reduce the overall length of the loopback signal path, thereby improving the signal integrity (SI) during loopback testing of the DUT.

[0067] Figure 1 This is a vertical cross-sectional view of a portion of a circuit probe test system 100 according to various embodiments of the present invention. The circuit probe test system 100 can be used to perform circuit probe tests, such as loopback testing, on a device under test (DUT) 101. In some embodiments, the DUT 101 may include a semiconductor substrate (e.g., a silicon wafer) having circuit components formed on and / or within the semiconductor substrate. Other structures suitable for the DUT 101 are also within the scope of the present invention, such as semiconductor integrated circuit (IC) dies and / or semiconductor IC package structures. The DUT 101 may be located on a lower support member 102, such as a wafer holder.

[0068] Refer again Figure 1 The circuit probe testing system 100 includes a probe card 117, which includes a substrate portion 105 and a probe head 110. The circuit probe testing system 100 may also include a system controller 150, which can be coupled to an actuator system (not shown) configured to move the probe card 117 relative to a lower support member 102 along one or more horizontal directions hd1 to align the probe head 110 over selected areas(s) of the device under test 101. Alternatively or additionally, the lower support member 102 may be moved to align the probe head 110 over selected areas(s) of the device under test 101. In some embodiments, the system controller 150 of the circuit probe testing system 100 may be operatively coupled to an optical inspection system, which can be used to align the probe head 110 over specific areas(s) of the device under test 101 using optical pattern recognition. In some embodiments, the probe head 110 of the circuit probe testing system 100 may form the distal end of a robotic arm.

[0069] The probe head 110 may include multiple probe pins 103a and probe pins 103b, which may also be referred to as probe "needles". Figure 1 In the illustrated embodiment, the probe head 110 further includes a pair of guide plates, including an upper guide plate 111 and a lower guide plate 112. A spacer 113 may be located between the upper guide plate 111 and the lower guide plate 112. The guide plates 111 and 112 may be formed of suitable structural materials, such as ceramic materials, engineering plastic materials, etc. Other materials suitable for the guide plates 111 and 112 are also within the scope of this invention. The upper guide plate 111 and the lower guide plate 112 may each include a plurality of openings 114 extending through the respective guide plates 111 and 112. Probe pins 103a and 103b may extend through the openings 114 in the guide plates 111 and 112. The probe pins 103a and 103b may include fin elements 109 or similar features to prevent the probe pins 103a and 103b from completely passing through the openings 114 in the upper guide plate 111. The fin element 109 may be located on one side of the probe pins 103a and 103b, or on multiple sides or multiple locations of the probe pins 103a and 103b.

[0070] In some embodiments, the substrate portion 105 of the probe card 117 may include a printed circuit board (PCB) that may include circuit elements for performing circuit probe testing of the device under test 101. The lower surface of the substrate portion 105 may include electrical contacts 106. In embodiments where probe pins 103a and 103b are inserted through guide plates 111 and 112, at least some of the probe pins 103a and 103b may contact the electrical contacts 106 on the lower surface of the substrate portion 105. Figure 1 In the illustrated embodiment, probe pins 103a and 103b may be "float" relative to substrate portion 105, meaning that probe pins 103a and 103b are not bonded or otherwise fixed to substrate portion 105. In other embodiments, probe pins 103a and 103b may be bonded, for example, to electrical contacts 106 on the lower surface of substrate portion 105 via solder connection.

[0071] During circuit probe testing, such as loopback testing, the system controller 150 can move the probe card 117 in a vertically downward direction relative to the device under test 101, so that the lower portions of the probe pins 103a and 103b contact contact areas 104 (e.g., contact pads, metal bumps, etc.) formed on the device under test 101. The upper portions of the probe pins 103a and 103b can contact the lower surface of the substrate portion 105 of the probe card 117. The system controller 150 can control the substrate portion 105 to send electronic test signals to the device under test 101 through a first set of one or more probe pins 103a and 103b, and to receive response signals returned from the device under test 101 through a second set of one or more probe pins 103a and 103b. In some embodiments, the sent test signals and the returned response signals form a loopback. The detected response signals from the device under test 101 can be analyzed and used to determine whether the device under test 101 includes any functional defects. Based on circuit probe testing, multiple devices under test 101 can be classified so that defective devices under test 101 or parts thereof are not used in subsequent manufacturing, distribution and / or commercialization processes.

[0072] Refer again Figure 1 The probe pins 103a and 103b may include at least one first probe pin 103a and at least one second probe pin 103b. Each first probe pin 103a may be made of a conductive material, such as a copper-palladium alloy. Other conductive materials suitable for use with the first probe pin 103a are also within the scope of this invention. Each first probe pin 103a may have a length dimension L1. In some embodiments, the length dimension L1 of the first probe pin 103a may be less than 7 mm, for example, between about 4 mm and about 6 mm, but larger or smaller length dimensions of the first probe pin 103a may also be used. During circuit probe testing, such as loopback testing, the first probe pins 103a may provide a continuous conductive path along their length L1 between the electrical contacts 106 on the substrate portion 105 of the probe card 117 and the contact areas 104 (e.g., contact pads, metal bumps, etc.) on the device under test 101. The first probe pin 103a can be used to transmit pad signals (e.g., input-output (I / O) signals, power signals, ground signals, etc.) between the substrate portion 105 of the probe card 117 and the device under test 101.

[0073] The second probe pin 103b may have a similar or identical size and shape to the first probe pin 103a. The length L2 of the second probe pin 103b may be equal to the length L1 of the first probe pin 103a. The second probe pin 103b may include a conductive material, such as a copper-palladium alloy. Other suitable conductive materials are also within the scope of this invention. The second probe pin 103b differs from the first probe pin 103a in that it may not provide a continuous conductive path along its length L2. Instead, the second probe pin 103b may include a lower conductive portion configured to contact a contact area 104 on the device under test 101 and an insulating portion located between the lower conductive portion and the substrate portion 105.

[0074] In various embodiments, the second probe pin 103b can be used to transmit electrical signals between individual contact areas 104 formed on the device under test 101 via the loopback signal path P during loopback testing of the device under test 101. Figure 1 As shown, the loopback signal path P can extend from the first contact area 1041 on the device under test 101 through the lower part of the first second probe pin 103b1, along the conductive trace 108 which can be located on and / or within the lower guide plate 112 and can electrically connect the first second probe pin 103b1 to the second second probe pin 103b2, and through the lower part of the second second probe pin 103b2 to the second contact area 1042 on the device under test 101.

[0075] The loopback signal path P (e.g.) Figure 1 (As shown) can be shorter than the loopback signal path used in a correlated circuit probe test system. As described above, in a correlated circuit probe test system, the loopback signal typically routes along the full length (L2) of the first second probe pin 103b1, through the conductive trace on the substrate portion 105 of the probe card 117, and back down to the device under test 101 along the full length (L2) of the second second probe pin 103b2. Therefore, the total length of the loopback path is twice the full length of the probe pin (i.e., 2L2) plus the length of the conductive trace on the substrate portion 105, which is typically a function of the distance between the individual contact areas 104 on the device under test 101.

[0076] On the contrary, such as Figure 1The loopback signal path P in the illustrated embodiment of the circuit probe test system 100 includes twice the distance d between the lower tips of the first second probe pin 103b1 and the second second probe pin 103b2 (i.e., 2d) plus the length of the conductive trace 108 on and / or in the lower guide plate 112. Since the distance (d) between the lower tip of each second probe pin 103b2 and the conductive trace 108 is less than the total length (L1, L2) of the probe pins 103a and 103b between the device under test 101 and the substrate portion 105 of the probe card 117, the total length of the loopback signal path P in the illustrated embodiment of the circuit probe test system 100 can be significantly reduced compared to other related circuit probe test systems. This can provide improved signal integrity (SI) during circuit probe loopback testing. In some embodiments, the distance d may be less than 3 mm, including less than 2 mm, such as less than 1.5 mm, including 1 mm or less, compared to the length dimensions L1 and L2 (approximately 4 mm to 7 mm) of the first probe pin 103a and the second probe pin 103b. In some embodiments, the difference between the total length L2 of the second probe pin 103b and the distance d (i.e., L2–d) may be less than approximately 4 mm.

[0077] exist Figure 1 In the illustrated embodiment, the conductive trace 108 is located on the lower surface of the lower guide plate 112. However, in other embodiments, the conductive trace 108 may be located on the upper surface of the lower guide plate 112 or may be located within the lower guide plate 112. In other embodiments, the conductive trace 108 may be located in another portion of the probe tip 110, for example, on and / or within the upper guide plate 111. The conductive trace 108 is disposed in the lower portion of the probe tip 110 (e.g., on the lower surface of the lower guide plate 112, such as...). Figure 1 As shown, this can be advantageous in minimizing the distance d between the device under test 101 and the conductive trace 108, thereby minimizing the total length of the loopback signal path P. Furthermore, although... Figure 1 Only a single conductive trace 108 is shown, but the probe tip 110 may include multiple conductive traces 108 that can be electrically coupled to and extend between multiple second probe pins 103b. Each conductive trace 108 can be used to electrically connect multiple contact areas 104 on the device under test 101 in series and / or parallel during circuit probe loopback testing.

[0078] Figure 2 This is an enlarged vertical cross-sectional view of the second probe pin 103b according to various embodiments of the present invention. (Reference) Figure 2The second probe pin 103b may have a total length L2 between its lower tip 121 and upper tip 122. In some embodiments, the total length L2 may be between 4 mm and 6 mm. Longer or shorter lengths may also be used. The second probe pin 103b may have a lower conductive portion 123 that extends between the lower tip 121 and the insulating portion 125. The length L of the lower conductive portion 123 is... C It can be less than 3mm, including less than 2mm, for example less than 1.5mm, including 1mm or smaller. Longer or shorter sizes can also be used.

[0079] In some embodiments, the insulating portion 125 of the second probe pin 103b may extend into the central region of the second probe pin 103b. The upper conductive portion 127 may extend from the upper end 122 of the second probe pin 103b to the insulating portion 125, as shown below. Figure 2 As shown. In other embodiments, the upper conductive portion 127 may be omitted, and the insulating portion 125 may extend continuously between the lower conductive portion 123 and the upper end 122 of the second probe pin 103b. In various embodiments, the insulating portion 125 of the second probe pin 103b may be formed using a selective oxidation process, which may be used to oxidize a portion of the second probe pin 103b to make that portion of the second probe pin 103b non-conductive. The selective oxidation process may include selectively exposing a portion of the second probe pin 103b to oxygen plasma treatment, while the lower portion 123 and optionally the upper portion 127 of the second probe pin 103b are shielded or otherwise not exposed to oxygen plasma treatment. Other techniques for forming the insulating portion 125 are also contemplated within the scope of this invention. For example, the insulating portion 125 may be formed of a non-conductive material, such as ceramic or plastic, which may be bonded or attached to the lower conductive portion 123 and the optional upper conductive portion 127, which may be composed of conductive materials, such as metal or metal alloy.

[0080] Figure 2 The second probe pin 103b shown also includes a fin portion 109 located near its upper end 122. In some embodiments, the fin portion 109 may be integrally formed with the second probe pin 103b. The fin portion 109 can prevent the second probe pin 103b from... Figure 1 The opening 114 of the upper guide plate 111 shown falls down to help hold the second probe pin 103b in the proper position in the probe head 110 of the circuit probe test system 100.

[0081] Figure 3This is a vertical cross-sectional view of a portion of a circuit probe testing system 130 according to another embodiment of the present invention. Figure 3 The circuit probe test system 130 shown can be similar Figure 1 The circuit probe test system 100 shown may include a system controller 150 and a probe card 117. The probe card 117 includes a substrate portion 105 and a probe head 110. The probe head 110 includes an upper guide plate 111, a lower guide plate 112, a spacer 113, and a plurality of probe pins 103a and probe pins 103c.

[0082] Figure 3 Circuit probe test system 130 and Figure 1 The difference in the system shown is that, Figure 3 The circuit probe testing system 130 includes one or more third probe pins 103c. The one or more third probe pins 103c may replace the second probe pin 103b as described above with reference to Figures 1 and 2, or may be an additional component other than the second probe pin 103b. Each third probe pin 103c may have a length dimension L3, which is smaller than the length dimension L1 of the first probe pin 103a and smaller than the length dimension L2 of the second probe pin 103b. In some embodiments, the length dimension L3 may be less than 4 mm, including less than 3 mm, for example less than 2 mm, including 1 mm or less. Therefore, the third probe pin 103c may not contact the substrate portion 105 of the probe card 117, and in some embodiments may not extend through the opening 114 in the upper guide plate 111.

[0083] Each third probe pin 103c may extend through an opening 114 in the lower guide plate 112 and may be configured to contact a contact area 104 of the device under test 101 during a circuit probe loopback test. The third probe pin 103c may be made of a suitable conductive material as described above. In some embodiments, the third probe pins 103c may be conductive over their entire length L3 (i.e., they may not include the insulating portion 125 as described above with reference to the second probe pin 103b). Each third probe pin 103c may electrically contact a conductive trace 108 located on and / or within the lower guide plate 112, the conductive trace 108 electrically connecting the third probe pin 103c to one or more other probe pins 103a, 103c of the probe head 110. Thus, each third probe pin 103c may form part of a loopback signal path P between different contact areas 104 of the device under test 101 during a loopback test. (As described above with reference to...) Figure 1 and Figure 2In the described embodiments, the total length of the loopback signal path P can be equal to twice the distance d from the lower tip of the third probe pin 103c to the conductive trace 108 plus the length of the conductive trace 108 extending between the third probe pins 103c. This total length can be less than the length of the loopback signal path in the associated circuit probe test system, which can improve signal integrity (SI). In some embodiments, the distance d can be less than 3 mm, including less than 2 mm, for example less than 1.5 mm, including 1 mm or less. In some embodiments, the difference between the total length L3 of the third probe pin 103c and the distance d (i.e., L3–d) can be less than about 1 mm.

[0084] Figure 4 This is a vertical cross-sectional view of a pair of third probe pins 103c mounted in a lower guide plate 112 according to an embodiment of the present invention. Figure 4 In one embodiment, the lower guide plate 112 may have a two-piece structure including an upper portion 112a and a lower portion 112b. A third probe pin 103c may be mounted within the lower guide plate 112, such that the fin-like portion 109 is located between the upper portion 112a and the lower portion 112b of the lower guide plate 112. Figure 4 In one embodiment, the conductive trace 108 is displayed in the upper portion 112a of the lower guide plate 112. In other embodiments, the conductive trace 108 may be located on and / or within the lower portion 112b of the lower guide plate 112.

[0085] Figure 5 This is a top view of the surface 131 of a lower guide plate 112 on which conductive traces 108 are formed, according to various embodiments of the present invention. In some embodiments, when assembled in a probe head 110, surface 131 may be the lower surface of the lower guide plate 112, or surface 131 may be the upper surface of the lower guide plate 112. Reference Figure 5 The lower guide plate 112 may include a plurality of openings 114, the size and shape of which allow for multiple probe pins ( Figure 5(Not shown) can extend through the lower guide plate 112. Conductive traces 108 can extend over the surface 131 of the lower guide plate 112 between different openings 114 through the lower guide plate 112. Conductive traces 108 can be formed by providing a coating 137 of a conductive material (e.g., metal or metal alloy) on the surface 131 of the lower guide plate 112. In some embodiments, finned portions 109 of the probe pins (e.g., 103b, 103c) can form an electrical connection with the coating 137 when the probe pins (e.g., 103b, 103c) are raised or lowered to contact the coating 137. The coating 137 can be formed using suitable deposition processes, such as physical vapor deposition (PVD) (e.g., sputtering), electrochemical deposition (e.g., electroplating), and / or printing processes (e.g., metal 3D printing). Other suitable deposition processes are also contemplated within the scope of this invention. In some embodiments, coating 137 may be deposited on surface 131 of lower guide plate 112 in a desired pattern. Alternatively, a continuous coating of conductive material may be deposited on surface 131 of lower guide plate 112, and selected portions of the coating may subsequently be removed via suitable techniques (e.g., etching with a photolithographic patterned mask, stripping process, laser ablation process, etc.) to provide the desired pattern.

[0086] In various embodiments, the characteristics of the conductive trace 108 (e.g., the thickness and width of the trace) and the ground-referenced voltage carried by the trace can be selected so that the characteristic impedance of the conductive trace 108 matches the system (e.g., 35 ohms, 50 ohms, or 75 ohms).

[0087] like Figure 5 As shown, coating 137 may extend around the periphery of at least some of the openings 114 through the lower guide plate 112, which allows probe pins (e.g., 103b, 103c) extending through the openings 114 to make electrical contact with the conductive material of coating 137. In some embodiments, coating 137 may extend over the sidewalls of the openings 114 to help provide effective electrical contact between the probe pins (e.g., 103b, 103c) and coating 137.

[0088] Figure 6 This is a top view of the surface 131 of a lower guide plate 112 on which conductive traces 108 are formed, according to another embodiment of the present invention. Figure 6In some embodiments, a thin film 135, including the conductive trace 108 embedded therein, can be attached to the surface 131 of the lower guide plate 112. The thin film 135 can be composed of a suitable dielectric material, such as a dielectric polymer material (e.g., polyimide). Other materials suitable for the thin film 135 are also within the scope of this invention. The thin film 135 may include a plurality of openings 133 corresponding to locations of openings 114 through the lower guide plate 112. The thin film 135 can be attached to the surface 131 of the lower guide plate 112 using a suitable adhesive (e.g., epoxy resin). The conductive trace 108 may extend around the periphery of at least some of the openings 133, which allows probe pins to make electrical contact with the conductive trace 108.

[0089] Figure 7 This is a flowchart illustrating a method 200 for manufacturing a probe card 117 for a circuit probe test system 100 according to various embodiments of the present invention. (See also:) Figure 1 and Figures 3 to 7 In step 201 of method 200, conductive traces 108 may be formed on and / or within the guide plate 112, the guide plate 112 including a plurality of openings 114 configured to receive a plurality of probe pins 103a, 103b, 103c. (See reference...) Figure 1 , Figure 3 and Figure 7 In step 203 of method 200, the guide plate 112 can be assembled into a probe card 117. The probe card 117 includes a substrate portion 105, a guide plate 112 disposed below the substrate portion 105, and a plurality of probe pins 103a, 103b, 103c extending through an opening 114 in the guide plate 112, such that a pair of probe pins 103b, 103c are electrically connected by a conductive trace 108 to form a loopback signal path P.

[0090] Referring to all the accompanying drawings and various embodiments according to the present invention, a probe card 117 for a circuit probe testing system 100, 130 includes a probe head 110. The probe head 110 includes a guide plate 112 and a plurality of probe pins 103a, 103b, 103c. The guide plate 112 includes a plurality of openings 114 passing through the guide plate 112 and a conductive trace 108 extending between a pair of openings 114. The plurality of probe pins 103a, 103b, 103c extend through the plurality of openings 114 in the guide plate 112, wherein a pair of probe pins 103b, 103c are electrically connected via the conductive trace 108 to form a loopback signal path P.

[0091] In one embodiment, the probe card 117 further includes a substrate portion 105, wherein the guide plate 112 is located below the substrate portion 105, and the plurality of probe pins include at least one first probe pin 103a, which forms a continuous conductive path along the length L1 of the first probe pin 103a between the tip of the first probe pin 103a and the substrate portion 105 of the probe card 117.

[0092] In another embodiment, the plurality of probe pins includes at least one second probe pin 103b that electrically contacts the conductive trace 108 of the guide plate 112.

[0093] In another embodiment, the at least one second probe pin 103b includes a lower conductive portion 123 of a conductive trace 108 extending from the tip 121 of the second probe pin 103b to the guide plate 112, and an insulating portion 125 located above the lower conductive portion 123.

[0094] In another embodiment, the at least one second probe pin 103b includes an upper conductive portion 127 located above the insulating portion 125.

[0095] In another embodiment, the length L2 of the at least one second probe pin 103b is equal to the length L1 of the at least one first probe pin 103a.

[0096] In another embodiment, the length L1 of the at least one first probe pin 103a and the length L2 of the at least one second probe pin 103b are 4 mm, and the distance d between the tip 121 of the second probe pin 103b and the conductive trace 108 of the guide plate 112 is 3 mm or less.

[0097] In another embodiment, the plurality of probe pins includes at least one third probe pin 103c that electrically contacts the conductive trace 108 of the guide plate 112, wherein the length L3 of the at least one third probe pin 103c is less than the length L1 of the at least one first probe pin 103a.

[0098] In another embodiment, the at least one third probe pin 103c includes a conductive material along its length L3.

[0099] In another embodiment, the length L1 of the at least one first probe pin 103a is 4 mm, and the distance d between the tip 121 of the second probe pin 103b and the conductive trace 108 of the guide plate 112 is 3 mm or less.

[0100] In another embodiment, the guide plate is a lower guide plate 112, and the probe head 110 also includes an upper guide plate 111 located between the substrate portion 105 and the lower guide plate 112, wherein at least a portion of the probe pins 103a, 103b, 103c extend through an opening 114 in the upper guide plate 111.

[0101] In another embodiment, the conductive trace 108 includes a coating 137 of conductive material on the surface 131 of the lower guide plate 112.

[0102] In another embodiment, the probe tip 110 further includes a thin film 135 adhered to the surface 131 of the lower guide plate 112, the thin film 135 comprising a dielectric material having conductive traces 108 embedded therein.

[0103] In another embodiment, the substrate portion 105 includes a printed circuit board configured to send test signals to a device under test 101 via the plurality of probe pins 103a, 103b, 103c and to receive response signals from the device under test 101 to perform circuit probe testing.

[0104] Other embodiments relate to a probe card 117 for a circuit probe testing system 100, which includes a substrate portion 105 and a probe head. The probe head includes a guide plate 112 located below the substrate portion 105. The guide plate 112 includes a plurality of openings 114 extending through the guide plate 112 and at least one conductive trace 105 extending between a pair of the plurality of openings 114. The guide plate 112 also includes a plurality of probe pins 103a, 103b, 103c extending through the openings 114 of the guide plate 112, wherein the plurality of probe pins includes at least one first probe pin 103a having a first length dimension L1, providing a continuous conductive path between the tip of the first probe pin 103a and the substrate portion 105 of the probe card 117, and the plurality of probe pins includes at least one second probe pin 103b having a second length dimension L2 smaller than the first length dimension L1, which electrically contacts the conductive trace 108 of the guide plate 112.

[0105] In some embodiments, the first length dimension L1 is greater than 4 mm, while the second length dimension L2 is less than 4 mm.

[0106] Other embodiments relate to a method of manufacturing a probe card 117 for a circuit probe testing system 100, comprising forming conductive traces 108 on and / or within a guide plate 112, the guide plate 112 including a plurality of openings 114 configured to receive a plurality of probe pins 103a, 103b, 103c, and assembling the guide plate 112 into a probe card 117, the probe card 117 including a substrate portion 105 and a probe head, the probe head including a guide plate 112 disposed below the substrate portion 105 and a plurality of probe pins 103a, 103b, 103c extending through the openings in the guide plate 112 such that a pair of probe pins 103b, 103c are electrically connected via conductive traces 108 to form a loopback signal path P.

[0107] In one embodiment, the method further includes oxygen plasma treatment of at least a portion of the probe pin 103b to form an insulating portion 125 located above the lower conductive portion 123 of the probe pin 103b.

[0108] In another embodiment, the conductive traces 108 formed on and / or within the guide plate 112 include at least a portion of the surface 131 of the guide plate coated with a conductive material via at least one of physical vapor deposition, electrochemical deposition, and / or printing processes.

[0109] In another embodiment, forming conductive traces 108 on and / or within the guide plate 112 includes attaching a film 135 to the surface 131 of the guide plate 112 using an adhesive. The film 135 includes a dielectric material having the conductive traces 108 embedded therein.

[0110] The foregoing outlines the features of numerous embodiments to enable those skilled in the art to better understand the various embodiments of this utility model. Those skilled in the art should understand that other processes and structures can be easily designed or modified based on the embodiments of this utility model to achieve the same objectives and / or advantages as the embodiments described herein. Those skilled in the art should also understand that these equivalent structures do not depart from the spirit and scope of this utility model. Various changes, substitutions, and modifications can be made to the embodiments of this utility model without departing from the spirit and scope of the appended claims.

Claims

1. A probe card for a circuit probe testing system, characterized in that, include: A probe head, the probe head comprising: A guide plate includes a plurality of openings through the guide plate and a conductive trace extending between a pair of openings in one of the plurality of openings; as well as Multiple probe pins extend through multiple openings in the guide plate, wherein a pair of probe pins of the multiple probe pins are electrically connected through the conductive trace to form a loopback signal path.

2. The probe card for a circuit probe testing system as described in claim 1, characterized in that, Also includes: A substrate portion, wherein the guide plate is located below the substrate portion, and the plurality of probe pins include at least one first probe pin, the at least one first probe pin forming a continuous conductive path along a length of the first probe between a tip of the first probe and the substrate portion of the probe card.

3. The probe card for a circuit probe testing system as described in claim 2, characterized in that, The plurality of probe pins include at least one second probe pin that is electrically in contact with the conductive trace of the guide plate.

4. The probe card for a circuit probe testing system as described in claim 3, characterized in that, The at least one second probe pin includes a lower conductive portion and an insulating portion, the lower conductive portion extending from a tip of the second probe pin to the conductive trace of the guide plate, the insulating portion being located above the lower conductive portion, wherein the at least one second probe pin includes an upper conductive portion being located above the insulating portion.

5. The probe card for a circuit probe testing system as described in claim 4, characterized in that, The length of the at least one second probe pin is equal to the length of the at least one first probe pin, wherein the length of the at least one first probe pin and the length of the at least one second probe pin are at least 4 mm, and the distance between the tip of the second probe pin and the conductive trace of the guide plate is 3 mm or less.

6. The probe card for a circuit probe testing system as described in claim 2, characterized in that, The plurality of probe pins include at least one third probe pin that electrically contacts the conductive trace of the guide plate, wherein a length of the at least one third probe pin is less than the length of the at least one first probe pin, wherein the at least one third probe pin includes a conductive material along the length of the at least one third probe pin, wherein the length of the at least one first probe pin is at least 4 mm, and a distance between a tip of the third probe pin and the conductive trace of the guide plate is 3 mm or less.

7. The probe card for a circuit probe testing system as described in claim 2, characterized in that, The guide plate includes a lower guide plate, and the probe card also includes an upper guide plate located between the substrate portion and the lower guide plate, wherein at least a portion of the plurality of probe pins extend through a plurality of openings in the upper guide plate.

8. The probe card for a circuit probe testing system as described in claim 7, characterized in that, The conductive trace includes a coating of conductive material on a surface of the lower guide plate.

9. The probe card for a circuit probe testing system as described in claim 7, characterized in that, It also includes a thin film adhered to a surface of the lower guide plate, the thin film comprising a dielectric material having the conductive traces embedded therein.

10. A probe card for a circuit probe testing system, characterized in that, include: One substrate portion; as well as A probe head, comprising: A guide plate is located below the substrate portion, the guide plate including a plurality of openings and at least one conductive trace, the plurality of openings passing through the guide plate, and the at least one conductive trace extending between a pair of the plurality of openings; as well as Multiple probe pins extend through multiple openings in the guide plate, wherein the multiple probe pins include at least one first probe pin having a first length dimension, the at least one first probe pin providing a continuous conductive path between a tip of the first probe pin and the substrate portion of the probe card, and the multiple probe pins include at least one second probe pin having a second length dimension smaller than the first length dimension, the at least one second probe pin being electrically connected to the conductive trace of the guide plate.

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