Comparator circuit, signal processing circuit and collision signal detection circuit

Abstract

The utility model discloses a comparator circuit, a signal processing circuit and a collision signal detection circuit, which comprise a signal input circuit, a signal processing circuit, a conversion circuit and a control circuit, and are characterized in that a collision signal to be detected is input into the signal processing circuit through the signal input circuit consisting of a signal input end, a first resistor and a voltage suppressor; after a comparator circuit and a filter circuit in the signal processing circuit detect a collision signal and output the detected signal, the detected signal is input into a conversion circuit connected with the signal processing circuit, the conversion circuit outputs a final signal, and a power supply of a signal input port is controlled through two diodes in the control circuit. Through the collision signal detection circuit, the accuracy of signal detection is improved.

Description

TECHNICAL FIELD

[0001] The utility model relates to the field of automobile crash signal detection technology, especially to a comparator circuit, signal processing circuit and crash signal detection circuit. BACKGROUND

[0002] The automobile power battery management system (Battery Management System, BMS) is a kind of system for monitoring and controlling power battery state, in order to guarantee vehicle driving safety, when vehicle collision occurs, the safety control module such as air bag unit of whole vehicle sends specific crash signal to BMS. Among them, voltage type crash signal is generally pulse width modulation signal, signal characteristic representation is usually frequency and duty ratio. When crash occurs, air bag unit will change the frequency and duty ratio of pulse width modulation signal, at this moment, normal state and crash state can be distinguished. BMS receives crash signal from vehicle controller, and detects whether crash occurs, to trigger relevant protection mechanism measures, cut off power battery high voltage loop, to guarantee the safety of battery and vehicle.

[0003] But in the present crash signal detection, for different application scenarios, the intensity of crash signal can be very different, when circuit design is unreasonable, signal processing delay is easy to produce, thereby making signal detection result inaccurate. UTILITY MODEL CONTENT

[0004] In order to solve the above technical problems, the utility model embodiment provides a kind of comparator circuit, signal processing circuit and crash signal detection circuit, to solve the problem that circuit design cannot improve the accuracy of detection result in the present crash signal detection technology.

[0005] The first aspect of the utility model embodiment provides a kind of comparator circuit, including comparator (10), second resistance (32), third resistance (33), fourth resistance (34), fifth resistance (35) and sixth resistance (36), wherein,

[0006] the first input end of comparator (10) is connected with signal input end by second resistance (32), the first end of fifth resistance (35) is used to be connected with control circuit, the second end of fifth resistance (35) is connected with the second input end of comparator (10);

[0007] the first end of sixth resistance (36) is connected with the second end of fifth resistance (35), and the second end of sixth resistance (36) is grounded connection;

[0008] the first end of third resistance (33) is connected with the first input end of comparator (10), and the second end of third resistance (33) is connected with the output end of comparator (10);

[0009] A first end of the fourth resistor (34) is connected to an output terminal of the comparator (10), and a second end of the fourth resistor (34) is configured to be connected to the control circuit.

[0010] In a possible implementation manner of the first aspect, the first input terminal of the comparator (10) is configured to be connected to the signal input terminal through the second resistor (32), and the comparator (10) comprises:

[0011] The first input terminal of the comparator (10) is connected to a first end of the second resistor (32), and a second end of the second resistor (32) is connected to the signal input terminal.

[0012] In a possible implementation manner of the first aspect, the control circuit further comprises:

[0013] The positive power terminal of the comparator (10) is connected to the control circuit, and the negative power terminal of the comparator (10) is grounded.

[0014] The second aspect of the embodiment of the utility model provides a kind of signal processing circuit, including comparator circuit and filter circuit, wherein,

[0015] The comparator circuit is as the comparator circuit proposed in the first aspect;

[0016] The filter circuit includes first capacitor (41), second capacitor (42) and third capacitor (43), wherein the first end of the first capacitor (41) is connected to the first input terminal of the comparator (10), the first end of the second capacitor (42) is connected to the second input terminal of the comparator (10), and the second end of the first capacitor (41) and the second end of the second capacitor (42) are both grounded connection;

[0017] The first end of the third capacitor (43) is connected to the positive power terminal of the comparator (10), and the second end of the third capacitor (43) is grounded.

[0018] The third aspect of the embodiment of the utility model provides a kind of collision signal detection circuit, including signal input circuit, signal processing circuit, conversion circuit and control circuit, wherein,

[0019] The signal input circuit includes signal input terminal, first resistor (31) and voltage suppressor (50), wherein the signal input terminal is connected to the first end of the first resistor (31), the second end of the first resistor (31) is connected to the first power supply (21), the first end of the voltage suppressor (50) is connected to the signal input terminal, and the second end of the voltage suppressor (50) is grounded.

[0020] The signal input terminal in the signal input circuit is connected to the signal processing circuit, and the signal processing circuit is as the signal processing circuit proposed in the second aspect;

[0021] The control circuit comprises a first power supply (21), a second power supply (22), a first transistor (23) and a second transistor (24), wherein the base of the second transistor (24) is connected with the collector of the first transistor (23), the first end of the first resistor (31), the first end of the fifth resistor (35), the positive power supply terminal of the comparator (10) and the first end of the fourth resistor (34) are connected with the collector of the second transistor (24), the emitter of the second transistor (24) is connected with the first power supply (21), the base of the first transistor (23) is connected with the second power supply (22), and the emitter of the first transistor (23) is grounded.

[0022] The conversion circuit comprises a third transistor (25), wherein the base of the third transistor (25) is connected with the output terminal of the comparator (10), the collector of the third transistor (25) is connected with the second power supply (22), the collector of the third transistor (25) is connected with the signal output terminal, and the emitter of the third transistor (25) is grounded.

[0023] In a possible implementation manner of the third aspect, the control circuit further comprises a seventh resistor (37), an eighth resistor (38), a ninth resistor (39) and a tenth resistor (310), wherein,

[0024] The base of the second transistor (24) is connected with the second power supply (22) through the ninth resistor (39);

[0025] The base of the second transistor (24) is connected with the collector of the first transistor (23) through the tenth resistor (310);

[0026] The first end of the seventh resistor (37) is connected with the second power supply (22), the base of the first transistor (23) is connected with the second end of the seventh resistor (37), the second end of the seventh resistor (37) is connected with the first end of the eighth resistor (38), and the second end of the eighth resistor (38) is grounded.

[0027] In a possible implementation manner of the third aspect, the base of the second transistor (24) is connected with the second power supply (22) through the ninth resistor (39), comprising:

[0028] The base of the second transistor (24) is connected with the first end of the ninth resistor (39), and the second end of the ninth resistor (39) is connected with the second power supply (22).

[0029] In a possible implementation manner of the third aspect, the base of the second transistor (24) is connected with the collector of the first transistor (23) through the tenth resistor (310), comprising:

[0030] The base of the second triode (24) is connected with the first end of the tenth resistor (310), and the second end of the tenth resistor (310) is connected with the collector of the first triode (23).

[0031] In a possible implementation manner of the third aspect, the conversion circuit further comprises an eleventh resistor (311), a twelfth resistor (312), a thirteenth resistor (313) and a fourteenth resistor (314), wherein the first end of the eleventh resistor (311) is connected with the output end of the comparator (10), and the second end of the eleventh resistor (311) is grounded;

[0032] The first end of the twelfth resistor (312) is connected with the output end of the comparator (10), the second end of the twelfth resistor (312) is connected with the base of the third triode (25), and the second end of the twelfth resistor (312) is connected with the first end of the thirteenth resistor (313), and the second end of the thirteenth resistor (313) is grounded.

[0033] In a possible implementation manner of the third aspect, the collector of the third triode (25) is connected with the second power supply (22), comprising:

[0034] The collector of the third triode (25) is connected with the first end of the fourteenth resistor (314), and the second end of the fourteenth resistor (314) is connected with the second power supply (22).

[0035] The technical scheme of the utility model has the following advantages:

[0036] The comparator circuit provided by the utility model embodiment comprises a comparator, a third resistor and a second resistor connected with a signal input end, and a fourth resistor, a fifth resistor and a sixth resistor connected with a control circuit, so that the detection of an output signal can be realized, and the reference voltage of an inverting input end in the comparator is directly obtained by a system power supply through two resistors, without needing an additional reference source, and the reliability of the comparator input is improved.

[0037] The signal processing circuit provided by the utility model embodiment comprises a comparator circuit and a filter circuit, the filter circuit is added to the input end of the comparator, the accuracy of an input detection signal is improved, and a capacitor is connected to the ground at the power supply end of the comparator circuit, so that the decoupling effect is achieved, and the stability of power supply is improved.

[0038] The collision signal detection circuit provided by the embodiment of the utility model, including signal input circuit, signal processing circuit, conversion circuit and control circuit, through the signal input circuit that is composed of signal input end, first resistance and voltage suppressor, the collision signal to be detected is input signal processing circuit, make the comparator circuit and filter circuit in signal processing circuit detect the signal after outputting the signal after detection, input the signal after detection to the conversion circuit that is connected with signal processing circuit, conversion circuit output final signal, and still pass through the power supply of two diodes in control circuit control signal input port, through the above-mentioned collision signal detection circuit, improve the accuracy of signal detection. BRIEF DESCRIPTION OF DRAWINGS

[0039] In order to more clearly illustrate the specific embodiment of the utility model or the technical scheme in prior art, the following will briefly introduce the drawing needed to be used in the specific embodiment or prior art description, obviously, the drawing in the following description is some embodiments of the utility model, for those skilled in the art, without creative labor, other drawings can also be obtained according to these drawings.

[0040] Figure 1 It is the circuit structure connection diagram of comparator circuit in the embodiment of the utility model;

[0041] Figure 2 It is the partial circuit structure connection diagram of comparator circuit in the embodiment of the utility model;

[0042] Figure 3 It is the circuit structure connection diagram of signal processing circuit in the embodiment of the utility model;

[0043] Figure 4 It is the circuit structure connection diagram of collision signal detection circuit in the embodiment of the utility model;

[0044] Figure 5 It is the collision signal detection circuit modularization schematic view of collision signal detection circuit in the embodiment of the utility model;

[0045] Figure 6 It is a kind of circuit structure connection diagram of collision signal detection circuit in the embodiment of the utility model;

[0046] Figure 7 It is another partial circuit structure connection diagram of collision signal detection circuit in the embodiment of the utility model;

[0047] Wherein, the attached drawing marks of the attached drawing of the specification are as follows: 10-comparator; 21-first power supply; 22-second power supply; 23-first triode; 24-second triode; 31-first resistance; 32-second resistance; 33-third resistance; 34-fourth resistance; 35-fifth resistance; 36-sixth resistance; 37-seventh resistance; 38-eighth resistance; 39-ninth resistance; 310-tenth resistance; 311-eleventh resistance; 312-twelfth resistance; 313-thirteenth resistance; 314-fourteenth resistance; 41-first capacitor; 42-second capacitor; 43-third capacitor; 50-voltage suppressor; 25-third triode. DETAILED DESCRIPTION

[0048] The technical solutions in the embodiments of the utility model will be clearly and completely described below with reference to the drawings in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, rather than all the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the utility model.

[0049] In the description of the utility model, it needs to be explained that the terms "first", "second" and "third" are only for the purpose of description, and cannot be understood as indicating or implying relative importance.

[0050] In the description of the utility model, it needs to be explained that, unless otherwise explicitly specified and limited, the term "connection" should be understood broadly, for example, it can be fixed connection, can be detachable connection, or integrally connected; can be mechanical connection, can be electrical connection; can be directly connected, can be indirectly connected through intermediate medium, can be internal communication of two elements, can be wireless connection, or wired connection. For those skilled in the art, the specific meaning of the above-mentioned terms in the utility model can be understood according to the specific circumstances.

[0051] Please refer to Figure 1 The circuit structure relationship schematic diagram of one embodiment of the comparator circuit provided by the utility model comprises a comparator (10), a second resistance (32), a third resistance (33), a fourth resistance (34), a fifth resistance (35) and a sixth resistance (36), wherein,

[0052] The first input end of the comparator (10) is connected with the signal input end through the second resistance (32), the first end of the fifth resistance (35) is connected with the control circuit, the second end of the fifth resistance (35) is connected with the second input end of the comparator (10), the first end of the sixth resistance (36) is connected with the second end of the fifth resistance (35), and the second end of the sixth resistance (36) is grounded;

[0053] The first end of the third resistor (33) is connected to the first input terminal of the comparator (10), and the second end of the third resistor (33) is connected to the output terminal of the comparator (10).

[0054] The first end of the fourth resistor (34) is connected to the output of the comparator (10), and the second end of the fourth resistor (34) is used to connect to the control circuit.

[0055] In this embodiment, the comparator circuit includes a comparator (10), a second resistor (32), a third resistor (33), a fourth resistor (34), a fifth resistor (35), and a sixth resistor (36). Specifically, as shown... Figure 2 As shown, the activation circuit mainly consists of a comparator (10). The non-inverting input of the comparator (10) is connected to the collision signal input through the second resistor (32) and pulled up to the control circuit through the fourth resistor (34). The inverting input of the comparator (10) is connected to the control circuit after being divided by multiple resistors, which is equivalent to connecting a reference voltage to the inverting input. That is, the negative input of the comparator (10) is connected to the second end of the fifth resistor (35), the first end of the fifth resistor (35) is connected to the control circuit, the second end of the fifth resistor (35) is connected to the first end of the sixth resistor (36), and the second end of the sixth resistor (36) is connected to ground. The reference voltage of the inverting input of the comparator (10) can be directly obtained from the system power supply through the voltage division of the fifth resistor (35) and the sixth resistor (36) without the need for an additional reference source, which improves the reliability of the input of the comparator (10).

[0056] The output of comparator (10) is connected to the non-inverting input terminal through the third resistor (33) to form positive feedback. The open-drain output of comparator (10) is pulled up to the control circuit through the fourth resistor (34). The detection of PWM input can be realized through this comparator circuit.

[0057] When the voltage V+ at the non-inverting input terminal of comparator (10) is greater than the voltage Vref at the inverting input terminal, comparator (10) outputs a high level; when the voltage V+ at the non-inverting input terminal of comparator (10) is less than the voltage Vref at the inverting input terminal, comparator (10) outputs a low level. The output signal is generally detected by a microcontroller.

[0058] It should be noted that the third resistor (33) is a feedback resistor, the comparator (10) is a hysteresis comparator (10), the first input terminal of the comparator (10) refers to the positive input terminal of the comparator (10), and the second input terminal of the comparator (10) refers to the negative input terminal of the comparator (10).

[0059] The output of the hysteresis comparator (10) does not change immediately when the input signal changes, but only after the input signal reaches a certain threshold. This hysteresis characteristic enables the hysteresis comparator (10) to eliminate noise in the input signal, improve the accuracy of signal detection, and enhance the stability and reliability of the system.

[0060] In one embodiment, the first input terminal of the comparator (10) is connected to the signal input terminal via a second resistor (32), including:

[0061] The first input terminal of the comparator (10) is connected to the first terminal of the second resistor (32), and the second terminal of the second resistor (32) is used to connect to the signal input terminal.

[0062] In this embodiment, the non-inverting input terminal of the comparator (10) is also connected to the first terminal of the second resistor (32), and the second terminal of the second resistor (32) is connected to the signal input terminal.

[0063] In one embodiment, the positive power supply terminal of the comparator (10) is connected to the control circuit, and the negative power supply terminal of the comparator (10) is grounded.

[0064] In this embodiment, the positive power supply terminal of the comparator (10) is connected to the collector of the second transistor in the control circuit, and the negative power supply terminal of the comparator (10) is grounded.

[0065] The signal processing circuit provided in this embodiment of the utility model, such as Figure 3 As shown, Figure 3 This is a schematic diagram of the circuit structure of a signal processing circuit, including a comparator circuit and a filter circuit.

[0066] The comparator circuit is as provided in the embodiment of this utility model;

[0067] The filter circuit includes a first capacitor (41), a second capacitor (42) and a third capacitor (43). The first end of the first capacitor (41) is connected to the first input terminal of the comparator (10), the first end of the second capacitor (42) is connected to the second input terminal of the comparator (10), and the second ends of the first capacitor (41) and the second ends of the second capacitor (42) are both connected to ground.

[0068] The first end of the third capacitor (43) is connected to the positive power supply terminal of the comparator (10), and the second end of the third capacitor (43) is connected to ground.

[0069] In this embodiment, the signal processing circuit includes a filter circuit in addition to the comparator circuit. In the filter circuit, the non-inverting input terminal of the comparator (10) is connected to the first capacitor (41) to ground, the inverting input terminal is connected to the second capacitor (42) to ground, and the power supply terminal of the comparator (10) is connected to the third capacitor (43) to ground. That is, by connecting the first end of the third capacitor (43) to the positive power supply terminal of the comparator (10) and the second end of the third capacitor (43) to ground, the filter circuit is added to the non-inverting and inverting input terminals of the comparator (10), thereby improving the accuracy of the input signal. The addition of the third capacitor (43) to the power supply terminal of the comparator (10), i.e., the positive power supply terminal of the comparator (10), and connecting it to ground, serves as a decoupling function, thereby improving the stability of the power supply.

[0070] The collision signal detection circuit provided in this embodiment of the utility model, such as Figure 4 As shown, Figure 4 This is a schematic diagram of the circuit structure of a collision signal detection circuit, including a signal input circuit, a signal processing circuit, a conversion circuit, and a control circuit.

[0071] The signal input circuit includes a signal input terminal, a first resistor (31) and a voltage suppressor (50), wherein the signal input terminal is connected to the first end of the first resistor (31), the second end of the first resistor (31) is connected to the first power supply (21), the first end of the voltage suppressor (50) is connected to the signal input terminal, and the second end of the voltage suppressor (50) is connected to ground.

[0072] The signal input terminal in the signal input circuit is connected to the signal processing circuit, which is the signal processing circuit proposed in this embodiment.

[0073] The control circuit includes a first power supply (21), a second power supply (22), a first transistor (23), and a second transistor (24). The base of the second transistor (24) is connected to the collector of the first transistor (23). The first end of the first resistor (31), the first end of the fifth resistor (35), the positive power supply terminal of the comparator (10), and the first end of the fourth resistor (34) are respectively connected to the collector of the second transistor (24). The emitter of the second transistor (24) is connected to the first power supply (21). The base of the first transistor (23) is connected to the second power supply (22). The emitter of the first transistor (23) is grounded.

[0074] The conversion circuit includes a third transistor (25), wherein the base of the third transistor (25) is connected to the output terminal of the comparator (10), the collector of the third transistor (25) is connected to the second power supply (22), the collector of the third transistor (25) is connected to the signal output terminal, and the emitter of the third transistor (25) is grounded.

[0075] In this embodiment, as Figure 5 As shown, the collision signal detection circuit includes a collision signal generator (signal input circuit) for generating collision signals; a collision signal processing circuit (signal processing circuit) for detecting the input collision signals; a system power control circuit (control circuit) for controlling the system power supply; a level conversion circuit (conversion circuit) for level conversion of the detection signal output from the signal processing circuit; and a microcontroller for receiving the converted signal. Figure 6 As shown, the signal input circuit includes a signal input terminal, a first resistor (31), and a voltage suppressor (50). The first resistor (31) at the signal input terminal is pulled up and connected to the control circuit. A bidirectional voltage suppressor (50) is also added at the signal input terminal and connected to ground to improve port protection and prevent electrostatic interference or damage to the detection circuit. The first end of the voltage suppressor (50) is connected to the signal input terminal, and the second end of the voltage suppressor (50) is connected to ground. Then, the signal input terminal is connected to the non-inverting input terminal of the comparator (10) through a second resistor (32) to input the collision signal to be detected to the non-inverting input terminal of the comparator (10).

[0076] like Figure 7 As shown, the control circuit uses two transistors to pull up the power supply to the control signal input terminal. The pull-up power supply comes from the system power supply, so the power supply can be controlled by the MCU to prevent abnormal power consumption that may occur in the system sleep mode. Specifically, the control circuit includes a first power supply (21), a second power supply (22), a first transistor (23), and a second transistor (24). When the system is working normally, the second power supply (22) is powered on, the first transistor (23) and the second transistor (24) are turned on, and the collision signal processing circuit operates normally. When the system is in sleep mode, the second power supply (22) is powered off, the first transistor (23) and the second transistor (24) are turned on and off, and the first power supply (21) cannot supply power to the collision signal processing circuit, thus preventing abnormal power consumption and achieving low power consumption. The required collision threshold voltage can be set by adjusting the parameter values ​​of the first pull-up resistor (31) at the signal input port, the second resistor (32) and the third resistor (33) at the non-inverting input terminal of the comparator (10), and the fourth pull-up resistor (34) R4 at the output terminal of the comparator (10), thereby meeting the needs of different application scenarios.

[0077] It should be noted that the first power supply (21) is used to power the entire detection module, while the second power supply (22) is used to control the first power supply (21). When the second power supply (22) is powered on, the first transistor (23) conducts, which in turn conducts the second transistor (24), allowing the first power supply (21) to power the subsequent detection module. The first power supply (21) is a constant power supply for the entire BMS system, meaning that the first power supply (21) continues to supply power even when the BMS is in sleep mode. The second power supply (22) is another non-constant power supply in the BMS system, and its power supply is also disconnected when the system is in sleep mode. Therefore, when the system is in sleep mode, the second power supply (22) is de-energized, thus preventing the first transistor (23) and the second transistor (24) from conducting, which prevents the first power supply (21) from continuing to supply power to the subsequent detection module and causing abnormal power consumption.

[0078] The base of the second transistor (24) is connected to the collector of the first transistor (23). The collector of the second transistor (24) is connected to the subsequent signal processing circuit. That is, the first end of the first resistor (31), the first end of the fifth resistor (35), the positive power supply terminal of the comparator (10), and the first end of the fourth resistor (34) are respectively connected to the collector of the second transistor (24). The emitter of the second transistor (24) is connected to the first power supply (21). The base of the first transistor (23) is connected to the second power supply (22). The emitter of the first transistor (23) is grounded.

[0079] The conversion circuit uses a third transistor (25) for level conversion. The collector of the transistor outputs and is simultaneously pulled up to the control circuit. Specifically, the base of the third transistor (25) is connected to the output of the comparator (10), the collector of the third transistor (25) is connected to the second power supply (22), the collector of the third transistor (25) is connected to the signal output terminal, and the emitter of the third transistor (25) is grounded.

[0080] In one embodiment, the control circuit further includes a seventh resistor (37), an eighth resistor (38), a ninth resistor (39), and a tenth resistor (310), wherein,

[0081] The base of the second transistor (24) is connected to the second power supply (22) through the ninth resistor (39);

[0082] The base of the second transistor (24) is connected to the collector of the first transistor (23) through the tenth resistor (310);

[0083] The first end of the seventh resistor (37) is connected to the second power supply (22), the base of the first transistor (23) is connected to the second end of the seventh resistor (37), the second end of the seventh resistor (37) is connected to the first end of the eighth resistor (38), and the second end of the eighth resistor (38) is grounded.

[0084] In this embodiment, an eighth resistor (38) and a ninth resistor (39) are connected in parallel between the base and emitter of the first transistor (23) and the second transistor (24). This ensures that the transistors are effectively turned off and also provides a discharge path for the parasitic capacitance between the base and emitter, preventing the transistors from breaking down. Specifically, the first end of the seventh resistor (37) is connected to the second power supply (22), the base of the first transistor (23) is connected to the second end of the seventh resistor (37), the second end of the seventh resistor (37) is connected to the first end of the eighth resistor (38), and the second end of the eighth resistor (38) is grounded.

[0085] Furthermore, the base of the second transistor (24) is connected to the second power supply (22) through the ninth resistor (39), and the base of the second transistor (24) is connected to the collector of the first transistor (23) through the tenth resistor (310).

[0086] In one embodiment, the base of the second transistor (24) is connected to the second power supply (22) through a ninth resistor (39), including:

[0087] The base of the second transistor (24) is connected to the first end of the ninth resistor (39), and the second end of the ninth resistor (39) is connected to the second power supply (22).

[0088] In this embodiment, the base of the second transistor (24) is connected to the first end of the ninth resistor (39), and the second end of the ninth resistor (39) is connected to the second power supply (22).

[0089] In one embodiment, the base of the second transistor (24) is connected to the collector of the first transistor (23) through a tenth resistor (310), including:

[0090] The base of the second transistor (24) is connected to the first end of the tenth resistor (310), and the second end of the tenth resistor (310) is connected to the collector of the first transistor (23).

[0091] In this embodiment, the base of the second transistor (24) is connected to the first end of the tenth resistor (310), and the second end of the tenth resistor (310) is connected to the collector of the first transistor (23).

[0092] In one embodiment, the conversion circuit further includes an eleventh resistor (311), a twelfth resistor (312), a thirteenth resistor (313), and a fourteenth resistor (314). The eleventh resistor (311) is located at the output terminal of the comparator (10), with its first end connected to the output terminal of the comparator (10) and its second end connected to ground. The twelfth resistor (312) is also located at the output terminal of the comparator (10), with its first end connected to the output terminal of the comparator (10) and its second end connected to the base of the third transistor (25). The second end of the twelfth resistor (312) is also connected to the first end of the thirteenth resistor (313), and the second end of the thirteenth resistor (313) is connected to ground.

[0093] In this embodiment, in order for the microcontroller to calculate the frequency and duty cycle of the collision signal, the output of the comparator (10) is connected to a conversion circuit, namely a level conversion circuit. When the output of the comparator (10) is high, the collision detection is low; when the output of the comparator (10) is low, the collision detection is high, and a PWM signal with the same frequency as the collision signal but with the opposite duty cycle is output.

[0094] In the conversion circuit, the first end of the eleventh resistor (311) is connected to the output of the comparator (10), and the second end of the eleventh resistor (311) is connected to ground; the first end of the twelfth resistor (312) is connected to the output of the comparator (10), the second end of the twelfth resistor (312) is connected to the base of the third transistor (25), and the second end of the twelfth resistor (312) is connected to the first end of the thirteenth resistor (313), and the second end of the thirteenth resistor (313) is connected to ground.

[0095] In one embodiment, the collector of the third transistor (25) is connected to the second power supply (22), including:

[0096] The collector of the third transistor (25) is connected to the first end of the fourteenth resistor (314), and the second end of the fourteenth resistor (314) is connected to the second power supply (22).

[0097] In one embodiment, the collector of the transistor is output and simultaneously pulled up to the second power supply (22) through the fourteenth resistor (314), that is, the collector of the third transistor (25) is connected to the second power supply (22) through the fourteenth resistor (314).

[0098] The collision signal detection circuit provided by this utility model can be used for voltage-type fixed-frequency and duty-cycle PWM collision signal detection, as well as for high and low level communication waveform detection (e.g., serial communication), achieving low power consumption and strong anti-interference capability. Furthermore, this circuit adds a system power supply control circuit, preventing abnormal power consumption during system sleep mode, thus achieving low power consumption. By using a hysteresis comparator (10), noise in the input signal can be eliminated, improving signal accuracy and system stability and reliability.

[0099] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of this utility model. It should be understood that the above descriptions are merely specific embodiments of this utility model and are not intended to limit the scope of protection of this utility model. In particular, it should be noted that any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this utility model by those skilled in the art should be included within the scope of protection of this utility model.

Claims

1. A comparator circuit, characterized in that, It includes a comparator (10), a second resistor (32), a third resistor (33), a fourth resistor (34), a fifth resistor (35), and a sixth resistor (36), among which, The first input terminal of the comparator (10) is connected to the signal input terminal through the second resistor (32), the first terminal of the fifth resistor (35) is connected to the control circuit, and the second terminal of the fifth resistor (35) is connected to the second input terminal of the comparator (10). The first end of the sixth resistor (36) is connected to the second end of the fifth resistor (35), and the second end of the sixth resistor (36) is connected to ground. The first end of the third resistor (33) is connected to the first input end of the comparator (10), and the second end of the third resistor (33) is connected to the output end of the comparator (10). The first end of the fourth resistor (34) is connected to the output of the comparator (10), and the second end of the fourth resistor (34) is used to connect to the control circuit.

2. The comparator circuit as described in claim 1, characterized in that, The first input terminal of the comparator (10) is connected to the signal input terminal via a second resistor (32), including: The first input terminal of the comparator (10) is connected to the first terminal of the second resistor (32), and the second terminal of the second resistor (32) is used to connect to the signal input terminal.

3. The comparator circuit as described in claim 1, characterized in that, Also includes: The positive power supply terminal of the comparator (10) is used to connect to the control circuit, and the negative power supply terminal of the comparator (10) is connected to ground.

4. A signal processing circuit, characterized in that, It includes comparator circuits and filter circuits, among which, The comparator circuit is the comparator circuit as described in any one of claims 1 to 3; The filter circuit includes a first capacitor (41), a second capacitor (42) and a third capacitor (43), wherein the first end of the first capacitor (41) is connected to the first input terminal of the comparator (10), the first end of the second capacitor (42) is connected to the second input terminal of the comparator (10), and the second ends of the first capacitor (41) and the second ends of the second capacitor (42) are both grounded. The first end of the third capacitor (43) is connected to the positive power supply terminal of the comparator (10), and the second end of the third capacitor (43) is connected to ground.

5. A collision signal detection circuit, characterized in that, It includes signal input circuits, signal processing circuits, conversion circuits, and control circuits, among which, The signal input circuit includes a signal input terminal, a first resistor (31) and a voltage suppressor (50), wherein the signal input terminal is connected to the first end of the first resistor (31), the second end of the first resistor (31) is connected to the first power supply (21), the first end of the voltage suppressor (50) is connected to the signal input terminal, and the second end of the voltage suppressor (50) is connected to ground. The signal input terminal in the signal input circuit is connected to the signal processing circuit, and the signal processing circuit is the signal processing circuit as described in claim 4. The control circuit includes a first power supply (21), a second power supply (22), a first transistor (23), and a second transistor (24). The base of the second transistor (24) is connected to the collector of the first transistor (23). The first end of the first resistor (31), the first end of the fifth resistor (35), the positive power supply terminal of the comparator (10), and the first end of the fourth resistor (34) are respectively connected to the collector of the second transistor (24). The emitter of the second transistor (24) is connected to the first power supply (21). The base of the first transistor (23) is connected to the second power supply (22). The emitter of the first transistor (23) is grounded. The conversion circuit includes a third transistor (25), wherein the base of the third transistor (25) is connected to the output terminal of the comparator (10), the collector of the third transistor (25) is connected to the second power supply (22), the collector of the third transistor (25) is connected to the signal output terminal, and the emitter of the third transistor (25) is grounded.

6. The collision signal detection circuit as described in claim 5, characterized in that, The control circuit also includes a seventh resistor (37), an eighth resistor (38), a ninth resistor (39), and a tenth resistor (310), wherein, The base of the second transistor (24) is connected to the second power supply (22) through the ninth resistor (39); The base of the second transistor (24) is connected to the collector of the first transistor (23) through the tenth resistor (310); The first end of the seventh resistor (37) is connected to the second power supply (22), the base of the first transistor (23) is connected to the second end of the seventh resistor (37), the second end of the seventh resistor (37) is connected to the first end of the eighth resistor (38), and the second end of the eighth resistor (38) is connected to ground.

7. The collision signal detection circuit as described in claim 6, characterized in that, The base of the second transistor (24) is connected to the second power supply (22) through the ninth resistor (39), including: The base of the second transistor (24) is connected to the first end of the ninth resistor (39), and the second end of the ninth resistor (39) is connected to the second power supply (22).

8. The collision signal detection circuit as described in claim 6, characterized in that, The base of the second transistor (24) is connected to the collector of the first transistor (23) through a tenth resistor (310), including: The base of the second transistor (24) is connected to the first end of the tenth resistor (310), and the second end of the tenth resistor (310) is connected to the collector of the first transistor (23).

9. The collision signal detection circuit as described in claim 5, characterized in that, The conversion circuit further includes an eleventh resistor (311), a twelfth resistor (312), a thirteenth resistor (313), and a fourteenth resistor (314), wherein the first end of the eleventh resistor (311) is connected to the output end of the comparator (10), and the second end of the eleventh resistor (311) is connected to ground. The first end of the twelfth resistor (312) is connected to the output of the comparator (10), the second end of the twelfth resistor (312) is connected to the base of the third transistor (25), and the second end of the twelfth resistor (312) is connected to the first end of the thirteenth resistor (313), and the second end of the thirteenth resistor (313) is connected to ground.

10. The collision signal detection circuit as described in claim 9, characterized in that, The collector of the third transistor (25) is connected to the second power supply (22), including: The collector of the third transistor (25) is connected to the first end of the fourteenth resistor (314), and the second end of the fourteenth resistor (314) is connected to the second power supply (22).

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