Broadband low-phase crosstalk ping-pong frequency hopping source

Abstract

The utility model relates to the field of microwave communication, in particular to a broadband low-phase crosstalk ping-pong frequency hopping source. Comprising an external reference power divider, a first reference phase-locked loop, a first power divider, a first m frequency divider, a second m frequency divider, a first reference selection switch, a first filter, a first output phase-locked loop, a second reference phase-locked loop, a second power divider, a first n frequency divider, a second n frequency divider, a second reference selection switch, a second filter, a second output phase-locked loop and an output switch. According to the utility model, the phase crosstalk is effectively reduced, and the frequency switching speed, the phase noise and the working frequency band are optimized at the same time.

Description

Technical Field

[0001] This utility model relates to the field of microwave communication, specifically to a broadband low-phase crosstalk ping-pong frequency hopping source. Background Technology

[0002] In modern communication systems, frequency hopping technology is widely used in radar, communications, and telemetry due to its excellent anti-interference capabilities and flexibility. As a core component of frequency hopping communication systems, the performance of the frequency hopping source directly affects key indicators such as communication efficiency, anti-interference capability, and bit error rate. With the rapid development of communication technology, the performance requirements for frequency hopping sources are becoming increasingly stringent, especially in terms of frequency switching speed, phase noise, phase crosstalk, and operating frequency band.

[0003] In recent years, related technologies have made some progress in the design of frequency hopping sources. For example, publication number CN118353453A proposes a broadband low phase noise frequency synthesis circuit and method. By introducing a high phase detection frequency phase-locked loop as an auxiliary loop, a low phase noise interpolated signal is generated, and phase noise is optimized by combining in-loop mixing technology, thus achieving a wide coverage output frequency. However, this technology mainly focuses on optimizing the phase noise and frequency coverage of a single signal, and does not delve into the phase crosstalk problem during multi-channel signal switching.

[0004] In practical applications, especially in ping-pong frequency hopping structures, phase crosstalk between the two local oscillator signals is a problem that urgently needs to be solved. In traditional frequency hopping source designs, phase crosstalk leads to signal quality degradation, increases the system's bit error rate, and reduces communication reliability during multi-signal switching. Furthermore, existing frequency hopping sources also have limitations in spurious emission suppression and operating frequency band expansion, making it difficult to meet the application requirements of broadband communication and complex electromagnetic environments.

[0005] Therefore, existing frequency-hopping source designs still have significant room for improvement when facing high-speed, wide-bandwidth, and low-phase-crosstalk applications. Effectively reducing phase crosstalk during frequency switching while optimizing frequency switching speed, phase noise, and operating frequency band is a crucial direction for the development of current frequency-hopping source technology. Utility Model Content

[0006] The purpose of this invention is to provide a broadband low-phase-crosstalk ping-pong frequency hopping source to solve the problem in the prior art where there is large phase crosstalk between two local oscillator signals during multi-channel signal switching, which leads to decreased signal quality, increased bit error rate, and reduced communication reliability.

[0007] To achieve the above objectives, the following technical solution is adopted.

[0008] A broadband low-phase-crosstalk ping-pong frequency hopping source includes an external reference power divider, a first reference phase-locked loop, a first power divider, a first m-divider, a second m-divider, a first reference selection switch, a first filter, a first output phase-locked loop, a second reference phase-locked loop, a second power divider, a first n-divider, a second n-divider, a second reference selection switch, a second filter, a second output phase-locked loop, and an output switch.

[0009] The external reference power divider is used to split the external reference signal into two signals. The first output terminal of the external reference power divider is connected to the input terminal of the first reference phase-locked loop (PLL), the output terminal of the first reference PLL is connected to the input terminal of the first power divider, and the two output terminals of the first power divider are respectively connected to the input terminals of the first m-divider and the second m-divider. The second output terminal of the external reference power divider is connected to the input terminal of the second reference PLL, the output terminal of the second reference PLL is connected to the input terminal of the second power divider, and the two output terminals of the second power divider are respectively connected to the input terminals of the first n-divider and the second n-divider.

[0010] The two input terminals of the first reference selection switch are respectively connected to the output terminals of the first m-divider and the first n-divider; the output terminal of the first reference selection switch is connected to the input terminal of the first filter, and the output terminal of the first filter is connected to the input terminal of the first output phase-locked loop.

[0011] The two input terminals of the second reference selection switch are connected to the output terminals of the second m-divider and the second n-divider, respectively. The output terminal of the second reference selection switch is connected to the input terminal of the second filter, and the output terminal of the second filter is connected to the input terminal of the second output phase-locked loop.

[0012] The first output phase-locked loop output terminal is connected to the first input terminal of the output switch, the second output phase-locked loop output terminal is connected to the second input terminal of the output switch, and the output terminal of the output switch is used to output the two generated local oscillator signals according to a preset selection.

[0013] Optionally, both the first reference phase-locked loop and the second reference phase-locked loop include:

[0014] A programmable frequency divider, whose frequency division coefficient register stores a set of coprime integer parameters;

[0015] An isolation amplifier is provided at the output of the programmable frequency divider;

[0016] The isolation amplifier includes a microstrip transmission line structure and a π-type filter circuit.

[0017] Optionally, the first output phase-locked loop and the second output phase-locked loop are provided with:

[0018] The dual-channel phase detection unit includes a parallel charge pump circuit and a voltage-controlled oscillator;

[0019] The tuning terminal of the voltage-controlled oscillator is connected to an RC filter network;

[0020] The RC filter network consists of ceramic capacitors and surface mount resistors.

[0021] Optionally, the external reference power divider is a two-channel power divider with a channel isolation greater than or equal to 20dB; the first power divider and the second power divider are two-channel power dividers with a channel isolation greater than or equal to 15dB.

[0022] Optionally, the output phase noise of the first m-divider, the second m-divider, the first n-divider, and the second n-divider is less than -150 dBc / Hz at a 100 kHz offset.

[0023] Optionally, the first reference selection switch and the second reference selection switch are radio frequency switches with an isolation greater than 75dB between input ports and a switching time of less than 1μs.

[0024] Optionally, the first and second filters are low-pass filters with harmonic suppression greater than 40dB.

[0025] Optionally, the output switch is an RF switch circuit with an isolation greater than 75dB between input ports and a switching time of less than 1μs.

[0026] Compared with the prior art, the present invention has the following beneficial effects:

[0027] This invention effectively reduces phase crosstalk between two local oscillator signals by introducing a frequency divider isolation mechanism into the ping-pong frequency hopping source. During frequency switching, the coordinated action of the reference selection switch and the filter ensures rapid phase stabilization of the signal after switching, significantly shortening the settling time and improving the system's communication efficiency.

[0028] By optimizing the structure and parameters of the phase-locked loop, the frequency-hopping source of this invention can operate over a wider frequency band while reducing spurious signal interference. This not only increases the communication bandwidth but also enhances the system's anti-interference capability, making it suitable for complex electromagnetic environments.

[0029] This invention employs a phase-locked loop design with coprime frequency output, combined with optimized low-pass filters and RF switches, effectively reducing spurious signal interference and widening the operating frequency band without whole-side spurious signals. Furthermore, the minimum step size of the local oscillator frequency is optimized, improving the system's flexibility and adaptability.

[0030] This utility model's output phase-locked loop adopts a fractional-number frequency division design and incorporates a digital phase detector supporting small-step and precise modes. It features fast frequency locking and low in-band phase noise. This ensures that the frequency hopping source can quickly lock onto the target frequency after frequency switching and output a high-quality, accurate signal. Attached Figure Description

[0031] Figure 1 This is a schematic diagram of the overall structure of an embodiment of a broadband low-phase crosstalk ping-pong frequency hopping source according to the present invention. Detailed Implementation

[0032] The present invention will now be described in detail with reference to the accompanying drawings and embodiments. It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other.

[0033] The following detailed description is exemplary and intended to provide further detailed explanation of the present invention. Unless otherwise specified, all technical terms used in this invention have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains. The terminology used in this invention is for the purpose of describing particular embodiments only and is not intended to limit the exemplary embodiments according to the present invention.

[0034] like Figure 1 As shown, the broadband low-phase-crosstalk ping-pong frequency hopping source of this invention includes several key components that work together to achieve low phase crosstalk and fast frequency switching. The external reference power divider is the fundamental component of the entire system. Its function is to split the externally provided reference signal into two paths, supplying the first reference phase-locked loop (PLL) and the second reference PLL respectively. This power divider employs a two-path design, ensuring an isolation of greater than or equal to 20dB between the two channels. This high isolation design effectively avoids mutual interference between the two reference signals, thereby ensuring the stability and signal purity of the subsequent PLLs. In practical applications, the external reference power divider can be a microstrip line power divider or a dielectric resonant power divider. Microstrip line power dividers have the advantages of compact structure and easy integration, making them suitable for high-frequency applications; while dielectric resonant power dividers have higher power capacity and lower insertion loss, making them suitable for high-power or high-precision scenarios. The appropriate power divider type can be selected according to the actual application requirements. Furthermore, the output of the power divider can also be transmitted via a microstrip transmission line, further reducing signal loss and interference.

[0035] The reference phase-locked loop (first reference phase-locked loop and second reference phase-locked loop) is one of the core components of the frequency hopping source. Its main function is to provide a high-precision reference signal for subsequent power dividers and frequency dividers. In this invention, both the first and second reference phase-locked loops employ a fractional-order frequency division design, incorporating a built-in digital phase detector supporting precise mode and low noise, enabling ultra-low in-band phase noise and wide loop bandwidth. Furthermore, the two reference phase-locked loops output coprime frequency values; this design effectively avoids whole-side spurious noise and reduces local oscillator frequency step size. In specific implementation, the programmable frequency divider of the reference phase-locked loops pre-stores a set of coprime integer value parameters, which are controlled by a microprocessor or FPGA to achieve dynamic frequency adjustment. An isolation amplifier is also provided at the output of the frequency divider, which includes a microstrip transmission line structure and a π-type filter circuit. This design further reduces noise and interference during signal transmission, ensuring high-quality output of the reference signal. In addition, the loop filter of the reference phase-locked loops can employ a high-order filter design to further optimize phase noise performance.

[0036] The function of the power divider (first power divider and second power divider) is to split the signal output from the reference phase-locked loop into two paths, each supplying a separate frequency divider. Both the first and second power dividers are dual-path designs with an isolation of at least 15 dB between their two channels. This isolation design effectively reduces the wiring interference between the two frequency dividers, ensuring signal purity. In practical implementation, the power divider can be a microstrip power divider or a dielectric resonator power divider, similar to an external reference power divider. The appropriate power divider type can be selected based on the specific application requirements. Furthermore, the output of the power divider can also be transmitted via a microstrip transmission line, further reducing signal loss and interference.

[0037] The frequency divider (first m-divider, second m-divider, first n-divider, and second n-divider) is a key component in the frequency hopping source. Its function is to divide the signal output from the power divider to provide signals of different frequencies for the subsequent reference selection switch. The frequency divider in this invention includes a first m-divider, a second m-divider, a first n-divider, and a second n-divider, with an output phase noise below -150 dBc / Hz at a 100 kHz offset. This low phase noise design effectively avoids signal degradation and ensures the final output phase noise performance of the frequency hopping source. In specific implementations, the frequency divider can be a digital or analog divider. Digital dividers offer high precision and programmability, making them suitable for complex frequency adjustment scenarios; analog dividers offer low noise and high linearity, making them suitable for scenarios with high signal quality requirements. The appropriate divider type can be selected based on the actual application requirements. Furthermore, the output of the frequency divider can be filtered by a π-type filter circuit to further reduce high-frequency harmonic interference.

[0038] The reference selection switches (first and second reference selection switches) function to switch between different frequency signals, providing a reference signal for the output phase-locked loop. In this invention, both the first and second reference selection switches are RF switches with an input port isolation greater than 75dB and a switching time less than 1μs. This high isolation and fast switching design effectively reduces signal spurious signals and lock-in time, ensuring the rapid frequency switching capability of the frequency hopping source. In specific implementations, the reference selection switches can be PIN diode switches or microelectromechanical systems (MEMS) switches. PIN diode switches offer high isolation and low insertion loss, making them suitable for high-frequency applications; MEMS switches offer higher reliability and smaller size, making them suitable for integrated designs. The appropriate switch type can be selected based on the specific application requirements.

[0039] The function of the filters (first filter and second filter) is to filter the signal output from the reference selection switch, reducing high-frequency harmonic leakage and ensuring the purity of the reference signal. In this invention, both the first and second filters are low-pass filters with harmonic suppression greater than 40dB. This high harmonic suppression design effectively reduces output spurious signals from the frequency hopping source and improves signal quality. In specific implementations, the filters can be ceramic filters or dielectric resonant filters. Ceramic filters have the advantages of high Q value and low insertion loss, making them suitable for high-frequency applications; while dielectric resonant filters have higher power capacity and lower harmonic interference, making them suitable for high-power or high-precision applications. The appropriate filter type can be selected based on the actual application requirements. Furthermore, the filter design can employ a multi-stage filtering structure to further optimize harmonic suppression performance.

[0040] The output phase-locked loops (first and second output phase-locked loops) are the final output components of the frequency-hopping source, and their function is to generate a local oscillator signal based on the reference signal. In this invention, both the first and second output phase-locked loops employ a fractional-order frequency division design, incorporating a digital phase detector supporting small-step and precise modes, and featuring low in-band phase noise and a fast frequency lock mode. This design ensures that the phase-locked loops possess fast frequency lock functionality and high-quality, accurate signal output. In a specific implementation, the dual-channel phase detection unit of the output phase-locked loops includes a parallel charge pump circuit and a voltage-controlled oscillator (VCO). The tuning terminal of the VCO is connected to an RC filter network, which consists of ceramic capacitors and surface-mount resistors. This design further optimizes the performance of the phase-locked loops, reducing signal noise and spurious signals. Furthermore, the loop filter of the output phase-locked loops can employ a high-order filter design to further optimize phase noise performance.

[0041] The output switch functions to switch between two local oscillator signals, selecting the desired output signal based on a preset path. The output switch in this invention is an RF switch circuit with an isolation greater than 75dB between input ports and a switching time of less than 1μs. This high isolation and fast switching design effectively reduces signal leakage and lock-in time, ensuring the rapid frequency switching capability of the frequency hopping source. In specific implementations, the output switch can be a PIN diode switch or a microelectromechanical system (MEMS) switch, similar to the reference selection switch. The appropriate switch type can be selected based on the specific application requirements.

[0042] In summary, this invention significantly reduces phase crosstalk during ping-pong ring local oscillator frequency switching, shortens the phase settling time after frequency switching, enhances communication bandwidth and anti-interference capability, widens the operating frequency band, and reduces spurious emissions by optimizing the design of key components such as the external reference power divider, reference phase-locked loop, power divider, frequency divider, reference selection switch, filter, output phase-locked loop, and output switch. This design can be further expanded in practical applications to meet different needs, such as selecting different types of power dividers, frequency dividers, filters, and switches to satisfy various application scenarios and performance requirements.

[0043] As is known from common technical knowledge, this utility model can be implemented through other embodiments that do not depart from its spirit or essential characteristics. Therefore, the disclosed embodiments described above are merely illustrative in all respects and are not the only ones. All modifications within the scope of this utility model or its equivalents are included in this utility model.

Claims

1. A broadband low-phase-crosstalk ping-pong frequency hopping source, characterized in that, include, External reference power divider, first reference phase-locked loop, first power divider, first m-divider, second m-divider, first reference selection switch, first filter, first output phase-locked loop, second reference phase-locked loop, second power divider, first n-divider, second n-divider, second reference selection switch, second filter, second output phase-locked loop, output switch; The external reference power divider is used to split the external reference signal into two signals. The first output terminal of the external reference power divider is connected to the input terminal of the first reference phase-locked loop (PLL), the output terminal of the first reference PLL is connected to the input terminal of the first power divider, and the two output terminals of the first power divider are respectively connected to the input terminals of the first m-divider and the second m-divider. The second output terminal of the external reference power divider is connected to the input terminal of the second reference PLL, the output terminal of the second reference PLL is connected to the input terminal of the second power divider, and the two output terminals of the second power divider are respectively connected to the input terminals of the first n-divider and the second n-divider. The two input terminals of the first reference selection switch are respectively connected to the output terminals of the first m-divider and the first n-divider; the output terminal of the first reference selection switch is connected to the input terminal of the first filter, and the output terminal of the first filter is connected to the input terminal of the first output phase-locked loop. The two input terminals of the second reference selection switch are connected to the output terminals of the second m-divider and the second n-divider, respectively. The output terminal of the second reference selection switch is connected to the input terminal of the second filter, and the output terminal of the second filter is connected to the input terminal of the second output phase-locked loop. The first output phase-locked loop output terminal is connected to the first input terminal of the output switch, the second output phase-locked loop output terminal is connected to the second input terminal of the output switch, and the output terminal of the output switch is used to output the two generated local oscillator signals according to a preset selection.

2. The broadband low-phase crosstalk ping-pong frequency hopping source according to claim 1, characterized in that, Both the first reference phase-locked loop and the second reference phase-locked loop include: A programmable frequency divider, whose frequency division coefficient register stores a set of coprime integer parameters; An isolation amplifier is provided at the output of the programmable frequency divider; The isolation amplifier includes a microstrip transmission line structure and a π-type filter circuit.

3. The broadband low-phase-crosstalk ping-pong frequency hopping source according to claim 1, characterized in that, The first output phase-locked loop and the second output phase-locked loop are provided with: The dual-channel phase detection unit includes a parallel charge pump circuit and a voltage-controlled oscillator; The tuning terminal of the voltage-controlled oscillator is connected to an RC filter network; The RC filter network consists of ceramic capacitors and surface mount resistors.

4. A broadband low-phase crosstalk ping-pong frequency hopping source according to claim 1, characterized in that, The external reference power divider is a two-channel power divider with a channel isolation of ≥20dB; the first power divider and the second power divider are two-channel power dividers with a channel isolation of ≥15dB.

5. A broadband low-phase-crosstalk ping-pong frequency hopping source according to claim 1, characterized in that, The output phase noise of the first m-divider, the second m-divider, the first n-divider, and the second n-divider is less than -150 dBc / Hz at a 100 kHz offset.

6. A broadband low-phase crosstalk ping-pong frequency hopping source according to claim 1, characterized in that, The first and second reference selection switches are radio frequency switches with an isolation greater than 75dB between their input ports and a switching time of less than 1μs.

7. A broadband low-phase-crosstalk ping-pong frequency hopping source according to claim 1, characterized in that, The first and second filters are low-pass filters with harmonic suppression greater than 40dB.

8. A broadband low-phase-crosstalk ping-pong frequency hopping source according to claim 1, characterized in that, The output switch is an RF switch circuit with an isolation greater than 75dB between input ports and a switching time of less than 1μs.

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