Driving circuit of display panel, display panel and display device

Abstract

The utility model discloses a driving circuit of a display panel, the display panel and a display device, and belongs to the technical field of display. The driving circuit of the display panel provided by the utility model comprises a voltage division module which accesses a frame start signal and is used for obtaining a voltage division signal based on voltage division of the frame start signal; the conversion module is connected with the voltage division module, and the conversion module is used for performing conversion based on the voltage division signal to obtain a direct current reference voltage; the reverse operational amplifier module is connected with the conversion module, and the reverse operational amplifier module is used for outputting reverse output voltage based on the direct current reference voltage; and the same-direction operational amplifier module is connected with the reverse-direction operational amplifier module, common voltage is further accessed to the same-direction operational amplifier module, and the same-direction operational amplifier module is used for outputting compensation common voltage based on the reverse-direction output voltage and the common voltage, so that screen flicker in the VRR mode is improved.

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to driving circuits for display panels, display panels, and display devices. Background Technology

[0002] With the rapid development of display technology, users have increasingly higher requirements for the driving circuit of display panels. The traditional driving method of display panels is to dynamically adjust the gamma voltage of the gamma IC (chip) through I2C when the detected V-blank (vertical blanking) area reaches a certain length, so as to achieve a brightness close to the corresponding frequency of the I2C instruction and reduce screen flicker in VRR mode. This driving method of display panels has a great defect, and there will be a phenomenon that the gamma voltage cannot meet the overall image quality compensation. That is, there is an urgent need for a new driving circuit of display panels to improve screen flicker in VRR mode. Summary of the Invention

[0003] The main objective of this application is to provide a driving circuit for a display panel, a display panel, and a display device, aiming to solve the technical problem of how to improve screen flicker in VRR mode.

[0004] To achieve the above objectives, this application provides a driving circuit for a display panel, the driving circuit for the display panel comprising:

[0005] A voltage divider module is connected to a frame start signal, and the voltage divider module is used to obtain a voltage divider signal based on the frame start signal.

[0006] A conversion module is connected to the voltage divider module, and the conversion module is used to convert the voltage divider signal to obtain a DC reference voltage.

[0007] An inverting operational amplifier module is connected to the conversion module and is used to output an inverted output voltage based on the DC reference voltage.

[0008] A non-inverting operational amplifier module is connected to the inverting operational amplifier module. The non-inverting operational amplifier module is also connected to a common voltage. The non-inverting operational amplifier module is used to output a compensation common voltage based on the inverting output voltage and the common voltage.

[0009] Optionally, the voltage divider module includes:

[0010] A first resistor, the first end of which is connected to the frame start signal;

[0011] The second resistor has its first end connected to the second end of the first resistor and the conversion module, and its second end is grounded.

[0012] Optionally, the conversion module includes:

[0013] A diode, wherein the anode of the diode is connected to the first terminal of the second resistor;

[0014] A third resistor, the first end of which is connected to the cathode of the diode;

[0015] A fourth resistor, the first end of which is connected to the second end of the third resistor;

[0016] A first capacitor, the first end of which is connected to the first end of the inverting operational amplifier module and the fourth resistor, and the second end of which is connected to the second end of the fourth resistor and then grounded.

[0017] Optionally, the inverting operational amplifier module includes:

[0018] An inverting operational amplifier, wherein the first input terminal of the inverting operational amplifier is connected to the first terminal of the first capacitor, and the output terminal of the inverting operational amplifier is connected to the non-inverting operational amplifier module;

[0019] The fifth resistor has its first end grounded and its second end connected to the second input terminal of the inverting operational amplifier.

[0020] The sixth resistor has its first end connected to the second end of the fifth resistor, and its second end connected to the output terminal of the inverting operational amplifier.

[0021] Optionally, the in-phase operational amplifier module includes:

[0022] The seventh resistor, the first end of which is connected to the common voltage;

[0023] The eighth resistor, the first end of which is connected to the output terminal of the inverting operational amplifier;

[0024] A non-inverting operational amplifier, wherein the first input terminal of the non-inverting operational amplifier is connected to the second terminal of the eighth resistor and the second terminal of the seventh resistor, and the second input terminal of the non-inverting operational amplifier is connected to the output terminal of the non-inverting operational amplifier;

[0025] The ninth resistor has its first end grounded and its second end connected to the second input terminal of the non-inverting operational amplifier.

[0026] Optionally, the driving circuit of the display panel further includes:

[0027] A driving module, wherein the common voltage input terminal of the driving module is connected to the output terminal of the non-inverting operational amplifier.

[0028] Optionally, when the frame start signal is a frame start voltage with a high refresh rate, the inverting operational amplifier outputs a low voltage signal, and the non-inverting operational amplifier outputs a first compensation common voltage based on the low voltage signal.

[0029] Optionally, when the frame start signal is a frame start voltage with a low refresh rate, the inverting operational amplifier outputs a high voltage signal, and the non-inverting operational amplifier outputs a second compensation common voltage based on the high voltage signal, wherein the second compensation common voltage is greater than the first compensation common voltage.

[0030] In addition, to achieve the above objectives, this application also provides a display panel, the display panel including a color filter substrate, a liquid crystal layer and an array substrate, the liquid crystal layer being disposed between the array substrate and the color filter substrate, and the array substrate including the driving circuit of the above-mentioned display panel.

[0031] In addition, to achieve the above objectives, this application also provides a display device, which includes the display panel described above.

[0032] This application proposes a driving circuit for a display panel, a display panel, and a display device. This application optimizes the driving circuit for the display panel, resulting in a novel driving circuit comprising: a voltage divider module, a conversion module, an inverting operational amplifier module, and a non-inverting operational amplifier module. A frame start signal is input to the voltage divider module and processed by the conversion module and the inverting operational amplifier module to obtain an inverted output voltage. This inverted output voltage and the common voltage of the initial input panel are then input to the non-inverting operational amplifier module to obtain a compensated common voltage. The common voltage of the initial input panel is then compensated based on this compensated common voltage. By combining the above modules, this application performs real-time dynamic compensation of the common voltage when the display panel refresh rate changes. At high frequencies, due to less leakage, less compensation voltage is applied to the display panel; at low frequencies, due to more leakage, more compensation voltage is applied. This achieves different compensation of the common voltage of the input panel at different refresh rates, improving the significant brightness changes caused by changes in the display panel refresh rate, and thus reducing screen flicker in VRR (Variable Refresh Rate) mode. Attached Figure Description

[0033] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0034] Figure 1This is a functional module diagram of the first embodiment of the driving circuit for the display panel of this application;

[0035] Figure 2 A schematic diagram of a connection for existing Gamma voltage compensation;

[0036] Figure 3 A waveform diagram of pixel voltage at different refresh rates;

[0037] Figure 4 This is a functional module diagram of a second embodiment of the driving circuit for the display panel of this application;

[0038] Figure 5 A waveform diagram of the frame start voltage at different refresh rates;

[0039] Figure 6 This is a circuit connection diagram of the driving circuit of the display panel of this application;

[0040] Figure 7 This is another circuit connection diagram of the driving circuit of the display panel in this application;

[0041] Figure 8 This is a circuit connection diagram of the driving module in the driving circuit of the display panel of this application;

[0042] Figure 9 This is a schematic diagram of the structure of the display panel involved in the embodiments of this application.

[0043] Explanation of icon numbers:

[0044] label name label name 1001 processor 1002 Communication bus 1003 User Interface 1004 Network interface 1005 memory 10 Voltage divider module 20 Conversion Module Gate Gate drive voltage STV Frame start signal Data Data voltage 21 First voltage compensation module 30 Inverting op-amp module 40 Inverting operational amplifier module R1-R9 First resistor - Ninth resistor C1 First capacitor D diode 50 driver module M1-M3 First-Third Thin Film Transistors Clc1-Clc2 First and second liquid crystal capacitors Cst1-Cst2 First and second storage capacitors Svcom Subpixel common terminal Vcom3 Third public terminal Vcom4 Fourth public terminal Avcom First public terminal Cfvcom Second public terminal Vcom Common voltage Vcom-out Compensation common voltage U1 Inverting op-amp U2 In-phase op-amp

[0045] The realization of the purpose, functional features and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0046] It should be understood that the specific embodiments described herein are merely illustrative of this application and are not intended to limit this application.

[0047] This application provides a driving circuit for a display panel, referring to... Figure 1 , Figure 1 This is a functional module diagram of the first embodiment of the driving circuit for the display panel of this application.

[0048] In this embodiment, the driving circuit of the display panel includes:

[0049] Voltage divider module 10 is connected to frame start signal STV and is used to obtain a voltage divider signal based on frame start signal STV.

[0050] A conversion module 20 is connected to the voltage divider module 10, and the conversion module 20 is used to convert the voltage divider signal to obtain a DC reference voltage.

[0051] An inverting operational amplifier module 30 is connected to the conversion module 20, and the inverting operational amplifier module 30 is used to output an inverted output voltage based on the DC reference voltage;

[0052] The non-inverting operational amplifier module 40 is connected to the inverting operational amplifier module 30. The non-inverting operational amplifier module 40 is also connected to a common voltage Vcom. The non-inverting operational amplifier module 40 is used to output a compensation common voltage Vcom-out based on the inverting output voltage and the common voltage.

[0053] It should be noted that the display panel driving circuit of this embodiment is applicable to all scenarios with varying refresh rates. This embodiment takes a variable refresh rate (VRR) scenario as an example. VRR allows the entire screen display process to refresh from low to high frequencies, meaning the screen refresh rate can be matched to the game frame rate in real time, avoiding screen tearing and stuttering caused by different frequencies. The conventional debugging method involves adjusting the Gamma voltage compensation at different frequencies. (Refer to...) Figure 2 , Figure 2 This is a connection diagram for existing Gamma voltage compensation. Whenever the Tcon (Timing Controller) detects that the V-blank area reaches a certain length, it dynamically adjusts the Gamma voltage of the Gamma IC (Integrated Circuit) via I2C. This ensures that the brightness is close to the frequency corresponding to the I2C command, reducing screen flicker in VRR mode. The PMIC (Power Management IC) provides the necessary voltage for the entire control. The active screen working time varies, and the longer the blanking area, the greater the Gamma. Compensation is achieved through multiple Gamma values. Taking a 60Hz and 120Hz refresh rate as an example, at 120Hz, the initial 1-frame uses 60Hz GAM (Gamma voltage) before subsequent uses of 120Hz GAM (Gamma voltage), causing flickering during refresh rate switching. Another point is that the common gamma IC tuning scheme involves adjusting GM1 / GM14 individually (start and end points), which affects the overall image quality. Therefore, based on the above issues, this application proposes a new display panel driving circuit to improve screen flicker in VRR mode (and also for other refresh rate switching scenarios).

[0054] In this embodiment, screen flickering is analyzed in VRR mode (but can also be analyzed in other refresh rate switching scenarios). Refer to [reference needed]. Figure 3 , Figure 3 This diagram illustrates the waveform of pixel voltage at different refresh rates. Taking 60Hz and 120Hz as examples, the graph shows that the blank area is longer at 60Hz, resulting in more pixel leakage current. The blank area is shorter at 120Hz, resulting in less pixel leakage current. The graph also shows a significant difference between data V1 at 60Hz and data V2 at 120Hz, leading to severe flickering during frequency switching. (Refer to...) Figure 4 , Figure 4 This is a functional module diagram of the second embodiment of the driving circuit of the display panel of this application. In this embodiment, by adjusting the voltage of the subpixel common terminal Svcom and the first common terminal Avcom of the storage capacitor (i.e., the common terminal of the driving module 50) in the V-blank region, pixel leakage (voltage difference during refresh rate switching) can be effectively reduced and the flicker phenomenon can be improved.

[0055] For example, since flickering occurs when the refresh rate changes, the voltage divider module 10 divides the received frame start signal (STV) to obtain a voltage divider signal. This voltage divider signal is then connected to the conversion module 20, which converts the voltage divider signal to obtain a DC reference voltage. Finally, the inverting operational amplifier module 30 outputs an inverted output voltage based on the DC reference voltage. Here, the voltage divider signal refers to the voltage signal obtained by dividing the frame start signal (STV) by the voltage divider module 10, the DC reference voltage refers to the DC signal after AC-to-DC conversion based on the voltage signal, and the inverted output voltage refers to the output voltage after the DC reference voltage is input to the inverting operational amplifier module 30. At this point, after processing by the non-inverting operational amplifier module 40, in addition to the inverted output voltage, the non-inverting operational amplifier module 40 also receives the common voltage Vcom. Based on the common voltage Vcom and the inverted output voltage, it outputs a compensation common voltage Vcom-out. This compensation common voltage Vcom-out, after being input via the common voltage Vcom and the inverted output voltage, is then supplied to the node in the display panel that inputs the common voltage Vcom, thus achieving common voltage Vcom compensation. In other words, when changing the refresh rate, the compensation common voltage Vcom-out is obtained by inputting the frame start signal STV and the common voltage Vcom to the drive circuit of the display panel, and then supplied to the common voltage Vcom input terminal in the display panel, thereby improving the flickering problem caused by leakage current during refresh rate changes at low refresh rates.

[0056] This embodiment proposes a driving circuit for a display panel, a display panel, and a display device. This application optimizes the driving circuit for the display panel, resulting in a novel driving circuit comprising: a voltage divider module, a conversion module, an inverting operational amplifier module, and a non-inverting operational amplifier module. A frame start signal is input to the voltage divider module and processed by the conversion module and the inverting operational amplifier module to obtain an inverted output voltage. This inverted output voltage and the common voltage of the initial input panel are then input to the non-inverting operational amplifier module to obtain a compensated common voltage. This compensated common voltage then compensates for the common voltage of the initial input panel. This avoids the problem that the Gamma voltage cannot meet the overall image quality compensation requirements. By combining the above modules, this application achieves compensation of the common voltage of the initial input panel with the compensated common voltage, thereby improving screen flicker in VRR mode.

[0057] Furthermore, referring to Figure 6 , Figure 6 This is a circuit connection diagram of the driving circuit for the display panel of this application.

[0058] like Figure 6 As shown, in some feasible embodiments, the voltage divider module 10 includes:

[0059] A first resistor R1, with its first end connected to the frame start signal STV;

[0060] The second resistor R2 has its first end connected to the second end of the first resistor R1 and the conversion module 20, and its second end is grounded.

[0061] For example, the voltage divider module 10 is used to divide and output the frame start signal STV. It can be a direct resistor voltage divider or other voltage divider methods, which are not limited here.

[0062] Furthermore, in some feasible embodiments, the conversion module 20 includes:

[0063] Diode D, wherein the anode of diode D is connected to the first terminal of the second resistor R2;

[0064] The third resistor R3, the first end of which is connected to the cathode of the diode D;

[0065] The fourth resistor R4, the first end of which is connected to the second end of the third resistor R3;

[0066] The first capacitor C1 has its first end connected to the first end of the inverting operational amplifier module 30 and the fourth resistor R4, and its second end is connected to the second end of the fourth resistor R4 and then grounded.

[0067] Specifically, the inverting operational amplifier module 30 includes:

[0068] Inverting operational amplifier U1, the first input terminal of which is connected to the first terminal of the first capacitor C1, and the output terminal of the inverting operational amplifier U1 is connected to the non-inverting operational amplifier module 40;

[0069] The fifth resistor R5 has its first end grounded and its second end connected to the second input terminal of the inverting operational amplifier U1.

[0070] The sixth resistor R6 has its first end connected to the second end of the fifth resistor R5, and its second end connected to the output terminal of the inverting operational amplifier U1.

[0071] In this embodiment, refer to Figure 5 , Figure 5 This diagram illustrates the waveform of the frame start voltage at different refresh rates. Taking a high refresh rate of 144Hz and a low refresh rate of 48Hz as examples, the duty cycles of the STV signals are different. Since the STV signal is the initial signal, it can be used as a basis for compensation control. The STV signal (the frame start signal for which the refresh rate is to be switched) is connected in series with the first resistor R1 and the second resistor R2 to obtain a voltage divider signal. This divided signal is regulated by a unidirectional diode D and a third resistor R3, and then passes through an RC circuit (composed of a fourth resistor R4 and a first capacitor C1). This converts the AC STV signal into a DC Vref voltage (DC reference voltage). Because the duty cycle of the STV signal is different at different refresh rates, the STV becomes a DC Vref voltage after passing through the RC circuit. When the frequency changes, the STV duty cycle changes, thus achieving different compensation common voltages for high and low frequencies. The Vref voltage generated after passing through the RC circuit then passes through an inverting operational amplifier U1 to generate a U+ voltage. The inverting operational amplifier U1 can be an OP series operational amplifier.

[0072] For example, taking a high refresh rate of 144Hz and a low refresh rate of 48Hz as examples, when the frequency is 48Hz, the duty cycle of the STV is small, and the Vref voltage generated after passing through the RC circuit is low. The inverting operational amplifier U1 will output a high voltage U+. When the frequency is 144Hz, the duty cycle of the STV is large, and the Vref voltage generated after passing through the RC circuit is high. The inverting operational amplifier U1 will output a low voltage U+.

[0073] Furthermore, referring to Figure 7 , Figure 7 This is another circuit connection diagram of the driving circuit of the display panel in this application.

[0074] like Figure 7 As shown, in some feasible embodiments, the non-inverting operational amplifier module 40 includes:

[0075] The seventh resistor R7, the first terminal of which is connected to the common voltage Vcom;

[0076] The eighth resistor R8, the first end of which is connected to the output terminal of the inverting operational amplifier U1;

[0077] The first input terminal of the non-inverting operational amplifier U2 is connected to the second terminal of the eighth resistor R8 and the second terminal of the seventh resistor R7, and the second input terminal of the non-inverting operational amplifier U2 is connected to the output terminal of the non-inverting operational amplifier U2.

[0078] The ninth resistor R9 has its first end grounded and its second end connected to the second input terminal of the non-inverting operational amplifier U2.

[0079] In this embodiment, after the inverting operational amplifier module 30 outputs voltages U+ of STV signals with different duty cycles, these voltages are used as inputs to the non-inverting operational amplifier U2. By combining U+ and VCOM (the common voltage input to the common terminal of the driver module 50) through the non-inverting operational amplifier U2, a compensated common voltage Vcom_out is output. This Vcom_out is connected to the common terminal of the driver module 50 to provide a compensated common voltage, thus making Vcom_out different at different refresh rates. In other words, the final output voltage Vcom_out differs at different refresh rates (based on the different duty cycles of the respective STV signals). This reduces leakage current at high refresh rates (requiring less compensation at the common terminal voltage of the driver module 50) and increases leakage current at low refresh rates (requiring more compensation at the common terminal voltage of the driver module 50), thereby improving the pixel leakage problem in the V-blank area and reducing screen flicker.

[0080] Furthermore, referring to Figure 8 , Figure 8 This is a circuit connection diagram of the driving module in the driving circuit of the display panel of this application.

[0081] like Figure 8 As shown, in some feasible embodiments, the driving circuit of the display panel further includes:

[0082] The common voltage input terminal of the driving module 50 is connected to the output terminal of the non-inverting operational amplifier U2.

[0083] In one embodiment, the driving module 50 is connected to a data voltage Data and a gate driving voltage Gate, and the driving module 50 includes:

[0084] A first thin-film transistor M1, wherein the first terminal of the first thin-film transistor M1 is connected to the data voltage Data, and the third terminal of the first thin-film transistor M1 is connected to the gate drive voltage Gate.

[0085] A first liquid crystal capacitor Clc1, the second end of the first liquid crystal capacitor Clc1 is connected to the second end of the first thin film transistor M1, and the first end of the first liquid crystal capacitor Clc1 is connected to the third common terminal Vcom3.

[0086] A first storage capacitor Cst1, the second end of the first storage capacitor Cst1 is connected to the second end of the first thin film transistor M1, and the first end of the first storage capacitor Cst1 is connected to the fourth common terminal Vcom4.

[0087] The second thin-film transistor M2 has its first terminal connected to the data voltage Data and its third terminal connected to the gate drive voltage Gate.

[0088] The second liquid crystal capacitor Clc2 has its first terminal connected to the second terminal of the second thin film transistor M2, and its second terminal connected to the second common terminal Cfvcom.

[0089] The second storage capacitor Cst2 has its first terminal connected to the second terminal of the second thin film transistor M2, and the second terminal of the second storage capacitor Cst2 serves as the first common terminal Avcom.

[0090] The third thin-film transistor M3 has its first terminal connected to the second terminal of the second thin-film transistor M2, and its third terminal connected to the gate driving voltage Gate. The second terminal of the third thin-film transistor M3 serves as the sub-pixel common terminal Svcom.

[0091] In one embodiment, the driving module 50 is used to provide a pixel driving voltage based on the data voltage Data under the drive of the gate driving voltage Gate. That is, it charges the capacitor based on the data voltage Data under the drive of the gate driving voltage Gate, and then drives the display screen to display based on the charged capacitor (pixel driving voltage). There can be multiple voltage divider modules 10, conversion modules 20, inverting operational amplifier modules 30 and non-inverting operational amplifier modules 40 in the driving circuit of the display panel. They compensate the sub-pixel common terminal Svcom and the first common terminal Avcom based on the frame start signal STV, respectively. Since there is a difference between the sub-pixel common terminal Svcom and the first common terminal Avcom, they can be compensated separately, thereby reducing the voltage difference during refresh rate switching and improving the screen flicker problem. Alternatively, one method can be used to compensate for the voltage of the sub-pixel common terminal Svcom based on the frame start signal STV, or to compensate for the voltage of the first common terminal Avcom based on the frame start signal STV, or to compensate for the voltage of both the first common terminal Avcom and the sub-pixel common terminal Svcom simultaneously based on the frame start signal STV. Since there is a slight difference between the sub-pixel common terminal Svcom and the first common terminal Avcom, compensation can be performed simultaneously or only at one location, thereby reducing the voltage difference during refresh rate switching and improving the screen flicker problem.

[0092] In one embodiment, the first thin-film transistor M1, the first liquid crystal capacitor Clc1, and the first storage capacitor Cst1 form a normal display circuit, requiring no compensation (i.e., the TFT side display). The second thin-film transistor M2, the second liquid crystal capacitor Clc2, the second storage capacitor Cst2, and the third thin-film transistor M3 form a CF side display circuit. Due to refresh rate issues, flickering may occur, therefore voltage compensation is required for the common terminal of the driving module 50. Figure 8 As shown, the second liquid crystal capacitor Clc2 is used during normal display. Therefore, the common terminal Svcom of the subpixel and the first common terminal Avcom of the storage capacitor need to be used as the common terminal of the driving module 50 for compensation, thereby improving screen flicker. That is, the refresh rate is switched after compensation using the common terminal of the driving module 50 (i.e., the common terminal Svcom of the subpixel and the first common terminal Avcom of the storage capacitor, or the common terminal Svcom of the subpixel, or the first common terminal Avcom of the storage capacitor), thereby improving screen flicker during refresh rate switching.

[0093] It should be noted that the transistors used in all embodiments of this application can be TFTs (Thin Film Transistors), field-effect transistors, or other devices with similar characteristics. Since the second terminal and drain of the transistors used here are symmetrical, their source and drain terminals are interchangeable. In the embodiments of this application, to distinguish the two terminals of the transistor other than the gate, one terminal is called the source, and the other is called the drain. Figure 8 In the diagram, the G, D, and S markings of the first thin-film transistor M1 determine the characteristics of each port. G represents the third terminal of M1, S the second terminal, and D the first terminal. Alternatively, G can be the third terminal, S the first terminal, and D the second terminal. The characteristics of the remaining transistors can be determined based on... Figure 8 The configuration of the transistors is defined as follows: the middle terminal of each transistor is the gate, the signal input terminal is the source, and the signal output terminal is the drain. Furthermore, the transistors used in this application embodiment may include both P-type and N-type transistors. P-type transistors conduct when the gate is low and are cut off when the gate is high, while N-type transistors conduct when the gate is high and are cut off when the gate is low. The gate drive voltage conduction methods differ for N-type and P-type transistors, and the corresponding control methods also differ. The specific control depends on the actual transistor and is not limited here.

[0094] Furthermore, in some feasible embodiments, the first thin-film transistor M1 to the third thin-film transistor M3 can be a low-temperature polycrystalline silicon thin-film transistor, an oxide semiconductor thin-film transistor, or an amorphous silicon thin-film transistor. The transistors in the driving circuit provided in this application embodiment are all made of the same material, thereby avoiding the influence of differences between transistors of different materials on the driving circuit.

[0095] Furthermore, in some feasible embodiments, when the frame start signal STV is a frame start voltage for a high refresh rate, the inverting operational amplifier outputs a low voltage signal, and the non-inverting operational amplifier outputs a first compensation common voltage based on the low voltage signal.

[0096] Furthermore, when the frame start signal STV is a low refresh rate frame start voltage, the inverting operational amplifier outputs a high voltage signal, and the non-inverting operational amplifier outputs a second compensation common voltage based on the high voltage signal, wherein the second compensation common voltage is greater than the first compensation common voltage.

[0097] In this embodiment, when switching refresh rates, there is a difference in leakage current between the front and back, which causes flickering in the display. That is, there is more leakage current at the low refresh rate and less leakage current at the high refresh rate. As a result, when switching from a low refresh rate to a high refresh rate, there is a large voltage difference between the front and back, resulting in a large difference in display brightness and a flickering visual effect. Therefore, the driving circuit of the display panel of this application can achieve the following: when the frame start signal STV is a frame start voltage at a high refresh rate, the inverting output voltage of the inverting operational amplifier is a low voltage signal, and the non-inverting operational amplifier outputs a first compensation common voltage based on the low voltage signal. The low voltage signal refers to a voltage signal that is lower than the high voltage signal generated at a low refresh rate. At this time, the driving circuit of the display panel outputs a low voltage signal after voltage division and signal conversion through the circuit and then through the inverting operational amplifier. When the frame start signal STV is a frame start voltage at a low refresh rate, the inverting output voltage of the inverting operational amplifier is a high voltage signal, and the non-inverting operational amplifier outputs a second compensation common voltage based on the high voltage signal. The second compensation common voltage is greater than the first compensation common voltage. The high voltage signal refers to a voltage signal that is higher than the low voltage signal generated at a high refresh rate. At this time, the driving circuit of the display panel outputs a high voltage signal after voltage division and signal conversion through the circuit and then through the inverting operational amplifier. In other words, when switching refresh rates (from low refresh rate to high refresh rate or from high refresh rate to low refresh rate), the common terminal of the display panel's driving circuit outputs different voltage values ​​for compensation (at this time, the corresponding compensation voltage is obtained through the internal module of the display panel's driving circuit, and then targeted compensation is performed), which can improve the large voltage difference before and after, and reduce screen flicker when switching refresh rates.

[0098] Furthermore, this application also proposes a display panel, which includes at least a color filter substrate, a liquid crystal layer, and an array substrate. The liquid crystal layer is disposed between the array substrate and the color filter substrate, and the array substrate includes the driving circuit of the display panel. The display panel may also include the driving circuit of the display panel as described above, see reference... Figure 9 , Figure 9 This is a schematic diagram of the structure of the display panel involved in the embodiments of this application.

[0099] like Figure 9As shown, the display panel may include: a processor 1001, such as a central processing unit (CPU), a communication bus 1002, a user interface 1003, a network interface 1004, and a memory 1005. The communication bus 1002 is used to enable communication between these components. The user interface 1003 may include a display screen and an input unit such as a keyboard; optionally, the user interface 1003 may also include a standard wired interface or a wireless interface. The network interface 1004 may optionally include a standard wired interface or a wireless interface (such as a Wi-Fi interface). The memory 1005 may be a high-speed random access memory (RAM) or a stable non-volatile memory (NVM), such as a disk drive. The memory 1005 may also optionally be a storage device independent of the aforementioned processor 1001.

[0100] Those skilled in the art will understand that Figure 9 The structure shown does not constitute a limitation on the display panel and may include more or fewer components than shown, or combine certain components, or have different component arrangements.

[0101] like Figure 9 As shown, the memory 1005, which serves as a storage medium, may include an operating system, a data storage module, a network communication module, a user interface module, and computer programs.

[0102] exist Figure 9 In the display panel shown, the network interface 1004 is mainly used for data communication with other devices; the user interface 1003 is mainly used for data interaction with the user; the processor 1001 and the memory 1005 in this embodiment can be set in the display panel. The display panel calls the computer program stored in the memory 1005 through the processor 1001 and controls the driving circuit of the display panel.

[0103] The various embodiments of the display panel of this application can be referred to the various embodiments of the driving circuit of the display panel of this application, which will not be repeated here.

[0104] Furthermore, this application also proposes a display device, which includes a display panel as described above.

[0105] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or system. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or system that includes that element.

[0106] The sequence numbers of the embodiments in this application are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0107] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) as described above, and includes several instructions to cause a terminal device (which may be a mobile phone, computer, server, air conditioner, or network device, etc.) to execute the methods described in the various embodiments of this application.

[0108] The above are merely preferred embodiments of this application and do not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.

Claims

1. A driving circuit for a display panel, characterized in that, The driving circuit of the display panel includes: A voltage divider module is connected to a frame start signal, and the voltage divider module is used to obtain a voltage divider signal based on the frame start signal. A conversion module is connected to the voltage divider module, and the conversion module is used to convert the voltage divider signal to obtain a DC reference voltage. An inverting operational amplifier module is connected to the conversion module and is used to output an inverted output voltage based on the DC reference voltage. A non-inverting operational amplifier module is connected to the inverting operational amplifier module. The non-inverting operational amplifier module is also connected to a common voltage. The non-inverting operational amplifier module is used to output a compensation common voltage based on the inverting output voltage and the common voltage.

2. The driving circuit for the display panel as described in claim 1, characterized in that, The voltage divider module includes: A first resistor, the first end of which is connected to the frame start signal; The second resistor has its first end connected to the second end of the first resistor and the conversion module, and its second end is grounded.

3. The driving circuit for the display panel as described in claim 2, characterized in that, The conversion module includes: A diode, wherein the anode of the diode is connected to the first terminal of the second resistor; A third resistor, the first end of which is connected to the cathode of the diode; A fourth resistor, the first end of which is connected to the second end of the third resistor; A first capacitor, the first end of which is connected to the first end of the inverting operational amplifier module and the fourth resistor, and the second end of which is connected to the second end of the fourth resistor and then grounded.

4. The driving circuit for the display panel as described in claim 3, characterized in that, The inverting operational amplifier module includes: An inverting operational amplifier, wherein the first input terminal of the inverting operational amplifier is connected to the first terminal of the first capacitor, and the output terminal of the inverting operational amplifier is connected to the non-inverting operational amplifier module; The fifth resistor has its first end grounded and its second end connected to the second input terminal of the inverting operational amplifier. The sixth resistor has its first end connected to the second end of the fifth resistor, and its second end connected to the output terminal of the inverting operational amplifier.

5. The driving circuit for the display panel as described in claim 4, characterized in that, The in-phase operational amplifier module includes: The seventh resistor, the first end of which is connected to the common voltage; The eighth resistor, the first end of which is connected to the output terminal of the inverting operational amplifier; A non-inverting operational amplifier, wherein the first input terminal of the non-inverting operational amplifier is connected to the second terminal of the eighth resistor and the second terminal of the seventh resistor, and the second input terminal of the non-inverting operational amplifier is connected to the output terminal of the non-inverting operational amplifier; The ninth resistor has its first end grounded and its second end connected to the second input terminal of the non-inverting operational amplifier.

6. The driving circuit for the display panel as described in claim 5, characterized in that, The driving circuit of the display panel also includes: A driving module, wherein the common voltage input terminal of the driving module is connected to the output terminal of the non-inverting operational amplifier.

7. The driving circuit for the display panel as described in claim 6, characterized in that, When the frame start signal is a frame start voltage with a high refresh rate, the inverting operational amplifier outputs a low voltage signal, and the non-inverting operational amplifier outputs a first compensation common voltage based on the low voltage signal.

8. The driving circuit for the display panel as described in claim 7, characterized in that, When the frame start signal is a low refresh rate frame start voltage, the inverting operational amplifier outputs a high voltage signal, and the non-inverting operational amplifier outputs a second compensation common voltage based on the high voltage signal, wherein the second compensation common voltage is greater than the first compensation common voltage.

9. A display panel, characterized in that, The display panel includes a color filter substrate, a liquid crystal layer, and an array substrate. The liquid crystal layer is disposed between the array substrate and the color filter substrate. The array substrate includes a driving circuit for the display panel as described in any one of claims 1-8.

10. A display device, characterized in that, The display device includes the display panel as described in claim 9.

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