Industrial-grade single-pair Ethernet switch based on multi-port transceiver
By designing an industrial-grade single-pair Ethernet switch based on a multi-port transceiver, the problem of the lack of integrated switch chips in existing technologies is solved, realizing a compact, low-cost, and highly reliable industrial-grade Ethernet switch suitable for efficient deployment in industrial scenarios.
Patent Information
- Application Number
- CN202520677414.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-11
- Publication Date
- 2026-02-27
- Estimated Expiration
- 2035-04-11
AI Technical Summary
Existing technologies lack integrated single-pair Ethernet switch chips, making it difficult to meet the demands for compact structure, low-cost integration, and high reliability in industrial scenarios, especially given the different requirements for high bandwidth, low latency, and tolerance to complex environments in the automotive and industrial sectors.
Design an industrial-grade single-pair Ethernet switch based on a multi-port transceiver, including an Ethernet switch chip, a single-pair Ethernet interface module, and a standard Ethernet conversion module. The single-pair Ethernet interface module, composed of an SPE connector, a DC blocking capacitor, a signal isolation transformer, and a 10BASE-T1L PHY chip, is connected to the 10BASE-T PHY chip using a capacitive coupling network. It supports multi-channel cascading expansion and shares the RMII bus clock signal.
It achieves a compact, low-cost, and highly reliable industrial-grade single-pair Ethernet switch, improves electromagnetic interference resistance, supports long-distance transmission and multi-channel expansion, reduces material costs, and is suitable for complex network environments.
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Figure CN223957573U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model belongs to the industrial communication technical field, concretely relates to the industrial grade single pair Ethernet switch based on multiport transceiver. BACKGROUND
[0002] Single pair Ethernet (Single Pair Etherne, simply referred to as SPE) is an industrial communication mode that rises with the Internet of Things and intelligent factory at present, aims at providing reliable high-speed industrial Ethernet connection.
[0003] Single pair Ethernet is a new trend of industrial automation data transmission application, and SPE technology breaks through the limitation of high space occupation and high transmission cost of Ethernet transmission, and first realizes that Ethernet meets communication from a remote end to an application site in a way of less space occupation and lower cost.Single pair Ethernet switch is large in size, and it is difficult to meet the needs of compact deployment in industrial field.SPE only transmits Ethernet data through a pair of twisted copper wires, significantly reduces wiring complexity and cost, and meets the needs of compact equipment of industrial 4.0.
[0004] In actual use, single pair Ethernet switch (SPE switch) must be used to connect various SPE sensors and actuators.At present, there is no integrated single pair Ethernet switch chip, and single pair Ethernet switch is generally composed of Ethernet switch chip, PHY chip and the like.Due to different scenes, the requirements for single pair Ethernet switch are different, for example, when suitable for automobile industry, the emphasis is on high bandwidth, low latency and complex environment tolerance, etc.;when suitable for industrial scene, the emphasis is on compact structure, low cost integration, flexible expansion, high reliability, etc.Aiming at the needs of industrial scene, an industrial grade single pair Ethernet switch based on multiport transceiver is provided. SUMMARY
[0005] The utility model aims at: in view of the prior art's insufficient, provide a kind of compact structure, low cost integration and high reliability of industrial grade single pair Ethernet switch based on multiport transceiver.
[0006] The technical purpose of the utility model is realized by the following technical scheme:
[0007] The industrial single-pair Ethernet switch based on multi-port transceiver comprises an Ethernet switch chip, a single-pair line Ethernet interface module and a standard Ethernet conversion module; the single-pair line Ethernet interface module is composed of a SPE connector, a direct-current isolation capacitor, a signal isolation transformer and a 10BASE-T1L PHY chip connected in sequence; the standard Ethernet conversion module comprises a 10BASE-T PHY chip, and the 10BASE-T PHY chip is interconnected with the 10BASE-T1L PHY chip through an RMII bus; the Ethernet switch chip is connected with the 10BASE-T PHY chip through a capacitor coupling network; and the Ethernet switch chip is further connected with at least one RJ45 interface.
[0008] Preferably, the Ethernet switch chip is connected with a plurality of standard Ethernet conversion modules; correspondingly, the number of the single-pair line Ethernet interface modules is the same as that of the standard Ethernet conversion modules.
[0009] Preferably, the RJ45 interface is a transformer-equipped RJ45 interface.
[0010] Preferably, a clock signal of the RMII bus is provided by the 10BASE-T1L PHY chip or the 10BASE-T PHY chip, and both share the same clock source.
[0011] Preferably, the capacitor coupling network comprises at least four groups of capacitors.
[0012] Preferably, the direct-current isolation capacitor comprises at least two groups of capacitors.
[0013] Preferably, the Ethernet switch chip is of IP178G type. Compared with the prior art, the industrial single-pair Ethernet switch based on multi-port transceiver has the following beneficial effects:
[0014] 1. The utility model relates to an Ethernet switch chip, a single-pair Ethernet interface module and a standard Ethernet conversion module, the single-pair Ethernet interface module is sequentially connected by SPE connector, direct current capacitor, signal isolation transformer and 10BASE-T1L PHY chip, the standard Ethernet conversion module includes 10BASE-T PHY chip, and 10BASE-T PHY chip is interconnected with 10BASE-T1L PHY chip through RMII bus, realizes the protocol conversion of single-pair signal and standard Ethernet signal, the Ethernet switch chip is connected with 10BASE-T PHY chip through capacitor coupling network, supports multichannel cascade extension, and the Ethernet switch chip is further connected with at least one RJ45 interface, the utility model discloses through the modularization design support channel number dynamic adjustment, adapts to different scale industrial network, signal isolation transformer and capacitor coupling double isolation mechanism, promote the anti-electromagnetic interference ability, the utility model has the advantages of compact structure, low -cost integration and high reliability.
[0015] 2. The capacitor coupling network of the utility model contains at least four groups of capacitors, and the combination of multiple capacitors can significantly improve the performance and reliability of the switch, and the technical measure has the advantages of high reliability.
[0016] 3. The clock signal of the RMII bus of the utility model is provided by 10BASE-T1L PHY chip or 10BASE-T PHY chip, and both share the same clock source. The two kinds of PHY chips share the clock source, without the need for independent design of two sets of clock circuits, simplifying the circuit board layout and signal integrity management. Sharing the clock source can reduce the use of components such as crystal oscillator and clock driver, reducing material costs. Sharing the clock source can avoid the phase difference problem caused by multiple clock sources, ensuring the strict synchronization of RMII bus data transmission, reducing data transmission errors. Unified clock source reduces electromagnetic interference between different clock signals, improving the stability of the system in complex environments. Sharing the clock source facilitates protocol adaptation in mixed networking scenarios, such as supporting both new and old devices in industrial automation. In mixed rate networks (such as 10Mbps coexisting with higher rate devices), a unified clock source can reduce the complexity of dynamic clock switching. Sharing the clock source allows the PHY chip to cooperatively control the clock frequency, dynamically adjusting power consumption according to network load, suitable for low-power Internet of Things (IoT) devices. The technical measure reduces manufacturing costs, significantly improves the reliability, compatibility and energy efficiency of the switch, and is suitable for complex network scenarios such as industrial control
[0017] 4.The single-pair Ethernet interface module of the utility model is sequentially connected by SPE connector, direct-current capacitor, signal isolation transformer and 10BASE-T1L PHY chip. The volume of the SPE connector is only 20% of the traditional RJ45. The Ethernet transmission is realized through the single-pair twisted pair, which significantly reduces the volume, weight, wiring cost of the cable and reduces the installation space and complexity, and is suitable for space-limited scenes (such as industrial equipment, etc.). The anti-interference and signal stability are enhanced. The direct-current capacitor and the signal isolation transformer work together to filter out the direct-current interference and realize electrical isolation, avoid ground loop interference, and simplify the circuit design. The signal isolation transformer provides electrical isolation, protects against surges and electromagnetic interference, and ensures stable communication in harsh environments (such as industrial workshops, etc.). Long-distance transmission and power integration are supported. The 10BASE-T1L PHY chip supports a transmission distance of up to 1000 meters (IEEE 802.3cg standard) at a speed of 10Mbps, covering the long-distance communication needs of industrial field-level devices. High compatibility and expansibility; the 10BASE-T1L PHY chip is compatible with traditional Ethernet (such as 10BASE-T) and industrial Ethernet protocols, supports mixed network topology deployment, supports 1Gbps (IEEE 802.3bp) and future 10Gbps (IEEE 802.3ch) speed standards, and adapts to high-resolution sensor and video transmission needs. By adopting the technical measures, the structure is compact, the reliability is high, the long-distance transmission is good, and the efficient deployment of Ethernet in industrial automation and other scenes can be met. BRIEF DESCRIPTION OF DRAWINGS
[0018] Figure 1 is a hardware block diagram of the utility model based on the multi-port transceiver industrial single-pair Ethernet switch;
[0019] Reference signs: 101 - Ethernet switch chip;
[0020] 11 - first PE connector; 12 - first direct-current capacitor; 13 - first signal isolation transformer; 14 - first 10BASE-T1L PHY chip; 15 - first 10BASE-T PHY chip; 16 - first RMII bus; 17 - first capacitor coupling network;
[0021] 21 - second PE connector; 22 - second direct-current capacitor; 23 - second signal isolation transformer; 24 - second 10BASE-T1L PHY chip; 25 - second 10BASE-T PHY chip; 26 - second RMII bus; 27 - second capacitor coupling network;
[0022] 31 - third PE connector; 32 - third DC blocking capacitor; 33 - third signal isolation transformer; 34 - third 10BASE-T1L PHY chip; 35 - third 10BASE-T PHY chip; 36 - third RMII bus; 37 - third capacitive coupling network;
[0023] 41 - fourth PE connector; 42 - fourth DC blocking capacitor; 43 - fourth signal isolation transformer; 44 - fourth 10BASE-T1L PHY chip; 45 - fourth 10BASE-T PHY chip; 46 - fourth RMII bus; 47 - fourth capacitive coupling network;
[0024] 51 - fifth PE connector; 52 - fifth DC blocking capacitor; 53 - fifth signal isolation transformer; 54 - fifth 10BASE-T1L PHY chip; 55 - fifth 10BASE-T PHY chip; 56 - fifth RMII bus; 57 - fifth capacitive coupling network;
[0025] 6 - RJ45 interface with transformer. DETAILED DESCRIPTION
[0026] So that the objects, technical solutions and advantages of the embodiments of the present application are more apparent, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some embodiments of the present application, rather than all the embodiments of the present application. The components of the embodiments of the present application described and shown in the drawings herein can be arranged and designed in various different configurations.
[0027] Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the claimed present application, but only represents selected embodiments of the present application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present application without creative labor are within the scope of protection of the present application.
[0028] It should be noted that: similar reference numerals and letters represent similar items in the following drawings, therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings. In addition, the terms "first", "second", etc. are only used to distinguish description, and cannot be understood as indicating or implying relative importance.
[0029] As Figure 1As shown, the multi-port transceiver-based industrial single-pair Ethernet switch includes an Ethernet switch chip 101, a single-pair line Ethernet interface module, and a standard Ethernet conversion module; the single-pair line Ethernet interface module is composed of a SPE connector, a direct-current blocking capacitor, a signal isolation transformer, and a 10BASE-T1L PHY chip connected in sequence; the standard Ethernet conversion module includes a 10BASE-T PHY chip, and the 10BASE-T PHY chip is interconnected with the 10BASE-T1L PHY chip through an RMII bus; protocol conversion between single-pair line signals and standard Ethernet signals is realized; the Ethernet switch chip 101 is connected with the 10BASE-T PHY chip through a capacitor coupling network, supports multi-channel cascading extension, and is further connected with at least one RJ45 interface. In actual use, the Ethernet switch chip 101 can adopt a standard Ethernet switch chip with multiple interfaces, use the standard Ethernet switch chip to realize the SPE function, and avoid high R&D costs of customized chips. In specific implementation, the Ethernet switch chip 101 can adopt an Ethernet switch chip with a model number of IP178G. Through modular design, the number of channels can be dynamically adjusted to adapt to industrial networks of different scales. The signal isolation transformer and the capacitor coupling double isolation mechanism improve the anti-electromagnetic interference capability. With this technical measure, the device has the advantages of compact structure, low-cost integration, and high reliability.
[0030] As shown in Figure 1 The Ethernet switch chip 101 is connected with multiple standard Ethernet conversion modules; correspondingly, the number of single-pair line Ethernet interface modules is the same as that of standard Ethernet conversion modules. In specific implementation, according to the number of interfaces of the Ethernet switch chip 101 and actual requirements, multiple channels can be provided; several channels are composed of single-pair line Ethernet interface modules and standard Ethernet conversion modules. Taking a first channel as an example, the Ethernet switch chip 101 is connected with a first 10BASE-T PHY chip 15 of a first standard Ethernet conversion module through a first capacitor coupling network 17; a first SPE connector 11, a first direct-current blocking capacitor 12, a first signal isolation transformer 13, and a first 10BASE-T1L PHY chip 14 of a first single-pair line Ethernet interface module are connected in sequence; the first 10BASE-T PHY chip 15 of the first standard Ethernet conversion module and the first 10BASE-T1L PHY chip 14 of the first single-pair line Ethernet interface module are connected through a first RMII bus 16.
[0031] As shown in Figure 1As shown, the Ethernet switch chip 101 is connected with five standard Ethernet conversion modules, and correspondingly, the number of single-pair Ethernet interface modules is five. In this embodiment, the Ethernet switch chip 101 is connected with a first standard Ethernet conversion module, a second standard Ethernet conversion module, a third standard Ethernet conversion module, a fourth standard Ethernet conversion module and a fifth standard Ethernet conversion module.
[0032] In this embodiment, the Ethernet switch chip 101 is connected with the first 10BASE-T PHY chip 15, the second 10BASE-T PHY chip 25, the third 10BASE-T PHY chip 35, the fourth 10BASE-T PHY chip 45 and the fifth 10BASE-T PHY chip 55 of the first standard Ethernet conversion module, the second standard Ethernet conversion module, the third standard Ethernet conversion module, the fourth standard Ethernet conversion module and the fifth standard Ethernet conversion module respectively through the first capacitive coupling network 17, the second capacitive coupling network 27, the third capacitive coupling network 37, the fourth capacitive coupling network 47 and the fifth capacitive coupling network 57. Correspondingly, the single-pair Ethernet interface module includes a first single-pair Ethernet interface module, a second single-pair Ethernet interface module, a third single-pair Ethernet interface module, a fourth single-pair Ethernet interface module and a fifth single-pair Ethernet interface module connected with the first standard Ethernet conversion module, the second standard Ethernet conversion module, the third standard Ethernet conversion module, the fourth standard Ethernet conversion module and the fifth standard Ethernet conversion module respectively.
[0033] The capacitive coupling network contains at least four groups of capacitors. As shown, Figure 1 As shown, the first capacitive coupling network 17, the second capacitive coupling network 27, the third capacitive coupling network 37, the fourth capacitive coupling network 47 and the fifth capacitive coupling network 57 respectively include four groups of capacitors. Among them, the first capacitive coupling network 17 includes coupling capacitors C1-3, C1-4, C1-5 and C1-6. The second capacitive coupling network 27 includes coupling capacitors C2-3, C2-4, C2-5 and C2-6. The third capacitive coupling network 37 includes coupling capacitors C3-3, C3-4, C3-5 and C3-6. The fourth capacitive coupling network 47 includes coupling capacitors C4-3, C4-4, C4-5 and C4-6. The fifth capacitive coupling network 57 includes coupling capacitors C5-3, C5-4, C5-5 and C5-6. The combination of multiple groups of capacitors can significantly improve the performance and reliability of the switch. By adopting this technical measure, the advantage of high reliability is achieved.
[0034] As shown, Figure 1As shown, the clock signal of the RMII bus is provided by the 10BASE-T1L PHY chip or the 10BASE-T PHY chip, and both share the same clock source. In specific implementation, the first 10BASE-T PHY chip 15, the second 10BASE-T PHY chip 25, the third 10BASE-T PHY chip 35, the fourth 10BASE-T PHY chip 45, and the fifth 10BASE-T PHY chip 55 of the first standard Ethernet conversion module, the second standard Ethernet conversion module, the third standard Ethernet conversion module, the fourth standard Ethernet conversion module, and the fifth standard Ethernet conversion module are respectively connected with the first 10BASE-T1L PHY chip 14, the second 10BASE-T1L PHY chip 24, the third 10BASE-T1L PHY chip 34, the fourth 10BASE-T1L PHY chip 44, and the fifth 10BASE-T1L PHY chip 54 of the first single-pair Ethernet interface module, the second single-pair Ethernet interface module, the third single-pair Ethernet interface module, the fourth single-pair Ethernet interface module, and the fifth single-pair Ethernet interface module through the first RMII bus 16, the second RMII bus 26, the third RMII bus 36, the fourth RMII bus 46, and the fifth RMII bus 56. Both types of PHY chips share the same clock source, without the need to independently design two sets of clock circuits, simplifying the circuit board layout and signal integrity management. Sharing the clock source can reduce the use of elements such as crystal oscillators and clock drivers, reducing material costs. Sharing the clock source can avoid phase difference problems caused by multiple clock sources, ensuring strict synchronization of data transmission on the RMII bus, reducing data transmission errors. Unified clock source reduces electromagnetic interference between different clock signals, improving system stability in complex environments. Sharing the clock source facilitates protocol adaptation in hybrid networking scenarios, such as supporting both new and old devices in industrial automation. In a mixed-rate network (such as 10Mbps coexisting with higher-rate devices), a unified clock source can reduce the complexity of dynamic clock switching. Sharing the clock source allows the PHY chip to cooperatively control the clock frequency, dynamically adjusting power consumption according to network load, suitable for low-power Internet of Things (IoT) devices 58. With this technical measure, manufacturing costs are reduced, and the reliability, compatibility, and energy efficiency of the switch are significantly improved, suitable for complex network scenarios such as industrial control.
[0035] In this embodiment, the 10BASE-T1L PHY chip and the 10BASE-T PHY chip are connected through the RMII bus. One of them is described in detail below.
[0036] Specifically, taking the first 10BASE-T1L PHY chip 14, the first RMII bus 16, and the first 10BASE-T PHY chip 15 as an example;
[0037] The first 10BASE-T1L PHY chip 14 and the first 10BASE-T PHY chip 15 share the same clock source; the clock signal of the first RMII bus 16 is provided by the first 10BASE-T1L PHY chip 14 or the second 10BASE-T PHY chip 15.
[0038] The RX_DV signal of the first 10BASE-T1L PHY chip 14 is connected to the TX_EN signal of the first 10BASE-T PHY chip 15; the RX_D1 signal of the first 10BASE-T1L PHY chip 14 is connected to the TX_D1 signal of the first 10BASE-T PHY chip 15; the RX_D0 signal of the first 10BASE-T1L PHY chip 14 is connected to the TX_D0 signal of the first 10BASE-T PHY chip 15; the TX_EN signal of the first 10BASE-T1L PHY chip 14 is connected to the RX_DV signal of the first 10BASE-T PHY chip 15; the TX_D0 signal of the first 10BASE-T1L PHY chip 14 is connected to the RX_D0 signal of the first 10BASE-T PHY chip 15; and the TX_D1 signal of the first 10BASE-T1L PHY chip 14 is connected to the RX_D1 signal of the first 10BASE-T PHY chip 15. With this technical measure, the intermediate processing-free forwarding of data is realized, the delay of traditional relay or protocol conversion is reduced, and the real-time performance is significantly improved.
[0039] As shown in Figure 1 The single-pair Ethernet interface module is composed of a SPE connector, a direct-current isolation capacitor, a signal isolation transformer and a 10BASE-T1L PHY chip connected in sequence. In specific implementation, the first single-pair Ethernet interface module is composed of a first PE connector 11, a first direct-current isolation capacitor 12, a first signal isolation transformer 13 and a first 10BASE-T1L PHY chip 14 connected in sequence. The second single-pair Ethernet interface module is composed of a second PE connector 21, a second direct-current isolation capacitor 22, a second signal isolation transformer 23 and a second 10BASE-T1L PHY chip 24 connected in sequence. The third single-pair Ethernet interface module is composed of a third PE connector 31, a third direct-current isolation capacitor 32, a third signal isolation transformer 33 and a third 10BASE-T1L PHY chip 34 connected in sequence. The fourth single-pair Ethernet interface module is composed of a fourth PE connector 41, a fourth direct-current isolation capacitor 42, a fourth signal isolation transformer 43 and a fourth 10BASE-T1L PHY chip 44 connected in sequence. The fifth single-pair Ethernet interface module is composed of a fifth PE connector 51, a fifth direct-current isolation capacitor 52, a fifth signal isolation transformer 53 and a fifth 10BASE-T1L PHY chip 54 connected in sequence.
[0040] The SPE connector has a volume of only 20% of the traditional RJ45, realizes Ethernet transmission through a single twisted pair, significantly reduces the cable volume, weight, wiring cost, and reduces the installation space and complexity, and is suitable for space-limited scenes (such as industrial equipment, etc.). The anti-interference and signal stability are enhanced; the direct-current capacitor and the signal isolation transformer work together to filter out direct-current interference and realize electrical isolation, avoid ground loop interference, and simplify circuit design. The signal isolation transformer provides electrical isolation, protects against surges and electromagnetic interference, and ensures stable communication in harsh environments (such as industrial workshops, etc.). Support long-distance transmission and power integration, 10BASE-T1L PHY chip supports transmission distance up to 1000 meters at 10Mbps rate (IEEE 802.3cg standard), covering the long-distance communication needs of industrial field-level devices. High compatibility and expansibility; 10BASE-T1L PHY chip is compatible with traditional Ethernet (such as 10BASE-T) and industrial Ethernet protocol, supports mixed network topology deployment; supports 1Gbps (IEEE 802.3bp) and future 10Gbps (IEEE 802.3ch) rate standards, and adapts to high-resolution sensor and video transmission needs. With this technical measure, it has the advantages of compact structure, high reliability, long-distance transmission, etc., and can meet the efficient deployment of Ethernet in industrial automation and other scenarios.
[0041] The direct-current capacitor includes at least two groups of capacitors. In the embodiment, the first direct-current capacitor 12 includes the capacitor C1-1 and the capacitor C1-2; the second direct-current capacitor 22 includes the capacitor C2-1 and the capacitor C2-2; the third direct-current capacitor 32 includes the capacitor C3-1 and the capacitor C3-2; the fourth direct-current capacitor 42 includes the capacitor C4-1 and the capacitor C4-2; and the fifth direct-current capacitor 52 includes the capacitor C5-1 and the capacitor C5-2. The multi-group configuration of the direct-current capacitor significantly improves the reliability, anti-interference ability and adaptability of the switch through mechanisms such as redundancy fault tolerance, frequency band coverage, power dispersion and temperature compensation.
[0042] The Ethernet switch chip 101 is also connected with at least one RJ45 interface. As shown in Figure 1 In specific implementation, the Ethernet switch chip 101 is also connected with one or more RJ45 interfaces. Through the RJ45 interface, an upper-layer Ethernet network can be connected. The RJ45 interface adopts an RJ45 interface 6 with a transformer, which is integratedly designed to eliminate external transformer welding and wiring, reduces the risk of poor contact or virtual welding, and has the advantage of high reliability. The integrated scheme reduces the PCB area occupied, and has the advantage of compact structure.
[0043] The technical solutions provided by the embodiments of the present application are described in detail above, and the principles and implementation manners of the embodiments of the present application are described by applying specific examples; the above description of the embodiments is only applicable to helping understand the principles of the embodiments of the present application; meanwhile, for the general technical personnel in the art, the embodiments of the present application will have changes in the specific implementation manners and application ranges, and the above description should not be understood as the limitation of the embodiments of the present application.
Claims
1. An industrial-grade single-pair Ethernet switch based on a multi-port transceiver, characterized in that, This includes Ethernet switch chips, single-pair Ethernet interface modules, and standard Ethernet conversion modules; The single-pair Ethernet interface module is composed of an SPE connector, a DC blocking capacitor, a signal isolation transformer, and a 10BASE-T1LPHY chip connected in sequence. The standard Ethernet conversion module includes a 10BASE-T PHY chip, which is interconnected with the 10BASE-T1L PHY chip via an RMII bus. The Ethernet switch chip is connected to the 10BASE-T PHY chip via a capacitive coupling network. The Ethernet switch chip is also connected to at least one RJ45 interface.
2. The industrial-grade single-pair Ethernet switch based on a multi-port transceiver according to claim 1, characterized in that, The Ethernet switch chip is connected to multiple standard Ethernet conversion modules; correspondingly, the number of single-pair Ethernet interface modules is the same as the number of standard Ethernet conversion modules.
3. The industrial-grade single-pair Ethernet switch based on a multi-port transceiver according to claim 1, characterized in that, The RJ45 interface is an RJ45 interface with a transformer.
4. The industrial-grade single-pair Ethernet switch based on a multi-port transceiver according to claim 1, characterized in that, The clock signal for the RMII bus is provided by either the 10BASE-T1L PHY chip or the 10BASE-T PHY chip, and both share the same clock source.
5. The industrial-grade single-pair Ethernet switch based on a multi-port transceiver according to claim 1, characterized in that, The capacitive coupling network contains at least four sets of capacitors.
6. The industrial-grade single-pair Ethernet switch based on a multi-port transceiver according to claim 1, characterized in that, The DC blocking capacitor comprises at least two sets of capacitors.
7. The industrial-grade single-pair Ethernet switch based on a multi-port transceiver according to claim 1, characterized in that, The Ethernet switch chip is model IP178G.