LED driving circuit and LED driving power supply

Abstract

The utility model provides an LED driving circuit and an LED driving power supply, the LED driving circuit comprises a comparison module, a logic module and an NMOS tube, the source end of the NMOS tube is used for being connected with the negative electrode of an energy storage capacitor, and the drain end of the NMOS tube is used for being connected with VIN; when the NMOS tube is conducted, the energy storage capacitor discharges to supply power to the LED; and when the NMOS tube is turned off, the VIN charges the energy storage capacitor through the NMOS tube. Charging and discharging of the energy storage capacitor are controlled by controlling on-off of the NMOS tube, stroboflash of the LED can be eliminated, and the power factor PF is high.

Description

Technical Field

[0001] This application relates to the field of LED lighting technology, and in particular to an LED driver circuit and an LED driver power supply. Background Technology

[0002] A light-emitting diode (LED) is a commonly used light-emitting device that emits light by releasing energy through the recombination of electrons and holes. It is widely used in lighting and other fields. LED current is susceptible to fluctuations in power supply, temperature changes, and variations in device parameters, leading to inconsistent brightness, accelerated light decay, and even damage. Therefore, constant current driving technology is now widely used to achieve precise control of LED current, in order to solve the problems of LED brightness stability and lifespan.

[0003] The current market demand is for LED driver solutions that are flicker-free and have a high power factor (PF). However, existing LED driver solutions either achieve flicker-free operation but have a low PF, or achieve a high PF but are prone to flickering. Therefore, providing a flicker-free LED driver solution with a high PF has become an urgent problem to be solved. Utility Model Content

[0004] The main objective of this application is to provide an LED driver circuit and an LED driver power supply that can eliminate LED flicker and have a high power factor (PF).

[0005] In a first aspect, this application provides an LED driving circuit for driving the charging and discharging of an energy storage capacitor connected between a rectified output voltage VIN and an LED, the driving circuit comprising:

[0006] The comparison module compares a first voltage that characterizes VIN based on a first reference voltage and a second reference voltage, and outputs a first logic signal;

[0007] The logic module is connected to the comparison module and outputs a second logic signal based on the first logic signal;

[0008] The NMOS transistor is turned on and off based on the second logic signal. The source terminal of the NMOS transistor is used to connect to the negative terminal of the energy storage capacitor, and the drain terminal of the NMOS transistor is used to connect to VIN.

[0009] When the NMOS transistor is turned on, the energy storage capacitor discharges to power the LED; when the NMOS transistor is turned off, VIN charges the energy storage capacitor through the NMOS transistor.

[0010] In one embodiment, the comparison module includes:

[0011] The first comparison unit has a first input terminal for connecting to the first voltage, a second input terminal for connecting to the first reference voltage, and an output terminal for outputting a first comparison signal.

[0012] The second comparison unit has a first input terminal for connecting to the first voltage, a second input terminal for connecting to the second reference voltage, and an output terminal for outputting a second comparison signal.

[0013] Wherein, the second reference voltage is less than the first reference voltage; the first logic signal is a combination of the first comparison signal and the second comparison signal.

[0014] In one embodiment, the first input terminal is a non-inverting input terminal, and the second input terminal is an inverting input terminal.

[0015] In one embodiment, the comparison module further includes:

[0016] The first delay unit is connected between the output of the first comparison unit and the logic module;

[0017] The second delay unit is connected between the output of the second comparison unit and the logic module.

[0018] In one embodiment, the logic module includes:

[0019] An inverter, connected to the first comparison unit, is used to invert the level of the first comparison signal;

[0020] The SR latch has its set terminal connected to the output terminal of the inverter, its reset terminal connected to the output terminal of the second comparison unit, and its output terminal used to output the second logic signal.

[0021] In one embodiment, the logic module is directly connected to the gate terminal of the NMOS transistor, or

[0022] The logic module is connected to the gate terminal of the NMOS transistor via the driver module.

[0023] In one embodiment, the first voltage is VIN or a voltage divider of VIN.

[0024] In one embodiment, the comparison module and the logic module are integrated within the chip, and the NMOS transistor is integrated within the chip or externally located on the chip.

[0025] Secondly, embodiments of this application also provide an LED driver power supply, including a rectifier bridge, an energy storage capacitor, a sampling circuit, a constant current module, and an LED driver circuit as described in embodiments of this application;

[0026] The rectifier bridge is used to rectify the alternating current to obtain the rectified output voltage VIN.

[0027] The positive terminal of the energy storage capacitor is used to connect VIN and the constant current module, and the negative terminal of the energy storage capacitor is used to connect to the source terminal of the NMOS transistor in the LED driving circuit and grounded.

[0028] The sampling circuit is used to sample VIN to obtain a first voltage;

[0029] The constant current module is connected to the LED and is used to adjust the current output to the LED to a constant current.

[0030] In one embodiment, the LED driver power supply further includes:

[0031] A CBB capacitor is connected between the rectifier bridge and the constant current module.

[0032] This application provides an LED driver circuit and an LED driver power supply. The LED driver circuit is used to drive the charging and discharging of an energy storage capacitor connected between the rectified output voltage VIN and the LED. The LED driver circuit includes a comparator module, a logic module, and an NMOS transistor. The source terminal of the NMOS transistor is connected to the negative terminal of the energy storage capacitor, and the drain terminal of the NMOS transistor is connected to VIN. When the NMOS transistor is on, the energy storage capacitor discharges to power the LED; when the NMOS transistor is off, VIN charges the energy storage capacitor through the NMOS transistor. By controlling the on / off state of the NMOS transistor, the charging and discharging of the energy storage capacitor can be controlled, maintaining the power supply to the LED and ensuring flicker-free operation. Simultaneously, it widens the input current waveform of the LED and reduces its peak value, thereby increasing the active power of the LED and effectively improving the power factor (PF). Attached Figure Description

[0033] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0034] Figure 1 A circuit diagram illustrating one embodiment of the LED driving circuit provided in this application.

[0035] Figure 2 This is a waveform diagram of multiple electrical signals provided in the embodiments of this application;

[0036] Figure 3 A schematic diagram of the waveform of the charging current pulse of the energy storage capacitor provided in the embodiments of this application;

[0037] Figure 4 A circuit diagram illustrating another embodiment of the LED driving circuit provided in this application.

[0038] Figure 5 A circuit diagram illustrating one embodiment of the comparison module provided in this application;

[0039] Figure 6 A circuit diagram illustrating one embodiment of the comparison module and voltage divider resistor provided in this application.

[0040] Figure 7 A circuit diagram of another embodiment of the comparison module provided in this application;

[0041] Figure 8 A circuit diagram illustrating one embodiment of the logic module provided in this application.

[0042] Figure 9 A circuit diagram illustrating yet another embodiment of the LED driving circuit provided in this application.

[0043] Figure 10 A circuit diagram of one embodiment of the LED driver power supply provided in this application;

[0044] Figure 11 A circuit diagram of another embodiment of the LED driver power supply provided in this application.

[0045] The realization of the purpose, functional features and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0046] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0047] Typically, in linear LED constant current drive circuits, a large-capacity capacitor is added after the rectifier bridge for filtering to eliminate LED flicker. Both the rectifier bridge and the large-capacity capacitor are non-linear components. The presence of the large-capacity capacitor results in a very narrow conduction angle for the rectifier diodes, causing them to conduct only near the peak value of the AC input voltage. This leads to severe distortion of the AC input current, resulting in spike pulses. Consequently, the active power output after filtering is significantly reduced, causing a substantial decrease in the power factor (PF).

[0048] The current market demand is for LED constant current drivers with a power factor (PF) > 0.7 and no flicker. Currently, the low PF constant current driver solution with an electrolytic capacitor connected after the bridge rectifier can achieve flicker-free operation but the PF is approximately 0.5. The high PF solution can achieve a PF > 0.9 but has flicker, requiring a filter circuit after the bridge rectifier, which is more complex and has a higher cost.

[0049] To address the aforementioned issues, this application provides an LED driving circuit and an LED driving power supply that can eliminate LED flicker and achieve a high power factor (PF), while also having a low circuit cost.

[0050] The following detailed description of some embodiments of this application is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0051] Please refer to Figure 1 , Figure 1 A circuit diagram of one embodiment of the LED driving circuit provided in this application.

[0052] It should be noted that the LED driver circuit 100 is used to drive the charging and discharging of the energy storage capacitor connected between the rectified output voltage VIN and the LED. In the field of power electronics, the conversion of alternating current to direct current is called AC / DC conversion. The power flow in this conversion is from the power source to the load, which is also called rectification. That is to say, the rectified output voltage VIN can be the output voltage after rectification. The LED, as the load, can be one or more, and multiple LEDs can be connected in series or parallel according to actual needs. In the embodiments of this application, one or more LEDs can be used as a lighting source, and the LED driver circuit 100 can be applied to lighting devices equipped with one or more LEDs.

[0053] like Figure 1 As shown, the LED driver circuit 100 includes a comparator module 110, a logic module 120, and an NMOS transistor 130. The comparator module 110 compares a first voltage V1, which characterizes the rectified output voltage VIN, with a first reference voltage and a second reference voltage, and outputs a first logic signal. The logic module 120 is connected to the comparator module 110 and outputs a second logic signal based on the first logic signal. The NMOS transistor 130 is turned on and off based on the second logic signal. The source terminal (S terminal) of the NMOS transistor 130 is connected to the negative terminal of the energy storage capacitor, and the drain terminal (D terminal) of the NMOS transistor 130 is connected to the rectified output voltage VIN. Specifically, the drain terminal (D terminal) of the NMOS transistor 130 is connected to the negative terminal of the rectifier bridge, and the positive terminal of the energy storage capacitor is connected to the positive terminal of the rectifier bridge. When the NMOS transistor 130 is on, the energy storage capacitor discharges to power the LED. When the NMOS transistor 130 is off, the rectified output voltage VIN charges the energy storage capacitor through the NMOS transistor 130.

[0054] It should be noted that the first voltage V1 is the rectified output voltage VIN or a voltage divider of the rectified output voltage VIN. For example, the first voltage V1 can be obtained by dividing VIN through a voltage divider resistor. There can be one or more energy storage capacitors, such as, but not limited to, one or more electrolytic capacitors. The negative terminal of the energy storage capacitor can be connected to the source terminal of the NMOS transistor and grounded. The NMOS transistor 130 is used as a switch in the LED driver circuit 100, not for control, resulting in a simpler overall circuit structure and improved charging and discharging efficiency of the energy storage capacitor.

[0055] In this embodiment, the charging and discharging of the energy storage capacitor is controlled by controlling the switching on and off of the NMOS transistor 130. When the LED's power supply voltage is sufficient, the rectified output voltage VIN charges the energy storage capacitor through the NMOS transistor 130. When the LED's power supply voltage is insufficient, the energy storage capacitor can discharge to maintain the LED's power supply voltage, thus ensuring flicker-free operation. Simultaneously, there is no need to include a large-capacity capacitor in the LED driver circuit 100, allowing for an earlier conduction angle of the rectifier diode. This widens the input current waveform of the LED, reduces its peak value, and increases the active power of the LED current, thereby effectively improving the power factor (PF).

[0056] For example, such as Figure 2 As shown, waveform 21 represents mains power or alternating current. Waveform 22 is the rectified output voltage, i.e., the rectified output voltage VIN. Waveform 23 represents the rectified output current. Waveform 24 is used to characterize the control level signal received at the gate of the NMOS transistor, such as the second logic signal sent by logic module 120. Waveform 25 is used to characterize the current passing through the energy storage capacitor and can be equivalent to waveform 23.

[0057] See Figure 2 As can be seen, when VIN (waveform 22) is at its rising edge, it not only supplies power to the LED but also charges the energy storage capacitor (corresponding to the charging segment of waveform 25). When VIN (waveform 22) drops, because the energy storage capacitor voltage has already reached its peak value (i.e., the capacitor voltage is greater than VIN at this time), and NMOS transistor 130 is in the off state, the energy storage capacitor neither charges nor discharges. At this time, VIN supplies power to the LED, and the rectified output current is a constant value. VIN (waveform 22) continues to drop until VIN is lower than the LED's set voltage. At this point, NMOS transistor 130 closes and conducts, and the energy storage capacitor discharges the charge it holds (corresponding to the discharging segment of waveform 24), maintaining the LED's supply voltage.

[0058] In other words, when the VIN voltage is lower than the LED's set voltage, flicker-free operation of the LED cannot be guaranteed. This embodiment controls the NMOS transistor 130 to close and conduct, thereby controlling the discharge of the charge stored in the energy storage capacitor. This discharge forms a closed-loop circuit through the LED and the NMOS transistor 130. In this case, the energy storage capacitor acts as a power supply, thus maintaining the LED's supply voltage higher than its set voltage, ensuring flicker-free operation.

[0059] For example, such as Figure 3 As shown, waveform 31 represents a sinusoidal alternating current waveform. Waveform 32 represents a charging current pulse of an energy storage capacitor in related technologies. Waveform 33 represents a charging current pulse of an energy storage capacitor in an embodiment of this application. See also Figure 3 It can be seen that the conduction angle in waveform 32 is approximately 80°-90°, and the conduction angle in waveform 33 is approximately 60°-70°.

[0060] In other words, the LED driving circuit 100 provided in this application embodiment controls the charging and discharging of the energy storage capacitor by controlling the on and off of the NMOS transistor 130, which can advance the conduction angle to 60°-70°, making the input current waveform of the LED wider and the peak value smaller, and improving the active power of the LED. Therefore, it can effectively improve the power factor PF and achieve PF>0.7.

[0061] As is known in the art, the NMOS transistor 130 has a body diode, also known as a parasitic diode, which is formed by its substrate and drain. Figure 4 This is a schematic diagram of the body diode D1 of the NMOS transistor 130. In this embodiment, the energy storage capacitor is charged by the body diode D1 of the NMOS transistor 130. For example, since the positive terminal of the energy storage capacitor is connected to the positive terminal of the rectifier bridge, and the negative terminal of the energy storage capacitor is connected to the source of the NMOS transistor 130, when the NMOS transistor 130 is turned off, the negative terminal of the energy storage capacitor is connected to the positive terminal of the body diode D1, forming a path for VIN to charge the energy storage capacitor. This allows the rectified output voltage VIN to charge the energy storage capacitor via the body diode D1 of the NMOS transistor 130.

[0062] In one embodiment, such as Figure 5As shown, the comparison module 110 includes a first comparison unit 111 and a second comparison unit 112. The first input terminal of the first comparison unit 111 is used to connect to a first voltage V1, the second input terminal of the first comparison unit 111 is used to connect to a first reference voltage VR1, and the output terminal of the first comparison unit 111 is used to output a first comparison signal. The first input terminal of the second comparison unit 112 is used to connect to the first voltage V1, the second input terminal of the second comparison unit 112 is used to connect to a second reference voltage VR2, and the output terminal of the second comparison unit 112 is used to output a second comparison signal. The second reference voltage VR2 is less than the first reference voltage VR1; the first logic signal is a combination of the first comparison signal and the second comparison signal.

[0063] It should be noted that the first input terminal of the first comparison unit 111 and the first input terminal of the second comparison unit 112 can be non-inverting input terminals, and the second input terminals of the first comparison unit 111 and the second comparison unit 112 can be inverting input terminals. The first comparison unit 111 can compare the first reference voltage VR1 with the first voltage V1 and output a first comparison signal based on the comparison result. The second comparison unit 112 can compare the second reference voltage VR2 with the first voltage V1 and output a second comparison signal based on the comparison result.

[0064] Therefore, the first comparison signal and the second comparison signal are combined to obtain the first logic signal. Based on the first logic signal, the comparison result between the first reference voltage VR1, the second reference voltage VR2 and the first voltage V1 can be clearly known, which facilitates the subsequent logic module 120 to base its logic on this signal.

[0065] For example, the first comparison unit 111 outputs a first comparison signal as a first level signal when the first voltage V1 is greater than the first reference voltage VR1, and outputs a first comparison signal as a second level signal when the first voltage V1 is less than or equal to the first reference voltage VR2. The second comparison unit 112 outputs a second comparison signal as a third level signal when the first voltage V1 is less than the second reference voltage VR2, and outputs a second comparison signal as a fourth level signal when the first voltage V1 is greater than or equal to the second reference voltage VR2. The first logic signal includes a combination of the first level signal and the fourth level signal, a combination of the second level signal and the third level signal, or a combination of the second level signal and the fourth level signal.

[0066] For example, such as Figure 6As shown, the first comparison unit 111 includes at least a first comparator, and the second comparison unit 112 includes at least a second comparator. The first input terminal of the first comparator and the first input terminal of the first comparator may be the in-phase input terminals, and the second input terminal of the first comparator and the second input terminal of the first comparator may be the anti-phase input terminals. The first logic signal has three combination modes, corresponding to V1>VR1>VR2, V1<VR2<VR1, and VR1>V1>VR2 respectively. When V1>VR1, the first comparison signal output by the first comparator is a high-level signal. When V1<VR1, the first comparison signal output by the first comparator is a low-level signal. When V1<VR2, the second comparison signal output by the second comparator is a low-level signal. When V1>VR2, the second comparison signal output by the second comparator is a high-level signal.

[0067] In one embodiment, the first reference voltage VR1 can be determined according to the voltage drop of the LED lamp beads to ensure no stroboscopic. The first reference voltage VR1 can also be determined according to the maximum operating voltage of the energy storage capacitor to avoid damage. The second reference voltage VR2 can be determined according to the reset signal voltage of the LED, approximately a few tenths of a volt negative.

[0068] In one embodiment, the first voltage V1 can be obtained by dividing the voltage of VIN through a voltage-dividing resistor. As Figure 6 shown, the first voltage V1 is obtained by dividing the voltage of VIN through the voltage-dividing resistors R1 and R2, then V1 is VIN*R2 / (R1 + R2). The first reference voltage VR1 is approximately 1.2V, and the second reference voltage VR2 is approximately -1.2mV. In another embodiment, if the first voltage V1 is not divided by the voltage-dividing resistor, then VR1 is about 100V and VR2 is about -100mV.

[0069] As Figure 6 shown, the first input terminal of the first comparison unit 111 and the first input terminal of the second comparison unit 112 are the in-phase input terminals for accessing the first voltage V1. The second input terminal of the first comparison unit 111 and the second input terminal of the second comparison unit 112 are the anti-phase input terminals, respectively for accessing the first reference voltage VR1 and the second reference voltage VR2.

[0070] In one embodiment, as Figure 7 shown, the comparison module 110 further includes a first delay unit T1 and a second delay unit T2. The first delay unit T1 is connected between the output terminal of the first comparison unit 111 and the logic module 120; the second delay unit T2 is connected between the output terminal of the second comparison unit 112 and the logic module 120. The anti-shake effect can be achieved through the first delay unit T1 and the second delay unit T2, thereby removing the spikes of the first comparison signal and the second comparison signal and improving the stability of the first logic signal.

[0071] In one embodiment, such as Figure 8 As shown, logic module 120 includes an inverter 121 and an SR latch 122. Inverter 121 is connected to the first comparison unit 111 and is used to invert the level of the first comparison signal. The set terminal of SR latch 122 is connected to the output terminal of the inverter, and the reset terminal of SR latch 122 is connected to the output terminal of the second comparison unit 112. The output terminal of SR latch 122 is used to output a second logic signal.

[0072] The logic module 120 can be directly connected to the gate (G) terminal of the NMOS transistor 130. Alternatively, the logic module 120 can be connected to the gate (G) terminal of the NMOS transistor 130 via a driver module. The driver module can be found in [reference needed]. Figure 9 The driving module 140 shown converts a first logic signal, which is an analog signal, into a second logic signal, which is a digital signal, through an inverter 121 and an SR latch 122. This also solves the timing mismatch problem, thereby improving the driving effect of the LED driving circuit 100.

[0073] For example, the first comparison unit 111 outputs a first level signal when the first voltage V1 is greater than the first reference voltage VR1, and outputs a second level signal when the first voltage V1 is less than or equal to the first reference voltage VR1; the second comparison unit 112 outputs a third level signal when the first voltage V1 is less than the second reference voltage, and outputs a fourth level signal when the first voltage V1 is greater than or equal to the second reference voltage. The first logic signal includes a combination of the first level signal and the fourth level signal, a combination of the second level signal and the third level signal, or a combination of the second level signal and the fourth level signal. The inverter 121 is used to invert the level of the first level signal or the second level signal. The SR latch 122 is used to output a second logic signal based on the fourth level signal and the inverted first level signal, or based on one of the third level signal and the fourth level signal and the inverted second level signal.

[0074] In one embodiment, the comparison module 110 and the logic module 120 are integrated within a chip, and the NMOS transistor 130 is integrated within the chip or externally located on the chip. It should be noted that the comparison module 110 and the logic module 120 are integrated within a single chip, such as an LED driver chip. The NMOS transistor 130 can be integrated with the comparison module 110 and the logic module 120 on the same chip, or it can be externally located on the chip. For example, the NMOS transistor 130 can be located within the LED driver chip or externally connected to the LED driver chip.

[0075] In one embodiment, such as Figure 9As shown, the LED driving circuit 100 further includes a driving module 140. The driving module 140 is connected to the output end of the logic module 120 and the gate terminal (G terminal) of the NMOS transistor 130. The driving module 140 is used to control the on and off of the NMOS transistor 130 based on a second logic signal. For example, the driving module 140 controls the NMOS transistor 130 to turn on after the duration of the second logic signal indicating V1>VR1 is greater than or equal to a first set time. At this time, the energy storage capacitor discharges to supply power to the LED. The driving module 140 also controls the NMOS transistor 130 to turn off after the duration of the second logic signal indicating V1<VR2 is greater than or equal to a second set time. At this time, the energy storage capacitor is charged through the body diode of the NMOS transistor 130.

[0076] Exemplarily, when V1>VR1 and lasts for T1 time, the driving module 140 drives the NMOS transistor 130 to turn on, that is, the NMOS transistor 130 turns on, and the energy storage capacitor discharges to supply power to the LED. When V1<VR2 and lasts for T2 time, the driving module 140 drives the MOS to turn off, that is, the NMOS transistor 130 does not turn on, and the energy storage capacitor is charged through the body diode of the NMOS transistor 130. When VR1>V1>VR2 and VIN drops, the NMOS transistor 130 is in the off state, and the energy storage capacitor neither charges nor discharges.

[0077] The LED driving circuit 100 of the above embodiment includes a comparison module 110, a logic module 120 and an NMOS transistor 130. The source terminal of the NMOS transistor 130 is used to be connected to the negative electrode of the energy storage capacitor, and the drain terminal of the NMOS transistor 130 is used to connect to VIN; when the NMOS transistor 130 is on, the energy storage capacitor discharges to supply power to the LED; when the NMOS transistor 130 is off, VIN charges the energy storage capacitor through the NMOS transistor 130. By controlling the on and off of the NMOS transistor 130 to control the charge and discharge of the energy storage capacitor, the power supply to the LED can be maintained to ensure no stroboscopic. At the same time, the waveform of the LED current can be made wider and the peak value can be reduced, and the active power of the LED current is increased, so the power factor can be effectively improved.

[0078] Please refer to Figure 10 , Figure 10 which is a circuit schematic diagram of the LED driving power supply provided by the embodiment of the present application.

[0079] As Figure 10As shown, the LED driver power supply 200 includes a rectifier bridge 210, an energy storage capacitor 220, a sampling circuit 230, and a constant current module 240, and also includes an LED driver circuit 250 as described in the embodiments of this application. The rectifier bridge 210 is used to rectify the AC power to obtain a rectified output voltage VIN; the positive terminal of the energy storage capacitor 220 is used to connect the rectified output voltage VIN to the constant current module 240, and the negative terminal of the energy storage capacitor 220 is used to connect to the source terminal of the NMOS transistor in the LED driver circuit 250 and grounded; the sampling circuit 230 is used to sample VIN to obtain a first voltage V1; the constant current module 240 is connected between the rectifier bridge 210 and the LED, and is used to adjust the current output to the LED to a constant current.

[0080] The LED driver circuit 250 includes the LED driver circuit 100 described in the above embodiments. For example, the LED driver circuit 250 includes the comparator module 110, logic module 120, and NMOS transistor 130 from the LED driver circuit 100 described in the above embodiments. The constant current module 240 may include a BUCK circuit and a flyback circuit.

[0081] In one embodiment, such as Figure 11 As shown, the LED driver power supply 200 also includes a CBB capacitor, which is connected between the rectifier bridge 210 and the constant current module 240. The CBB capacitor is typically around 10 to 100 nF and can filter and absorb surges, preventing large spikes caused by the lack of capacitive components on VIN when the energy storage capacitor 220 is controlled.

[0082] The LED driver circuit power supply 200 in the above embodiment is used to drive the charging and discharging of the energy storage capacitor connected between the rectified output voltage VIN and the LED. Specifically, by controlling the on / off state of the NMOS transistor, the charging and discharging of the energy storage capacitor is controlled, which can maintain the power supply to the LED and ensure flicker-free operation. At the same time, it can widen the waveform of the LED current and reduce the peak value, thereby improving the active power of the LED current and effectively improving the power factor.

[0083] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection. They can refer to a mechanical connection or an electrical connection. They can refer to a direct connection or an indirect connection through an intermediate medium, and they can refer to the internal communication of two components or the interaction between two components.

[0084] The embodiments of this application have been described in detail above with reference to the accompanying drawings. However, this application is not limited to the above embodiments. Within the scope of knowledge possessed by those skilled in the art, various changes can be made without departing from the spirit of this application.

Claims

1. An LED driving circuit, characterized in that, The driving circuit is used to drive the charging and discharging of the energy storage capacitor connected between the rectified output voltage VIN and the LED. The driving circuit includes: The comparison module compares a first voltage that characterizes VIN based on a first reference voltage and a second reference voltage, and outputs a first logic signal. The logic module is connected to the comparison module and outputs a second logic signal based on the first logic signal; The NMOS transistor is turned on and off based on the second logic signal. The source terminal of the NMOS transistor is used to connect to the negative terminal of the energy storage capacitor, and the drain terminal of the NMOS transistor is used to connect to VIN. When the NMOS transistor is turned on, the energy storage capacitor discharges to power the LED; when the NMOS transistor is turned off, VIN charges the energy storage capacitor through the NMOS transistor.

2. The LED driving circuit according to claim 1, characterized in that, The comparison module includes: The first comparison unit has a first input terminal for connecting to the first voltage, a second input terminal for connecting to the first reference voltage, and an output terminal for outputting a first comparison signal. The second comparison unit has a first input terminal for connecting to the first voltage, a second input terminal for connecting to the second reference voltage, and an output terminal for outputting a second comparison signal. Wherein, the second reference voltage is less than the first reference voltage; the first logic signal is a combination of the first comparison signal and the second comparison signal.

3. The LED driving circuit according to claim 2, characterized in that, The first input terminal is a non-inverting input terminal, and the second input terminal is an inverting input terminal.

4. The LED driving circuit according to claim 2, characterized in that, The comparison module further includes: The first delay unit is connected between the output of the first comparison unit and the logic module; The second delay unit is connected between the output of the second comparison unit and the logic module.

5. The LED driving circuit according to any one of claims 2-4, characterized in that, The logic module includes: An inverter, connected to the first comparison unit, is used to invert the level of the first comparison signal; The SR latch has its set terminal connected to the output terminal of the inverter, its reset terminal connected to the output terminal of the second comparison unit, and its output terminal used to output the second logic signal.

6. The LED driving circuit according to claim 1, characterized in that, The logic module is directly connected to the gate terminal of the NMOS transistor, or The logic module is connected to the gate terminal of the NMOS transistor via the driver module.

7. The LED driving circuit according to claim 1, characterized in that, The first voltage is either VIN or a voltage divider of VIN.

8. The LED driving circuit according to any one of claims 1-4, characterized in that, The comparison module and the logic module are integrated within the chip, and the NMOS transistor is integrated within the chip or externally placed on the chip.

9. An LED driver power supply, characterized in that, It includes a rectifier bridge, an energy storage capacitor, a sampling circuit, a constant current module, and also includes the LED driving circuit as described in any one of claims 1-8; The rectifier bridge is used to rectify the alternating current to obtain the rectified output voltage VIN. The positive terminal of the energy storage capacitor is used to connect VIN and the constant current module, and the negative terminal of the energy storage capacitor is used to connect to the source terminal of the NMOS transistor in the LED driving circuit and grounded. The sampling circuit is used to sample VIN to obtain a first voltage; The constant current module is connected to the LED and is used to adjust the current output to the LED to a constant current.

10. The LED driver power supply according to claim 9, characterized in that, Also includes: A CBB capacitor is connected between the rectifier bridge and the constant current module.

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