Consumable chip and printing consumable

Abstract

The utility model relates to a consumable chip and a printing consumable, the consumable chip comprises a high-voltage terminal, a detection terminal, a low-voltage terminal and a control module, the working voltage of the high-voltage terminal is greater than the working voltage of the detection terminal and the working voltage of the low-voltage terminal; the control module comprises a first contact end, a second contact end and a control unit, the first contact end is connected with the detection terminal, the second contact end is connected with the low-voltage terminal, and the control unit is connected with the high-voltage terminal and the detection terminal; the control unit is configured to trigger conduction of the first contact end and the second contact end under the condition that the high-voltage terminal and the detection terminal are short-circuited. According to the method and the device, the probability of detection error reporting of the printer is reduced, continuous use of the consumable chip is guaranteed, and the risk of damage to the printer and the consumable chip is reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of printing consumables, and in particular to a consumable chip and a printing consumable. BACKGROUND

[0002] In the related art, when the consumable chip is installed into the printer, the printer will perform installation detection thereon. If an abnormality is detected, the consumable chip will be faulty for the printer and cannot be used any more. However, in some cases, it is not the consumable chip itself that is faulty, but some environmental factors. For example, when the high-voltage terminal and the detection terminal on the consumable chip are short-circuited due to ink stains, the voltage of the detection terminal will be higher than the normal working voltage thereof. When the printer reads the high voltage of the detection terminal, the short-circuit protection mechanism in the printer will be triggered, and the printer will report an error, determining that the consumable chip is abnormal and cannot be used any more.

[0003] At present, there is no effective solution to the problem that the consumable chip cannot be used due to the short circuit of the terminal of the consumable chip in the related art. CONTENT OF THE INVENTION

[0004] Therefore, it is necessary to provide a consumable chip and a printing consumable capable of reducing the influence caused by the short circuit of the terminal.

[0005] In a first aspect, the present application provides a consumable chip, comprising: a high-voltage terminal, a detection terminal, a low-voltage terminal, and a control module, wherein the working voltage of the high-voltage terminal is greater than the working voltages of the detection terminal and the low-voltage terminal;

[0006] The control module comprises a first contact terminal, a second contact terminal, and a control unit, wherein the first contact terminal is connected with the detection terminal, the second contact terminal is connected with the low-voltage terminal, and the control unit is connected with the high-voltage terminal and the detection terminal;

[0007] The control unit is configured to trigger the first contact terminal and the second contact terminal to be conductive in the case that the high-voltage terminal is short-circuited with the detection terminal.

[0008] In some embodiments, the high-voltage terminal comprises a first high-voltage terminal and a second high-voltage terminal, and a resistor is connected in series between the first high-voltage terminal and the second high-voltage terminal;

[0009] The detection terminal comprises a first detection terminal and a second detection terminal, and the first detection terminal and the second detection terminal are short-circuited;

[0010] When the first detection terminal is short-circuited with the first high-voltage terminal, or when the second detection terminal is short-circuited with the second high-voltage terminal, the voltages of the first detection terminal and the second detection terminal are within a preset range.

[0011] In some embodiments, the control unit includes a MOSFET, the source of which is connected to the first contact terminal, the drain of which is connected to the second contact terminal, and the gate of which is connected to the high-voltage terminal; wherein,

[0012] The cutoff voltage of the MOS transistor is not greater than the maximum operating voltage of the detection terminal;

[0013] When the high-voltage terminal and the detection terminal are short-circuited, the gate-source voltage difference of the MOS transistor is not greater than the cutoff voltage, and the MOS transistor is turned on.

[0014] In some embodiments, a first resistor and a second resistor are connected in series in the path connecting the high-voltage terminal and the drain of the MOSFET. The gate of the MOSFET is connected to the drain of the MOSFET through the first resistor. The first resistor and the second resistor satisfy the following condition:

[0015] Vh×R1 / (R1+R2)≤Vgsmax, where Vh represents the operating voltage of the high-voltage terminal, R1 represents the first resistor, R2 represents the second resistor, and Vgsmax represents the maximum value of the gate-source voltage difference.

[0016] In some embodiments, the MOSFET includes a first MOSFET, and the first high-voltage terminal and the first detection terminal are respectively connected to the first MOSFET; and / or,

[0017] The MOSFET includes a second MOSFET, and the second high-voltage terminal and the second detection terminal are respectively connected to the second MOSFET.

[0018] In some embodiments, the control unit includes a MOSFET and a comparator;

[0019] The source of the MOS transistor is connected to the first contact terminal, the drain of the MOS transistor is connected to the second contact terminal, and the gate of the MOS transistor is connected to the signal output terminal of the comparator.

[0020] The first signal input terminal of the comparator is connected to the high voltage terminal, and the second signal input terminal of the comparator is connected to the detection terminal;

[0021] The comparator is used to compare the voltage difference between the first signal input terminal and the second signal input terminal, and outputs a preset potential to turn on the MOS transistor when the voltage difference is zero.

[0022] In some embodiments, the first signal input terminal of the comparator is connected to the first high-voltage terminal, the second signal input terminal of the comparator is connected to the first detection terminal, and the first contact terminal is connected to the second detection terminal.

[0023] In some embodiments, the low-voltage terminal includes at least one of the following: an enable terminal, a clock terminal, a power supply terminal, a data terminal, and a ground terminal;

[0024] The consumable chip also includes a wire, one end of which is connected to the low-voltage terminal, and the other end of which extends between the high-voltage terminal and the detection terminal.

[0025] In some embodiments, the control unit is configured to trigger the first contact terminal and the second contact terminal to periodically conduct when the high-voltage terminal and the detection terminal are short-circuited, so that the voltage of the detection terminal is stabilized within a preset range.

[0026] Secondly, this application also provides a printing consumable, characterized in that it includes: a consumable box and the consumable chip described in the first aspect.

[0027] The aforementioned consumable chip and printing consumables, by connecting the first contact terminal of the control module to the detection terminal, the second contact terminal of the control module to the low-voltage terminal, and the control unit of the control module to the high-voltage terminal and the detection terminal, in the event of a short circuit between the high-voltage terminal and the detection terminal, the control unit triggers the first contact terminal and the second contact terminal to conduct, thereby lowering the voltage of the detection terminal. This reduces the probability of printer detection errors, helps ensure the continued use of the consumable chip, and lowering the voltage of the detection terminal helps protect the printer and the consumable chip, reducing the risk of damage to the printer and the consumable chip. Attached Figure Description

[0028] Figure 1 This is a schematic diagram of the structure of a consumable chip in one embodiment;

[0029] Figure 2 For based on Figure 1 A schematic diagram of the circuit structure of a consumable chip containing a MOSFET;

[0030] Figure 3 For based on Figure 1 A schematic diagram of the circuit structure of a consumable chip containing a MOSFET and a comparator;

[0031] Figure 4 This is a schematic diagram of the terminal layout of the consumable chip in one embodiment;

[0032] Figure 5 For based onFigure 4 A schematic diagram of the circuit structure of a consumable chip containing a first MOS transistor;

[0033] Figure 6 For based on Figure 4 A schematic diagram of the circuit structure of a consumable chip containing a second MOS transistor;

[0034] Figure 7 For based on Figure 4 A schematic diagram of the circuit structure of a consumable chip containing two MOSFETs;

[0035] Figure 8 For based on Figure 4 A schematic diagram of the circuit structure of a consumable chip containing a MOSFET and a comparator;

[0036] Figure 9 For based on Figure 4 A schematic diagram of the circuit structure of a consumable chip containing a MOSFET and a comparator;

[0037] Figure 10 This is a schematic diagram of the terminal layout of the consumable chip in one embodiment;

[0038] Figure 11 This is a schematic diagram of the terminal layout of a consumable chip in one embodiment.

[0039] Figure label:

[0040] H, high-voltage terminal; H1, first high-voltage terminal; H12, second high-voltage terminal;

[0041] T, detection terminal; T1, first detection terminal; T2, second detection terminal;

[0042] L, low voltage terminal; CE, enable terminal; CLK, clock terminal; VDD, power supply terminal; GND, ground terminal; DATA, data terminal;

[0043] C, Control module; C1, First contact terminal; C2, Second contact terminal; C3, Control unit; Q, MOSFET; Q1, First MOSFET; Q2, Second MOSFET; G, Gate; S, Source; D, Drain;

[0044] U, comparator; OUT, signal output terminal; IN1, first signal input terminal; IN2, second signal input terminal; VCC, power supply terminal;

[0045] R, resistor; R1, first resistor; R2, second resistor; R3, third resistor; R4, fourth resistor; M, wire. Detailed Implementation

[0046] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application. The reference to "embodiment" in this application means that a specific feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various locations throughout the specification does not necessarily refer to the same embodiment, nor is it necessarily an independent or alternative embodiment mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments without conflict.

[0047] Unless otherwise defined, the technical or scientific terms used in this application shall have the ordinary meaning understood by one of ordinary skill in the art to which this application pertains. The terms “a,” “an,” “an,” “the,” and similar words used in this application do not indicate quantity limitation and may indicate singular or plural. The terms “comprising,” “including,” “having,” and any variations thereof used in this application are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or device that includes a series of steps or modules (units) is not limited to the listed steps or units, but may also include steps or units not listed, or may include other steps or units inherent to these processes, methods, products, or devices. The terms “connected,” “linked,” “coupled,” and similar words used in this application are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. “Multiple” used in this application means two or more. “And / or” describes the relationship between related objects, indicating that three relationships may exist; for example, “A and / or B” can represent: A alone, A and B simultaneously, and B alone. The terms “first,” “second,” “third,” etc., used in this application are merely to distinguish similar objects and do not represent a specific ordering of the objects.

[0048] In one embodiment, Figure 1 A schematic diagram of a consumable chip is provided, wherein, Figure 1 (a) is a schematic diagram of the terminal layout of the consumable chip. Figure 1(b) is a schematic diagram of the circuit structure of the consumable chip. The consumable chip includes: a high-voltage terminal H, a detection terminal T, a low-voltage terminal L, and a control module C. The operating voltage of the high-voltage terminal H is greater than the operating voltages of the detection terminal T and the low-voltage terminal L. The control module C includes a first contact terminal C1, a second contact terminal C2, and a control unit C3. The first contact terminal C1 is connected to the detection terminal T, the second contact terminal C2 is connected to the low-voltage terminal L, and the control unit C3 is connected to the high-voltage terminal H and the detection terminal T. The control unit C3 is configured to trigger the first contact terminal C1 and the second contact terminal C2 to conduct when the high-voltage terminal H and the detection terminal T are short-circuited.

[0049] To avoid affecting the contact between the terminals on the consumable chip and the printer pins, the high-voltage terminal H, the detection terminal T, and the low-voltage terminal L are located on the front side of the consumable chip (e.g., Figure 1 (a) As shown, the control module C is located on the back of the consumable chip. The control module C is connected to the high voltage terminal H, the detection terminal T, and the low voltage terminal L on the front through the vias on the consumable chip. Figure 1 The structure shown is for illustrative purposes only and does not limit the terminal layout of the consumable chip. In some embodiments, the consumable chip may also include more... Figure 1 The more or fewer components shown, or having the same Figure 1 Different configurations are shown. For example, the number of high-voltage terminals H can be one or more, the number of detection terminals T can be one or more, and the number of low-voltage terminals L can be one or more. This embodiment does not impose any restrictions.

[0050] The normal operating voltage of the consumable chip can be a fixed value (e.g., 2.8V or 6.5V) or a threshold range (e.g., 2.8V~6.5V). When the high-voltage terminal H and the detection terminal T on the consumable chip short-circuit due to ink contamination, the instantaneous voltage applied to the detection terminal T may be higher than its original normal operating voltage. When the printer reads the high voltage of the detection terminal T, it will trigger the printer's internal short-circuit protection mechanism, and the printer will report an error, determining that the consumable chip is abnormal and can no longer be used. Moreover, the high-voltage signal may damage the printer and the consumable chip. It should be noted that in actual operation, due to interference, glitches, etc. in the printer's internal circuitry, the printer's output voltage may be abnormal, resulting in the voltage of each contact terminal in the consumable chip (e.g., high-voltage terminal H, detection terminal T, low-voltage terminal L) being particularly high or low at certain times. The voltage under these circumstances does not belong to the operating voltage described in this application. The operating voltage of each contact terminal in this application refers to the voltage of the printer under stable operating conditions.

[0051] During the detection phase, the printer periodically sends high-voltage signals (e.g., around 38V) and low-voltage signals (e.g., 2.8V, 6.5V, or between 2.8V and 6.5V) to the consumable chip. The consumable chip receives the high-voltage signal through the high-voltage terminal H and the low-voltage signal through the detection terminal T and the low-voltage terminal L. The detection terminal T is also a low-voltage terminal relative to the high-voltage terminal H. Since the printer performs installation detection by reading the voltage of individual terminals, these individual terminals are separated from the low-voltage terminal L and defined as the detection terminal T. In some embodiments, the low-voltage terminal L includes, but is not limited to, an enable terminal, a clock terminal, a power terminal, a data terminal, and a ground terminal. The low-voltage terminal L connected to the second contact terminal C2 can be any one of these. The low-voltage terminal L is preferably a ground terminal.

[0052] When a short circuit occurs between the high-voltage terminal H and the detection terminal T, the control unit C3 causes the first contact terminal C1 and the second contact terminal C2 to conduct. Since the second contact terminal is connected to the low-voltage terminal and is in a low-voltage state, the low voltage of the second contact terminal C2 can be used to pull down the voltage of the first contact terminal C1, that is, to pull down the voltage of the detection terminal T. The conduction between the first contact terminal C1 and the second contact terminal C2 can be a single conduction or a periodic conduction, depending on the printer's operating state.

[0053] When the printer is in the detection phase, it periodically sends high-voltage signals to the consumable chip. For example, in the current cycle, when a short circuit occurs between the high-voltage terminal H and the detection terminal T, triggering a conduction action, the short circuit between H and T also pulls down the voltage of the high-voltage terminal H, causing the first contact C1 and the second contact C2 to disconnect. When entering the next cycle, if the printer continues to send a high-voltage signal to the high-voltage terminal H, H returns to a high-voltage state, triggering the conduction action again. This cycle repeats, ultimately resulting in periodic conduction between the first contact C1 and the second contact C2, keeping the voltage of the detection terminal stable within a preset range. Conversely, when entering the next cycle, if the printer stops sending a high-voltage signal to the high-voltage terminal H, H will remain in a low-voltage state. In this case, only one conduction is triggered, which is enough to keep the voltage of the detection terminal T in a low-voltage state.

[0054] Control unit C3 may include a MOSFET or a combination of a MOSFET and a comparator. The source (S) of the MOSFET is connected to the first contact (C1), the drain (D) is connected to the second contact (C2), and the gate (G) is connected to the high-voltage terminal (H) or the comparator. Taking the printer periodically sending a high-voltage signal as an example, in the current cycle, the printer sends a high-voltage signal to the high-voltage terminal (H). When a short circuit occurs between the high-voltage terminal (H) and the detection terminal (T), the voltage at the detection terminal (T) is pulled high, causing the gate-source voltage difference (Vgs) of the MOSFET to decrease, thus turning on the MOSFET. This means that the detection terminal (T) and the low-voltage terminal (L) are connected, causing the voltage at the detection terminal (T) to be pulled low. Since the voltage at the detection terminal (T) is pulled low, the high-voltage terminal (H) is also at a low voltage, and the MOSFET will be turned off. When the next cycle begins, the printer continues to send a high-voltage signal to the high-voltage terminal (H), and the high-voltage terminal (H) returns to a high-voltage state, triggering the conduction action again. This cycle repeats, ultimately resulting in the voltage at the detection terminal (T) fluctuating around the cutoff voltage (Vth) of the MOSFET. The cutoff voltage Vth can be set to the normal operating voltage of the detection terminal T, or lower than the normal operating voltage of the detection terminal T. This setting ensures that even if a short circuit occurs between the high-voltage terminal H and the detection terminal T, the detection terminal T will remain at a lower voltage level, reducing the probability of printer error detection and helping to ensure the continued use of the consumable chip. Furthermore, lowering the voltage of the detection terminal T helps protect the printer and the consumable chip, reducing the risk of damage to both.

[0055] It should be noted that when the high-voltage terminal H and the detection terminal T are short-circuited, it can also be configured to short-circuit the high-voltage terminal H and the low-voltage terminal L, that is, connect the first contact C1 to the high-voltage terminal H. This can also lower the voltage of the detection terminal T, but this method is prone to causing circuit failure. Considering that the voltage of the detection terminal T is lower than the voltage of the high-voltage terminal H, when the high-voltage terminal H and the detection terminal T are short-circuited, it is more stable and safer for the consumable chip to short-circuit the detection terminal T and the low-voltage terminal L.

[0056] In one embodiment, Figure 2 A circuit structure diagram of a consumable chip including a MOSFET is provided. The control unit C3 includes a MOSFET Q. The source S of the MOSFET Q is connected to the first contact terminal C1, the drain D of the MOSFET Q is connected to the second contact terminal C2, and the gate G of the MOSFET Q is connected to the high-voltage terminal H. The cutoff voltage Vth of the MOSFET Q is not greater than the maximum operating voltage Vmax of the detection terminal T. When the high-voltage terminal H and the detection terminal T are short-circuited, the gate-source voltage difference Vgs of the MOSFET Q is not greater than the cutoff voltage Vth, and the MOSFET Q is turned on. The MOSFET Q can be an NMOS transistor or a PMOS transistor; the diagram shows a PMOS transistor.

[0057] NMOS operating mode: It is turned on when the gate G control signal is high and turned off when it is low.

[0058] PMOS operating mode: It is turned on when the gate control signal G is low and turned off when it is high.

[0059] In this embodiment, regardless of whether an NMOS or PMOS transistor is used, the MOS transistor is off when the gate-source voltage difference Vgs is greater than the cutoff voltage Vth, and on when the gate-source voltage difference Vgs is not greater than the cutoff voltage Vth. Specifically, for an NMOS transistor, since Vgs is a positive voltage, it conducts when Vgs is greater than the cutoff voltage Vth. For a PMOS transistor, since Vgs is a negative voltage, it conducts when Vgs is less than the cutoff voltage Vth. For ease of description, the voltage comparisons in this embodiment and other embodiments are absolute value comparisons, ignoring voltage polarity.

[0060] Continue to refer to Figure 2 A first resistor R1 and a second resistor R2 are connected in series in the path connecting the high-voltage terminal H and the drain D of the MOSFET Q. The gate G of the MOSFET is connected to the drain D of the MOSFET Q through the first resistor R1. The first resistor R1 and the second resistor R2 satisfy the condition: Vh×R1 / (R1+R2)≤Vgsmax. Here, Vh represents the operating voltage of the high-voltage terminal H, R1 represents the first resistor, R2 represents the second resistor, and Vgsmax represents the maximum value of the gate-source voltage difference. In this embodiment, the values ​​and ratio of the first resistor R1 and the second resistor R2 can be adjusted according to requirements, ensuring that the voltage divided to the MOSFET Q will not damage the MOSFET Q.

[0061] When there is no short circuit between the high-voltage terminal H and the detection terminal T, the PMOS is not turned on, and the high-voltage terminal H and the detection terminal T function normally. When a short circuit occurs between the high-voltage terminal H and the detection terminal T, the voltage at the detection terminal T is pulled high, causing the gate-source voltage difference Vgs of the MOSFET Q to decrease, thus turning on the MOSFET Q, i.e., turning on the detection terminal T and the low-voltage terminal L, causing the voltage at the detection terminal T to be pulled low. Because there is a short circuit between the high-voltage terminal H and the detection terminal T, the voltage at the high-voltage terminal H is also pulled low after the voltage at the detection terminal T is pulled low, at which point the MOSFET Q will be turned off. This cycle repeats, ultimately resulting in the voltage at the detection terminal T fluctuating around the cutoff voltage Vth of the MOSFET Q. The cutoff voltage Vth can be set to the normal operating voltage of the detection terminal T, or lower than the normal operating voltage of the detection terminal T (e.g., 1.3V). With this setting, even if there is a short circuit between the high-voltage terminal H and the detection terminal T, the detection terminal T can be kept stable at a lower voltage level.

[0062] In one embodiment, Figure 3A circuit structure diagram of a consumable chip including a MOSFET and a comparator is provided. The control unit C3 includes: a MOSFET Q and a comparator U; the source S of the MOSFET Q is connected to the first contact terminal C1, the drain D of the MOSFET Q is connected to the second contact terminal C2, and the gate G of the MOSFET Q is connected to the signal output terminal OUT of the comparator U; the first signal input terminal IN1 of the comparator U is connected to the high-voltage terminal H, and the second signal input terminal IN2 of the comparator U is connected to the detection terminal T; the comparator U is used to compare the voltage difference between the first signal input terminal IN1 and the second signal input terminal IN2, and outputs a preset potential to turn on the MOSFET Q when the voltage difference is zero.

[0063] In this embodiment, when the high-voltage terminal H and the detection terminal T are not short-circuited, there is a certain voltage difference between the two signal input terminals of the comparator U. The comparator U outputs a first potential to the MOSFET Q, and the MOSFET Q is turned off. When the high-voltage terminal H and the detection terminal T are short-circuited, the voltage difference between the two signal input terminals of the comparator U decreases to zero. The comparator U outputs a second potential to the MOSFET Q, and the MOSFET Q turns on, that is, it turns on the detection terminal T and the low-voltage terminal L, causing the voltage of the detection terminal T to be pulled down. Since the high-voltage terminal H and the detection terminal T are short-circuited, after the voltage of the detection terminal T is pulled down, the voltage of the high-voltage terminal H is also pulled down. At this time, the voltage difference between the two signal input terminals of the comparator U still decreases to zero, and the MOSFET Q continues to turn on. Ultimately, the voltage of the detection terminal T approaches the cutoff voltage Vth of the MOSFET Q. The cutoff voltage Vth can be the normal operating voltage of the detection terminal T, or lower than the normal operating voltage of the detection terminal T (e.g., 1.3V). With this setting, even if the high-voltage terminal H and the detection terminal T are short-circuited, the detection terminal T can be kept stable at a lower voltage level.

[0064] The first and second potentials are configured according to the type of MOSFET Q. For example, if MOSFET Q is an NMOS, since it conducts when the gate control signal G is high and is turned off when it is low, the first potential is configured as low and the second potential as high. Conversely, if MOSFET Q is a PMOS, since it conducts when the gate control signal G is low and is turned off when it is high, the first potential is configured as high and the second potential as low.

[0065] Continue to refer to Figure 3In some embodiments, the comparator U further includes a power supply terminal VCC and a ground terminal GND. A third resistor R3 and a fourth resistor R4 are connected in series in the path connecting the high-voltage terminal H and the ground terminal GND. The first signal input terminal IN1 is connected to the ground terminal GND through the third resistor R3. The values ​​and ratios of the third resistor R3 and the fourth resistor R4 can be adjusted as needed to protect the comparator U from being damaged due to excessively high operating voltage at the high-voltage terminal H.

[0066] In one embodiment, Figure 4 A schematic diagram of another consumable chip terminal layout is provided. The high-voltage terminal H includes a first high-voltage terminal H1 and a second high-voltage terminal H2, with a resistor (located on the back of the consumable chip, not shown in the diagram) connected in series between them. The detection terminal T includes a first detection terminal T1 and a second detection terminal T2, which are short-circuited. When the first detection terminal T1 is short-circuited to the first high-voltage terminal H1, or when the second detection terminal T2 is short-circuited to the second high-voltage terminal H2, the voltage between the first detection terminal T1 and the second detection terminal T2 is within a preset range.

[0067] During the installation and testing phase, after the chip terminals are connected to the corresponding pins on the printer, the printer applies a high-voltage signal to the chip through the corresponding pins. It then reads the output signal from the high-voltage terminal H and compares it with the expected result. If the result matches the expectation, the installation and testing are successful; otherwise, the installation and testing fail. Specifically, the printer pins apply a high-voltage signal (approximately 38-40V) to the high-voltage terminal H. The printer inputs the high-voltage signal through the first high-voltage terminal H1, which flows through a resistor to the second high-voltage terminal H2. The printer determines whether the high-voltage terminal H is functioning correctly by detecting the voltage across the resistor.

[0068] During the verification phase, the printer probes also output a low-voltage signal (e.g., 0V) to the consumable chip. At this time, the chip's internal memory is not active, and the low-voltage terminals (including low-voltage terminal L and detection terminal T) are connected to the memory. The low-voltage terminal L includes an enable terminal CE, a clock terminal CLK, a power terminal VDD, a ground terminal GND, and a data terminal DATA. The first detection terminal T1 and the second detection terminal T2 are shorted to form a circuit, where the low-voltage signal flows from the first detection terminal T1 to the second detection terminal T2. The printer determines whether the chip is correctly installed by detecting and comparing the voltage signals from the first detection terminal T1 and the second detection terminal T2.

[0069] In one embodiment, Figure 5A circuit structure diagram of a consumable chip including a first MOSFET is provided. The MOSFET includes a first MOSFET Q1, a first high-voltage terminal H1, and a first detection terminal T1, which are respectively connected to the first MOSFET Q1. Specifically, the source S of the first MOSFET Q1 is connected to the first contact C1, the drain D of the first MOSFET Q1 is connected to the second contact C2, and the gate G of the first MOSFET Q1 is connected to the first high-voltage terminal H1. The cutoff voltage Vth of the first MOSFET Q1 is not greater than the maximum operating voltage Vmax of the first detection terminal T1. When the first high-voltage terminal H1 and the first detection terminal T1 are short-circuited, the gate-source voltage difference Vgs of the first MOSFET Q1 is not greater than the cutoff voltage Vth, and the first MOSFET Q1 is turned on. The first MOSFET Q1 can be an NMOS transistor or a PMOS transistor; the figure shows a PMOS transistor.

[0070] When the first detection terminal T1 is short-circuited with the first high-voltage terminal H1, the voltage difference between them decreases, triggering the first MOSFET Q1 to conduct and pulling down the voltage of the first detection terminal T1. Since the first detection terminal T1 is short-circuited with the first high-voltage terminal H1, the first detection terminal T1 and the second detection terminal T2 are also short-circuited, thus pulling down the voltages of both the first high-voltage terminal H1 and the second detection terminal T2. Furthermore, since the first high-voltage terminal H1 is the printer's high-voltage signal input terminal, the high-voltage signal flows to the second high-voltage terminal H2; therefore, the voltage of the second high-voltage terminal H2 is also pulled down, ultimately resulting in all three detection terminals being pulled down: the first detection terminal T1, the second detection terminal T2, the first high-voltage terminal H1, and the second high-voltage terminal H2.

[0071] When the second detection terminal T2 is short-circuited with the second high-voltage terminal H2, the voltage of the first detection terminal T1 will be pulled up because the first detection terminal T1 is short-circuited with the second detection terminal T2. This reduces the voltage difference between the first detection terminal T1 and the first high-voltage terminal H1, triggering the first MOSFET Q1 to turn on and pull down the voltage of the first detection terminal T1. Since the first detection terminal T1 and the second detection terminal T2 are short-circuited, and the second detection terminal T2 is short-circuited with the second high-voltage terminal H2, the voltages of both the second detection terminal T2 and the second high-voltage terminal H2 will be pulled down, ultimately resulting in the voltages of the first detection terminal T1, the second detection terminal T2, and the second high-voltage terminal H2 all being pulled down.

[0072] In one embodiment, Figure 6A circuit structure diagram of a consumable chip including a second MOSFET is provided. The MOSFET includes a second MOSFET Q2, a second high-voltage terminal H2, and a second detection terminal T2, which are respectively connected to the second MOSFET Q2. Specifically, the source S of the second MOSFET Q2 is connected to the first contact C1, the drain D of the second MOSFET Q2 is connected to the second contact C2, and the gate G of the second MOSFET Q2 is connected to the second high-voltage terminal H2. The cutoff voltage Vth of the second MOSFET Q2 is not greater than the maximum operating voltage Vmax of the second detection terminal T2. When the second high-voltage terminal H2 and the second detection terminal T2 are short-circuited, the gate-source voltage difference Vgs of the second MOSFET Q2 is not greater than the cutoff voltage Vth, and the second MOSFET Q2 is turned on. The second MOSFET Q2 can be an NMOS transistor or a PMOS transistor; the figure shows a PMOS transistor.

[0073] When the first detection terminal T1 is short-circuited with the first high-voltage terminal H1, the voltage of the second detection terminal T2 will be pulled up because the first detection terminal T1 is short-circuited with the second detection terminal T2. This reduces the voltage difference between the second detection terminal T2 and the second high-voltage terminal H2, triggering the second MOSFET Q2 to conduct and pulling down the voltage of the second detection terminal T2. Because the first detection terminal T1 is short-circuited with the second detection terminal T2, and the first detection terminal T1 is short-circuited with the first high-voltage terminal H1, the voltages of both the first detection terminal T1 and the first high-voltage terminal H1 will be pulled down. Ultimately, this results in the voltages of the first detection terminal T1, the second detection terminal T2, the first high-voltage terminal H1, and the second high-voltage terminal H2 all being pulled down.

[0074] When the second detection terminal T2 is short-circuited with the second high-voltage terminal H2, the voltage difference between the two terminals decreases, triggering the second MOSFET Q2 to conduct and pulling down the voltage of the second detection terminal T2. Because the second detection terminal T2 is short-circuited with the second high-voltage terminal H2, the first detection terminal T1 and the second detection terminal T2 are also short-circuited. Therefore, the voltages of both the second high-voltage terminal H2 and the first detection terminal T1 are pulled down, ultimately resulting in the voltages of the first detection terminal T1, the second detection terminal T2, and the second high-voltage terminal H2 all being pulled down.

[0075] In one embodiment, Figure 7A circuit structure diagram of a consumable chip including two MOSFETs is provided. The MOSFETs include a first MOSFET Q1 and a second MOSFET Q2. A first high-voltage terminal H1 and a first detection terminal T1 are connected to the first MOSFET Q1, and a second high-voltage terminal H2 and a second detection terminal T2 are connected to the second MOSFET Q2. Specifically, the source S of the first MOSFET Q1 is connected to the first contact terminal C1, the drain D of the first MOSFET Q1 is connected to the second contact terminal C2, and the gate G of the first MOSFET Q1 is connected to the first high-voltage terminal H1. The source S of the second MOSFET Q2 is connected to the first contact terminal C1, the drain D of the second MOSFET Q2 is connected to the second contact terminal C2, and the gate G of the second MOSFET Q2 is connected to the second high-voltage terminal H2. Among them, the cutoff voltage Vth of the first MOSFET Q1 and the second MOSFET Q2 is not greater than the maximum operating voltage Vmax of the corresponding detection terminal T; when the first detection terminal T1 is short-circuited with the first high-voltage terminal H1, or the second detection terminal T2 is short-circuited with the second high-voltage terminal H2, the first detection terminal T1 and the second detection terminal T2 will be stabilized at a lower voltage, and the voltages of the first high-voltage terminal H1 and the second high-voltage terminal H2 will also be pulled down.

[0076] In one embodiment, Figure 8 A circuit structure diagram of a consumable chip including a MOSFET Q and a comparator is provided. The control unit includes: a MOSFET Q and a comparator U; the source S of the MOSFET Q is connected to the first contact terminal C1, the drain D of the MOSFET Q is connected to the second contact terminal C2, and the gate G of the MOSFET Q is connected to the signal output terminal OUT of the comparator U; the first signal input terminal IN1 of the comparator U is connected to the first high-voltage terminal H1, and the second signal input terminal IN2 of the comparator U is connected to the first detection terminal T1; the comparator U is used to compare the voltage difference between the first signal input terminal IN1 and the second signal input terminal IN2, and outputs a preset potential to turn on the MOSFET Q when the voltage difference is zero.

[0077] When the first detection terminal T1 is short-circuited with the first high-voltage terminal H1, the voltage difference between them decreases, causing the comparator U to output a preset potential, triggering the MOSFET Q to conduct and pulling down the voltage of the second detection terminal T2. Since the first detection terminal T1 is short-circuited with the second detection terminal T2, and the first detection terminal T1 is also short-circuited with the first high-voltage terminal H1, both the voltages of the first detection terminal T1 and the first high-voltage terminal H1 will be pulled down. Furthermore, since the first high-voltage terminal H1 is the printer's high-voltage signal input terminal, the high-voltage signal will flow to the second high-voltage terminal H2; therefore, the voltage of the second high-voltage terminal H2 will also be pulled down, ultimately resulting in all the voltages of the first detection terminal T1, the second detection terminal T2, the first high-voltage terminal H1, and the second high-voltage terminal H2 being pulled down.

[0078] When the second detection terminal T2 is short-circuited with the second high-voltage terminal H2, the voltage of the first detection terminal T1 will be pulled up because the first detection terminal T1 is short-circuited with the second detection terminal T2. This reduces the voltage difference between the first detection terminal T1 and the first high-voltage terminal H1, causing the comparator U to output a preset potential, triggering the MOSFET Q to turn on and pull down the voltage of the second detection terminal T2. Because the first detection terminal T1 is short-circuited with the second detection terminal T2, and the second detection terminal T2 is short-circuited with the second high-voltage terminal H2, the voltages of the first detection terminal T1 and the second high-voltage terminal H2 will also be pulled down, ultimately resulting in the voltages of the first detection terminal T1, the second detection terminal T2, and the second high-voltage terminal H2 all being pulled down.

[0079] In one embodiment, Figure 9 A schematic diagram of another consumable chip including a MOSFET and a comparator is provided. The control unit includes: a MOSFET Q and a comparator U; the source S of the MOSFET Q is connected to the first contact C1, the drain D of the MOSFET Q is connected to the second contact C2, and the gate G of the MOSFET Q is connected to the signal output terminal OUT of the comparator U; the first signal input terminal IN1 of the comparator U is connected to the second high-voltage terminal H2, and the second signal input terminal IN2 of the comparator U is connected to the second detection terminal T2; the comparator U is used to compare the voltage difference between the first signal input terminal IN1 and the second signal input terminal IN2, and outputs a preset potential to turn on the MOSFET Q when the voltage difference is zero.

[0080] When the first detection terminal T1 is short-circuited with the first high-voltage terminal H1, the voltage of the second detection terminal T2 is pulled up because the first detection terminal T1 is short-circuited with the second detection terminal T2. This reduces the voltage difference between the second detection terminal T2 and the second high-voltage terminal H2, causing the comparator U to output a preset potential, triggering the MOSFET Q to conduct and pulling down the voltage of the first detection terminal T1. Since the first detection terminal T1 is short-circuited with the second detection terminal T2, and also short-circuited with the first high-voltage terminal H1, the voltages of both the first detection terminal T1 and the first high-voltage terminal H1 are pulled down. Furthermore, since the first high-voltage terminal H1 is the printer's high-voltage signal input terminal, the high-voltage signal flows to the second high-voltage terminal H2, thus pulling down the voltage of the second high-voltage terminal H2 as well. Ultimately, this results in the voltages of the first detection terminal T1, the second detection terminal T2, the first high-voltage terminal H1, and the second high-voltage terminal H2 all being pulled down.

[0081] When the second detection terminal T2 is short-circuited with the second high-voltage terminal H2, the voltage difference between them decreases, causing the comparator U to output a preset potential, triggering the MOSFET Q to turn on and pull down the voltage of the first detection terminal T1. Since the first detection terminal T1 is short-circuited with the second detection terminal T2, and the second detection terminal T2 is short-circuited with the second high-voltage terminal H2, the voltages of the second detection terminal T2 and the second high-voltage terminal H2 will also be pulled down, ultimately resulting in the voltages of the first detection terminal T1, the second detection terminal T2, and the second high-voltage terminal H2 all being pulled down.

[0082] In one embodiment, Figure 10 A schematic diagram of the terminal layout of a consumable chip is provided. The consumable chip also includes a wire M, one end of which is connected to a low-voltage terminal L, and the other end of which extends between a high-voltage terminal H and a detection terminal T.

[0083] Figure 11 A schematic diagram of the terminal layout for another consumable chip is provided. Figure 10 Based on this, the low-voltage terminals L include, but are not limited to, the enable terminal CE, the clock terminal CLK, the power supply terminal VDD, the data terminal DATA, and the ground terminal GND. The high-voltage terminals H include a first high-voltage terminal H1 and a second high-voltage terminal H2, with a resistor R connected in series between them. The detection terminals T include a first detection terminal T1 and a second detection terminal T2, which are short-circuited. One end of the wire M is connected to one of the low-voltage terminals L (shown in the figure as a connection between wire M and the ground terminal GND), and the other end of the wire M extends between the first high-voltage terminal H1 and the first detection terminal T1, and between the second high-voltage terminal H2 and the second detection terminal T2.

[0084] Regardless of Figure 10 still Figure 11 When a short circuit occurs between the high-voltage terminal H and the detection terminal T (for example, when liquid splashes onto the chip and covers the high-voltage terminal H and the detection terminal T), the high-voltage terminal H, the detection terminal T, and the wire M will all become conductive. The low-voltage terminal L will pull down the voltage on the high-voltage terminal H and the detection terminal T, thus playing a role in short-circuit detection and short-circuit protection. This prevents the detection terminal T from receiving a high-voltage signal, and the chip and printer will not be damaged by the high voltage.

[0085] Without the wire M, when a short circuit occurs between the high-voltage terminal H and the detection terminal T, the control module C will reduce the voltage and lower the voltage of the detection terminal T.

[0086] With conductor M in place, when a short circuit occurs between high-voltage terminal H and detection terminal T:

[0087] If the high-voltage terminal H, the detection terminal T, and the wire M are short-circuited together, the voltage of the high-voltage terminal H and the detection terminal T will be directly pulled down to a low voltage or close to 0V.

[0088] If only the high-voltage terminal H is short-circuited with the wire M, the control module C can also reduce the voltage, thus lowering the voltage of the detection terminal T.

[0089] In one embodiment, when a short circuit occurs between the high-voltage terminal H and the detection terminal T, the voltage of the detection terminal T is pulled low, causing it to output a signal that matches the printer's expected result. Therefore, the printer will not issue an error message indicating a consumable chip malfunction. However, since the voltage of the high-voltage terminal H is also pulled low, causing it to output a signal that does not match the printer's expected result, the printer will issue a different error message. This configuration provides a new error detection mechanism while preventing the consumable chip from being deemed unusable.

[0090] Based on the same inventive concept as the above embodiments, this embodiment also provides a printing consumable, which includes: a consumable cartridge and a consumable chip from any of the above embodiments. The consumable chip is installed in the consumable cartridge. The consumable chip has been described in the above embodiments and will not be repeated here.

[0091] Those skilled in the art should understand that the technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments have been described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0092] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A consumable chip, characterized by, The application relates to a high-voltage terminal, a detection terminal, a low-voltage terminal and a control module, wherein the working voltage of the high-voltage terminal is higher than that of the detection terminal and the low-voltage terminal. The control module comprises a first contact terminal, a second contact terminal and a control unit, the first contact terminal is connected with the detection terminal, the second contact terminal is connected with the low-voltage terminal, and the control unit is connected with the high-voltage terminal and the detection terminal. The control unit is configured to trigger the first contact terminal and the second contact terminal to be conductive in the case that the high-voltage terminal is short-circuited with the detection terminal. The high-voltage terminal comprises a first high-voltage terminal and a second high-voltage terminal, and a resistor is connected in series between the first high-voltage terminal and the second high-voltage terminal.

2. The consumable chip of claim 1, wherein, The detection terminal comprises a first detection terminal and a second detection terminal, and the first detection terminal and the second detection terminal are short-circuited. When the first detection terminal is short-circuited with the first high-voltage terminal or the second detection terminal is short-circuited with the second high-voltage terminal, the voltage of the first detection terminal and the second detection terminal is within a preset range. The control unit comprises a MOS tube, the source of the MOS tube is connected with the first contact terminal, the drain of the MOS tube is connected with the second contact terminal, and the gate of the MOS tube is connected with the high-voltage terminal.

3. The consumable chip according to claim 1 or 2, characterized in that, The cut-off voltage of the MOS tube is not higher than the maximum working voltage of the detection terminal. In the case that the high-voltage terminal is short-circuited with the detection terminal, the gate-source voltage difference of the MOS tube is not higher than the cut-off voltage, and the MOS tube is conductive. A first resistor and a second resistor are connected in series in the path that the high-voltage terminal is connected with the drain of the MOS tube, the gate of the MOS tube is connected to the drain of the MOS tube through the first resistor, and the first resistor and the second resistor satisfy the following condition: Vh x R1 / (R1+R2) <= Vgsmax, wherein Vh represents the working voltage of the high-voltage terminal, R1 represents the first resistor, R2 represents the second resistor, and Vgsmax represents the maximum value of the gate-source voltage difference.

4. The consumable chip of claim 3, wherein, The high-voltage terminal comprises a first high-voltage terminal and a second high-voltage terminal, and a resistor is connected in series between the first high-voltage terminal and the second high-voltage terminal; the detection terminal comprises a first detection terminal and a second detection terminal, and the first detection terminal and the second detection terminal are short-circuited. The MOS tube comprises a first MOS tube, and the first high-voltage terminal and the first detection terminal are connected with the first MOS tube respectively.

5. The consumable chip of claim 3, wherein, And / or, The MOS tube comprises a second MOS tube, and the second high-voltage terminal and the second detection terminal are connected with the second MOS tube respectively. The control unit comprises a MOS tube and a comparator. The source of the MOS tube is connected with the first contact terminal, the drain of the MOS tube is connected with the second contact terminal, and the gate of the MOS tube is connected with the signal output end of the comparator.

6. The consumable chip of claim 1 or 2, wherein, The first signal input end of the comparator is connected with the high-voltage terminal, and the second signal input end of the comparator is connected with the detection terminal. ​ ​ The comparator is configured to compare a voltage difference between the first signal input end and the second signal input end, and output a preset potential to turn on the MOS tube when the voltage difference is zero.

7. The consumable chip of claim 6, wherein, The high-voltage terminal comprises a first high-voltage terminal and a second high-voltage terminal, and a resistor is connected in series between the first high-voltage terminal and the second high-voltage terminal; the detection terminal comprises a first detection terminal and a second detection terminal, and the first detection terminal and the second detection terminal are short-circuited. The first signal input end of the comparator is connected with the first high-voltage terminal, the second signal input end of the comparator is connected with the first detection terminal, and the first contact end is connected with the second detection terminal.

8. The consumable chip of claim 1, 2, 4, 5, or 7, wherein, The low-voltage terminal comprises at least one of an enable terminal, a clock terminal, a power supply terminal, a data terminal and a ground terminal. The consumable chip further comprises a wire, one end of the wire being connected with the low-voltage terminal, and the other end of the wire extending between the high-voltage terminal and the detection terminal.

9. The consumable chip of claim 1, 2, 4, 5, or 7, wherein, The control unit is configured to trigger the first contact end and the second contact end to be periodically turned on in a case that the high-voltage terminal and the detection terminal are short-circuited, so that the voltage of the detection terminal is stabilized within a preset range.

10. A print consumable, characterized by, The consumable cartridge comprises the consumable chip according to any one of claims 1 to 9. The consumable cartridge comprises the consumable chip according to any one of claims 1 to 9.

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