Solar cell

Abstract

Provided is a solar cell. The solar cell comprises: a cell substrate having a light receiving surface and a backlight surface; the passivation layer is located on the side where the light receiving surface of the cell substrate is located; and the anti-ultraviolet layer is positioned on one side, far away from the battery substrate, of the passivation layer, or the anti-ultraviolet layer is positioned on one side, facing the battery substrate, of the passivation layer. According to the solar cell provided by the utility model, the anti-ultraviolet layer is arranged on the light receiving surface of the cell substrate, so that ultraviolet rays are reflected outwards and are prevented from damaging the passivation performance of a film layer in the cell substrate, further, the open-circuit voltage of the cell is improved, and the efficiency and the reliability of the cell are improved.

Description

Technical Field

[0001] This utility model relates to the photovoltaic field, and in particular to a solar cell resistant to ultraviolet degradation. Background Technology

[0002] In recent years, the market share of TOPCon (tunneling oxide passivated contact) solar cells has risen rapidly, gradually surpassing PERC cells to become the mainstream technology for solar cells. TOPCon cells exhibit excellent passivation and conductivity on both the n+ and p+ electrodes, while also being compatible with traditional industrial production, showing broad development prospects.

[0003] As TOPCon technology is updated and iterated, potential risks are gradually being exposed. Some data show that TOPCon batteries are greatly affected by ultraviolet degradation testing (UVID). How to reduce UV degradation has become a key issue.

[0004] In view of this, it is necessary to provide an improved solar cell to solve the above-mentioned technical problems. Utility Model Content

[0005] This invention provides a solar cell that improves its resistance to ultraviolet degradation by setting an anti-ultraviolet layer on the light-receiving surface, thereby improving the cell's efficiency and reliability.

[0006] To achieve one of the above-mentioned objectives, the present invention adopts the following technical solution:

[0007] A solar cell, comprising:

[0008] A battery substrate having a light-receiving surface and a backlighting surface;

[0009] A passivation layer is located on the light-receiving side of the battery substrate;

[0010] An anti-ultraviolet layer, wherein the anti-ultraviolet layer is located on the side of the passivation layer away from the battery substrate, or the anti-ultraviolet layer is located on the side of the passivation layer facing the battery substrate.

[0011] In one embodiment, the UV-resistant layer is a silicon oxide layer, which is located between the passivation layer and the battery substrate.

[0012] In one embodiment, the thickness of the UV-resistant layer is 0.1 nm to 5 nm.

[0013] In one embodiment, the passivation layer is an aluminum oxide layer, and / or the thickness of the passivation layer is 2-7 nm.

[0014] In one embodiment, the solar cell further includes an antireflection layer located on the side of the light-receiving surface of the cell substrate, the antireflection layer being located on the side of the passivation layer and the anti-ultraviolet layer away from the cell substrate.

[0015] In one embodiment, the antireflection layer is selected from two or more stacked films of silicon nitride, silicon oxynitride, and silicon oxide, and the antireflection layer includes at least one silicon oxide layer.

[0016] In one embodiment, the antireflective layer away from the battery substrate is a silicon oxide layer to improve UV protection.

[0017] In one embodiment, the antireflection layer comprises a silicon oxynitride layer, a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer in the direction away from the battery substrate.

[0018] In one embodiment, the thickness of the silicon oxide layer is 0.1 nm to 5 nm; and / or, the antireflection layer includes a silicon oxynitride layer with a thickness of 10 nm to 50 nm and a refractive index of 1.7 to 2.0; and / or, the antireflection layer includes a silicon nitride layer with a thickness of 10 nm to 70 nm and a refractive index of 1.9 to 2.3.

[0019] In one embodiment, the solar cell further includes a backlight antireflection layer and a backlight electrode located on the backlight side of the cell substrate, and a light-receiving electrode located on the light-receiving side of the cell substrate.

[0020] In one embodiment, the battery substrate includes: a silicon substrate; a first doped structure located on the light-receiving surface of the silicon substrate, the first doped structure having the opposite doping type to the silicon substrate; and a second doped structure located on the back-lighting surface of the silicon substrate, the second doped structure having the same doping type as the silicon substrate.

[0021] In one embodiment, the silicon substrate is an N-type silicon wafer, the first doping structure is a boron diffusion layer, and the second doping structure includes a tunneling layer located on the back surface of the silicon substrate and a doped polysilicon layer located on the side of the tunneling layer away from the silicon substrate, wherein the doped polysilicon layer is an N-type doped polysilicon layer.

[0022] The beneficial effects of this utility model are: the solar cell of this utility model, by setting an anti-ultraviolet layer on the light-receiving surface of the battery substrate, reflects ultraviolet rays outward, avoiding damage to the passivation performance of the film layer inside the battery substrate, thereby improving the open-circuit voltage of the battery and improving the efficiency and reliability of the battery. Attached Figure Description

[0023] Figure 1 This is a schematic diagram of the structure of a solar cell in one embodiment of the present invention.

[0024] Among them, 100-solar cell, 1-cell substrate, 11-silicon substrate, 12-first doped structure, 13-second doped structure, 131-tunneling layer, 132-doped polycrystalline silicon layer, 2-anti-ultraviolet layer, 3-passivation layer, 4-anti-reflection layer, 5-backlight anti-reflection layer, 6-light-receiving electrode, 7-backlight electrode. Detailed Implementation

[0025] The present invention will now be described in detail with reference to the specific embodiments shown in the accompanying drawings. However, these embodiments do not limit the present invention, and any structural, methodological, or functional modifications made by those skilled in the art based on these embodiments are included within the protection scope of the present invention.

[0026] In the various figures of this utility model, for ease of illustration, some dimensions of the structure or part may be exaggerated relative to other structures or parts. Therefore, they are only used to illustrate the basic structure of the subject matter of this utility model.

[0027] Please refer to Figure 1 As shown, this utility model provides a solar cell 100, including a cell substrate 1, a passivation layer 3 located on the side of the light-receiving surface of the cell substrate 1, and an anti-ultraviolet layer 2.

[0028] The structure of the battery substrate 1 in this invention is not limited. The main difference lies in the application of an anti-ultraviolet layer 2 on the light-receiving surface of the battery substrate 1. This layer reflects ultraviolet rays outwards, preventing them from damaging the passivation properties of the internal film layers of the battery substrate 1, thereby improving the open-circuit voltage, efficiency, and reliability of the battery. The combination of the passivation layer 3 and the ultraviolet layer further enhances the passivation and anti-ultraviolet properties of the light-receiving surface.

[0029] In one embodiment, the battery substrate 1 includes a silicon substrate 11, which may be an N-type or P-type silicon substrate 11; a first doped structure 12 located on the light-receiving surface of the silicon substrate 11; and a second doped structure 13 located on the backlight surface of the silicon substrate 11. The first doped structure 12 has the opposite doping type to the silicon substrate 11, and the second doped structure 13 has the same doping type as the silicon substrate 11; or the first doped structure 12 has the same doping type as the silicon substrate 11, and the second doped structure 13 has the opposite doping type to the silicon substrate 11.

[0030] The solar cell 100 of this invention will be described in detail below, taking an N-type silicon substrate 11, a first doped structure 12 with the opposite doping type to the silicon substrate 11, and a second doped structure 13 with the same doping type as the silicon substrate 11 as examples.

[0031] The silicon substrate 11 is selected from N-type silicon wafers with a resistivity of 0.3 Ω·cm to 7 Ω·cm, preferably 0.5 Ω·cm to 3.5 Ω·cm. Preferably, a textured surface structure 3 is formed on the surface of the silicon substrate 11 to reduce reflectivity, improve light absorption, and thus improve the efficiency of the solar cell 100.

[0032] In one embodiment, the first doped structure 12 is a boron diffusion layer. The diffusion layer is formed by boron diffusion on the light-receiving surface of the silicon substrate 11, constituting a P+ emitter. Specifically, the diffusion concentration is 2E18cm⁻¹. -3 ~5E18cm -3 The sheet resistance is either 250 Ω / sq to 450 Ω / sq. Boron diffusion can be performed using any existing technology, which will not be elaborated here.

[0033] In one embodiment, the second doped structure 13 includes a tunneling layer 131 located on the back surface of the silicon substrate 11 and a doped polysilicon layer 132 located on the side of the tunneling layer 131 away from the silicon substrate 11, wherein the doped polysilicon layer 132 is an N-type doped polysilicon layer.

[0034] The tunneling layer 131 is selected from silicon oxide or silicon oxynitride, and has a thickness of 1 nm to 3 nm, which can be 1.5 nm, 2 nm, or 2.5 nm. The tunneling layer 131 can be deposited using a PECVD process.

[0035] The N-type doped polycrystalline silicon layer is a phosphorus-doped polycrystalline silicon layer. First, a phosphorus-doped amorphous silicon layer is formed, then annealed at 860℃~950℃ to convert it into the doped polycrystalline silicon layer 132, with a doping concentration of 3E20cm⁻¹. -3 ~7E20cm -3 The thickness is 90nm to 120nm.

[0036] The battery substrate 1 has a light-receiving surface and a back-lighting surface, with the light-receiving surface of the battery substrate 1 and the light-receiving surface of the silicon substrate 11 being on the same side. The light-receiving surface receives more sunlight and stronger ultraviolet radiation, which may lead to a larger proportion of hydrogen passivation in the entire passivation system. The Si-H bond energy is relatively weak and is easily broken by ultraviolet light, leading to failure and a decrease in passivation performance, thus increasing the degradation of the battery cell.

[0037] The passivation layer 3 is located on the light-receiving surface of the battery substrate 1 to improve the passivation effect of the light-receiving surface and increase the open-circuit voltage. Specifically, the first doped structure 12 is passivated to reduce interfacial electron recombination.

[0038] In one embodiment, the passivation layer 3 can be selected from an alumina layer, which has a negative charge and can effectively suppress the recombination of minority carriers on the surface, forming a good passivation effect. It can also be processed by ALD process, and the thickness can be precisely controlled.

[0039] The passivation layer 312 has a thickness of 2-7 nm. This thickness range takes into account both the operability and cost advantages of film deposition. It is particularly suitable for deposition at a lower temperature in conventional ALD processes. This ensures that the battery substrate 1 obtains excellent interface passivation and achieves good matching with other film layers. This makes the present invention highly feasible and stable in improving UV attenuation, ensuring the uniformity and integrity of the film layer and improving the passivation effect.

[0040] The UV-resistant layer 2 is located on the side of the passivation layer 3 away from the battery substrate 1, or the UV-resistant layer 2 is located on the side of the passivation layer 3 facing the battery substrate 1. In both configurations, the UV-resistant layer 2 effectively resists UV degradation. The UV-resistant layer 2 can be selected from any ultra-thin silicon oxide (SiO2) or silicon oxynitride (SiONx) material with UV-resistant properties.

[0041] In one embodiment, the UV-resistant layer 2 is a silicon oxide layer. The silicon oxide layer has good UV resistance, can reduce reflection, and can passivate the surface of the battery.

[0042] Preferably, the silicon oxide layer is located between the passivation layer 3 and the battery substrate 1. On one hand, the silicon oxide layer and the passivation layer 3 work synergistically to enhance the chemical passivation of the interface and suppress the impact of ultraviolet light on the interface structure, further reducing the surface recombination rate of the light-receiving surface and reducing the degradation caused by the breaking of Si-H bonds under ultraviolet irradiation, thereby effectively improving the open-circuit voltage and stability of the battery. On the other hand, this embodiment is well compatible with the existing TOPCon process flow, requires no additional equipment, and is suitable for large-scale industrial production.

[0043] In one embodiment, the thickness of the UV-resistant layer 2 is 0.1 nm to 5 nm. By controlling the thickness of the UV-resistant layer 2 within the range of 0.1 nm to 5 nm, the damage of ultraviolet rays to the Si-H bonds at the interface can be effectively suppressed, while avoiding the adverse effects of an excessively thick film layer on optical transmittance and film stress. This achieves superior UV resistance and interface passivation effects with limited increases in process steps. This thickness range is easily achievable in conventional high-temperature thermal oxidation, wet oxidation, or PECVD equipment, making it suitable for large-scale industrial applications.

[0044] This invention enhances the blocking of ultraviolet light by combining the passivation layer 3 and the anti-ultraviolet layer 2 on one side of the light-receiving surface. This helps reduce the Si-H bond breakage and attenuation caused by high-energy ultraviolet rays, thereby improving the overall open-circuit voltage and battery efficiency.

[0045] Based on the above, the solar cell 100 also includes an anti-reflection layer 4 located on the side of the light-receiving surface of the cell substrate 1. The anti-reflection layer 4 is located on the side of the passivation layer 3 and the anti-ultraviolet layer 2 away from the cell substrate 1, reducing surface reflection and improving the absorption efficiency of visible light and infrared light.

[0046] In one embodiment, the antireflection layer 4 is selected from two or more stacked films of silicon nitride, silicon oxynitride, and silicon oxide, and the antireflection layer 4 includes at least one silicon oxide layer. Utilizing the antireflection and UV protection properties of the silicon oxide layer, light absorption is improved while the drawbacks of UV radiation are reduced, thus comprehensively improving battery efficiency. This antireflection layer 4 is organically combined with the original passivation layer 3 and the UV protection layer 2. In addition to retaining the advantages of UV protection and interface passivation, it can also significantly reduce surface reflection, thereby increasing short-circuit current and contributing to better overall photoelectric conversion efficiency.

[0047] In one embodiment, the antireflective layer 4, the layer furthest from the battery substrate 1, is a silicon oxide layer to block ultraviolet radiation on the outermost layer and improve the UV resistance. Specifically, by providing a silicon oxide layer on the outermost layer or on the outermost side of the final stack, the shielding against high-energy ultraviolet light can be further enhanced, reducing its impact on the underlying SiONx, SiNx, and passivation layer 3, thus achieving better UV degradation resistance.

[0048] In one specific embodiment, the antireflection layer 4, moving away from the battery substrate 1, sequentially comprises a silicon oxynitride layer, a silicon nitride layer, another silicon oxynitride layer, and a silicon oxide layer. This multilayered structure can form a gradient refractive index distribution, and includes at least one layer of SiO2 in the outer layer to further assist in blocking ultraviolet rays on top of the existing reduction in light-receiving surface reflection. This multilayered structure not only improves the overall antireflection effect but also better protects the inner passivation layer 3 and the anti-ultraviolet layer 2 from the impact of high-energy ultraviolet photons. This allows for a combination of higher resistance to ultraviolet degradation and better optical gain in large-scale production, making it highly applicable to improving the efficiency and long-term stability of solar cells.

[0049] The thickness of the silicon oxide layer is 0.1 nm to 5 nm. When the antireflective layer 4 includes a silicon oxynitride layer, the thickness of the silicon oxynitride layer is 10 nm to 50 nm, and the refractive index is 1.7 to 2.0. When the antireflective layer 4 includes a silicon nitride layer, the thickness of the silicon nitride layer is 10 nm to 70 nm, and the refractive index is 1.9 to 2.3.

[0050] The combination of this film's refractive index and thickness further reduces reflection losses, thereby increasing short-circuit current while maintaining a high open-circuit voltage. This optimized combination is easy to implement on large-scale production lines, simultaneously achieving high transmittance and enhanced UV blocking, thus enabling the battery to have more stable long-term power generation performance.

[0051] The solar cell 100 also includes a backlight antireflection layer 5 and a backlight electrode 7 located on the backlight side of the cell substrate 1. The backlight electrode 7 passes through the backlight antireflection layer 5 and contacts the second doped structure 13.

[0052] The anti-reflection layer 5 on the back surface adopts any of the anti-reflection layer 4 structures described above, which will not be elaborated further here.

[0053] The solar cell 100 also includes a light-receiving electrode 6 located on the light-receiving surface of the cell substrate 1. The light-receiving electrode 6 passes through the aforementioned film layer of the light-receiving surface and achieves ohmic contact with the first doped structure 12.

[0054] The following also provides a method for fabricating a solar cell, comprising the following steps: providing a cell substrate 1, the cell substrate 1 including a light-receiving surface and a back-lighting surface; fabricating a passivation layer 3 on the side of the light-receiving surface of the cell substrate 1, and fabricating an anti-ultraviolet layer 2 on the side of the light-receiving surface of the cell substrate 1.

[0055] The method for fabricating a solar cell further includes fabricating a cell substrate 1. Fabricating the cell substrate 1 includes: providing a silicon substrate 11, the silicon substrate 11 having a light-receiving surface and a back-lighting surface; fabricating a first doped structure 12 on the light-receiving surface and fabricating a second doped structure 13 on the back-lighting surface.

[0056] The silicon substrate 11 is selected from N-type silicon wafers with a resistivity of 0.3 Ω·cm to 7 Ω·cm, preferably 0.5 Ω·cm to 3.5 Ω·cm. A textured surface is formed on the silicon substrate 11 to reduce reflectivity, increase light absorption, and thus improve the efficiency of the solar cell 100.

[0057] Specifically, the "preparation of the first doped structure 12" involves performing boron diffusion on the light-receiving surface of the silicon substrate 11 to form a boron diffusion layer as the first doped structure 12. The boron diffusion concentration is 2E18cm⁻¹. -3 ~5E18cm -3 The sheet resistance is either 250 Ω / sq to 450 Ω / sq. Boron diffusion can be performed using any existing technology, which will not be elaborated here.

[0058] Specifically, "preparing the first doped structure 12" involves depositing the tunneling layer 131 using a PECVD process. The tunneling layer 131 is selected from a silicon oxide layer or a silicon oxynitride layer, with a thickness of 1 nm to 3 nm, which can be 1.5 nm, 2 nm, or 2.5 nm. The tunneling layer 131 can be formed by depositing using a PECVD process.

[0059] The doped polycrystalline silicon layer 132 is an N-type doped polycrystalline silicon layer, such as a phosphorus-doped polycrystalline silicon layer. First, a phosphorus-doped amorphous silicon layer is formed using a PECVD process, then annealed at 860℃~950℃ to convert it into the doped polycrystalline silicon layer 132, with a doping concentration of 3E20cm⁻¹. -3 ~7E20cm-3 The thickness is 90nm to 120nm.

[0060] The preparation order of the passivation layer 3 and the ultraviolet layer can be interchanged. Therefore, the ultraviolet-resistant layer 2 is located on the side of the passivation layer 3 away from the battery substrate 1, or the ultraviolet-resistant layer 2 is located on the side of the passivation layer 3 facing the battery substrate 1.

[0061] The passivation layer 3 is an aluminum oxide layer, produced using the ALD process, and its thickness can be precisely controlled. The thickness and other parameters of the passivation layer 3 are as described above and will not be repeated here.

[0062] The present invention uses PECVD process to deposit the antireflection layer 4, which is selected from one or more combinations of silicon nitride, silicon oxynitride, and silicon oxide to reduce the reflectivity of the light-receiving surface and improve the light utilization rate.

[0063] Based on the above method, this utility model uses screen printing and sintering processes to form the light-receiving electrode 6 and the backlight electrode 7.

[0064] The fabrication process of this invention is highly compatible with existing TOPCon processes, requiring no additional equipment. It can improve UV degradation while maintaining process simplification and reducing costs. This implementation method can be applied to large-scale production, resulting in solar cells 100 with higher electrical performance and better resistance to UV degradation.

[0065] The following specific embodiment will be used to describe in detail the preparation method and structure of the solar cell of this utility model.

[0066] S1 Double-sided texturing: Uses N-type silicon wafers with resistivity of 0.3Ω·cm~7Ω·cm; utilizes alkali texturing to form a pyramid textured surface, with the pyramid base size ranging from 0.5 to 3μm.

[0067] In this invention, the pyramid base dimension refers to the width dimension of the pyramid base. The projection of the base along the thickness direction of the silicon substrate 11 onto the silicon substrate 11 is a square. The side length of this square is referred to as the pyramid base dimension in the industry.

[0068] S2 Preparation of P+ Emitter: Boron-doped emitters were prepared using high-temperature equipment with a doping concentration of 3E18cm⁻¹. -3 ~3E19cm -3 Sheet resistance is 250-300Ω / sq, preferably 250-280Ω / sq.

[0069] S3 Backlight Polishing: First, the backlight oxide layer (BSG layer) is removed using a single-sided chain machine with hydrofluoric acid. Then, the backlight is alkaline polished to remove edge knots and the boron extension layer around the backlight. Finally, it is cleaned.

[0070] S4 Backlight Tunneling Passivation Structure Preparation: A 1nm-2nm silicon oxide layer is deposited on the backlight surface using PECVD as the tunneling layer 131. Then, a phosphorus-doped amorphous silicon layer or multiple amorphous silicon layers with different doping concentrations are deposited, with a total thickness of 20-120nm, preferably 80-100nm. Finally, a silicon oxide mask is deposited with a mask thickness of 2nm-50nm.

[0071] S5 Annealing Activation: Annealing is performed in a high-temperature annealing furnace at a temperature of 880–980℃, preferably 900–950℃. After annealing, the doped amorphous silicon is transformed into doped polycrystalline silicon, and the doped amorphous silicide is transformed into doped polycrystalline silicide. Phosphorus activation is performed to form a tunneling passivation contact structure on the backlight surface.

[0072] S6 Removal of Silicon Oxide Masking: The silicon oxide mask with edge coating is removed from the light-receiving surface by passing it through a chain-type hydrofluoric acid bath on one side. Then, alkaline etching is used to remove the polysilicon layer with edge coating on the light-receiving surface and the back-light surface. Finally, hydrofluoric acid is used to remove the silicon oxide mask on the light-receiving and back-light surfaces, followed by RCA cleaning.

[0073] S7 Preparation of UV-resistant layer 2: A thin silicon oxide layer, 0.1-5 nm thick, preferably 1-2 nm, is deposited on the light-receiving surface using high temperature or PECVD methods. The high-temperature method uses a temperature of 300-900℃, preferably 500-600℃; the PECVD method uses a temperature of 200-500℃, preferably 350-450℃, to achieve good interface passivation and UV resistance.

[0074] S8 Preparation of passivation layer 3: An aluminum oxide passivation layer 3 is deposited on the light-receiving surface, the back-lighting surface (or only the light-receiving surface) using the ALD method, with a thickness of 2-7 nm, preferably 3-6 nm.

[0075] S9 Preparation of Antireflection Layer 4: Antireflection layer 4 is deposited on the light-receiving and back-light-receiving surfaces using PECVD. The structures of the light-receiving and back-light-receiving surfaces are as follows:

[0076] The antireflection layer 4 on the light-receiving surface is: SiO2+SiONx+SiNx+SiONx, with SiO2 thickness of 0.1-5 nm, SiONx thickness of 10-50 nm and refractive index of 1.7-2.0, and SiNx thickness of 10-70 nm and refractive index of 1.9-2.3.

[0077] The antireflective layer 5 on the back surface is made of SiNx, with a thickness of 50–100 nm and a refractive index of 1.8–2.5.

[0078] S10, Screen-printed metal electrodes: Metal electrodes are printed on the light-receiving and back-light-receiving surfaces by screen printing, and then sintered and light-injected or electro-injected to form the light-receiving electrode 6 and the back-light-receiving electrode 7.

[0079] S11. Testing and sorting: Testing, sorting, and warehousing the solar cells.

[0080] It should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This way of describing the specification is only for clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

[0081] The detailed descriptions listed above are merely specific descriptions of feasible implementations of this utility model, and are not intended to limit the scope of protection of this utility model. All equivalent implementations or modifications made without departing from the spirit of this utility model should be included within the scope of protection of this utility model.

Claims

1. A solar cell, characterized by, The solar cell comprises: a battery base body having a light receiving surface and a back light surface; a passivation layer on the side of the light receiving surface of the battery base body; an anti-ultraviolet layer on the side of the passivation layer away from the battery base body, or on the side of the passivation layer towards the battery base body.

2. The solar cell of claim 1, wherein: The anti-ultraviolet layer is a silicon oxide layer; and / or the silicon oxide layer is located between the passivation layer and the battery base body, and / or the thickness of the anti-ultraviolet layer is 0.1nm-5nm.

3. The solar cell of claim 1, wherein: The passivation layer is an aluminum oxide layer, and / or the thickness of the passivation layer is 2-7nm.

4. The solar cell of claim 1, wherein: The solar cell further comprises an anti-reflection layer on the side of the light receiving surface of the battery base body, which is located on the side of the passivation layer and the anti-ultraviolet layer away from the battery base body.

5. The solar cell of claim 4, wherein: The anti-reflection layer is selected from two or more stacked films of silicon nitride, silicon oxynitride, and silicon oxide, and at least one layer of the anti-reflection layer comprises a silicon oxide layer.

6. The solar cell of claim 5, wherein: The layer of the anti-reflection layer away from the battery base body is a silicon oxide layer to improve the anti-ultraviolet effect; Or, in the direction away from the battery base body, the anti-reflection layer comprises a silicon oxynitride layer, a silicon nitride layer, a silicon oxynitride layer, and a silicon oxide layer.

7. The solar cell of claim 5, wherein: The thickness of the silicon oxide layer is 0.1nm-5nm; and / or the anti-reflection layer comprises a silicon oxynitride layer, the thickness of the silicon oxynitride layer is 10nm-50nm, and the refractive index is 1.7-2.0; and / or the anti-reflection layer comprises a silicon nitride layer, the thickness of the silicon nitride layer is 10nm-70nm, and the refractive index is 1.9-2.

3.

8. The solar cell of claim 1, wherein: It also comprises a back light surface anti-reflection layer on the back light surface of the battery base body and a back light surface electrode, and a light receiving surface electrode on the light receiving surface of the battery base body.

9. The solar cell according to any one of claims 1 to 8, characterized in that: The battery base body comprises: a silicon substrate; a first doping structure on the light receiving surface of the silicon substrate, the doping type of the first doping structure being opposite to that of the silicon substrate; a second doping structure on the back light surface of the silicon substrate, the doping type of the second doping structure being the same as that of the silicon substrate.

10. The solar cell of claim 9, wherein: The silicon substrate is an N-type silicon wafer, the first doping structure is a boron diffusion layer, and the second doping structure comprises a tunneling layer on the back light surface of the silicon substrate, and a doped polysilicon layer on the side of the tunneling layer away from the silicon substrate, the doped polysilicon layer being an N-type doped polysilicon layer.

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