High-voltage discharge pack
By designing the signal generation, boosting, and sampling circuits of the three-channel discharge device, the problem of inaccurate discharge intensity control in high-voltage discharge products was solved, achieving uniform distribution and precise adjustment of arc intensity, and improving the stability and applicability of the product.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-02
- Publication Date
- 2026-03-20
AI Technical Summary
Existing high-voltage discharge products cannot accurately control the discharge arc intensity of each circuit, making it difficult to meet the usage requirements in different scenarios.
A three-channel discharge device is adopted, each channel including a signal generation circuit, a boost circuit, a discharge circuit and a sampling circuit. The signal generation circuit generates a pulse signal, the boost circuit increases the voltage, the discharge circuit forms an electric arc, and the sampling circuit detects the discharge state, thereby achieving precise control of the discharge intensity.
It achieves uniform distribution and precise adjustment of the intensity of the three discharge arcs, improving the stability and applicability of high-voltage discharge products.
Smart Images
Figure CN224021235U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to circuit technical field, especially relates to a high voltage discharge package. BACKGROUND
[0002] In the high voltage discharge technical field, with the wide application of various electronic equipment, the performance and stability of high voltage discharge device are increasingly improved.
[0003] At present, the same type high voltage discharge product in market mainly produces different frequency high voltage electricity based on two way transformer, through the specific circuit design, makes three different discharge loops between these high voltage electricity and ground, this design principle realizes a plurality of discharge modes to a certain extent, to meet the use demand under different scenes.
[0004] However, when three discharge loops between two way transformer and ground are formed, the discharge arc intensity of each loop cannot be controlled, and the intensity of discharge arc cannot be accurately adjusted.
[0005] Therefore, how to accurately control the discharge intensity of high voltage discharge product becomes a key technical problem to be solved in the field. UTILITY MODEL CONTENTS
[0006] The main purpose of the utility model is to provide a high voltage discharge package, which aims to solve the technical problem of how to accurately control the discharge intensity of high voltage discharge product.
[0007] To achieve the above purpose, the high voltage discharge package provided by the utility model comprises three discharge devices, and any one of the discharge devices comprises:
[0008] A signal generating circuit is used to generate a pulse signal.
[0009] A voltage boosting circuit is connected to the signal generating circuit and is used to accept the driving of the pulse signal and improve the voltage of the pulse signal.
[0010] A discharge circuit is connected to the voltage boosting circuit and is used to receive the boosted pulse signal and form an arc on the electrode of the high voltage discharge package.
[0011] A sampling circuit is connected to the discharge circuit and is used to collect the discharge state of the discharge circuit.
[0012] In an embodiment, the signal generating circuit comprises a signal driving chip.
[0013] The signal driving chip is used to receive the input driving signal and generate a pulse signal.
[0014] In an embodiment, the signal generating circuit further comprises an external capacitor;
[0015] The first end of the external capacitor is connected to the high-side bootstrap power supply of the signal driving chip, and the second end is connected to the high-side source of the signal driving chip.
[0016] The external capacitor is used to provide a floating power supply.
[0017] In an embodiment, the boost circuit comprises a first MOS tube, a second MOS tube and a transformer.
[0018] The gate of the first MOS tube is connected to the high-side output end of the signal driving chip, the source is connected to the first end of the transformer, and the drain is grounded.
[0019] The gate of the second MOS tube is connected to the low-side output end of the signal driving chip, the drain is connected to the first end of the transformer, and the source is grounded.
[0020] The second end of the transformer is grounded.
[0021] In an embodiment, a non-polar capacitor is connected between the drain of the first MOS tube and the ground, and the non-polar capacitor is used to reduce electromagnetic interference.
[0022] In an embodiment, the boost circuit further comprises:
[0023] A polar capacitor connected in parallel with the non-polar capacitor, used to smooth the voltage change of the drain.
[0024] In an embodiment, the discharge circuit comprises a parallel capacitor group and a parallel diode group, the parallel capacitor group is used for filtering, and the parallel diode group is used for rectification and for preventing reverse current shock.
[0025] In an embodiment, the sampling circuit comprises a voltage dividing resistor for voltage dividing the current.
[0026] In an embodiment, the phase adjustment range of the three pulse signals is 0 to 360 degrees.
[0027] In an embodiment, when the amplitudes of the three pulse signals are equal and the phase difference is 120 degrees, the arc intensity of the three discharge devices is uniformly distributed.
[0028] The technical scheme of the utility model discloses three high-voltage arcs are generated through three discharge devices, pulse signals are generated through a signal generating circuit in each discharge device, then the pulse signals are boosted through a voltage boosting circuit, then an arc is formed on an electrode through a discharge circuit to discharge, the discharge state of the circuit can be directly detected through a sampling circuit, the discharge intensity of the three arcs can be controlled by adjusting the voltage of the signal generating circuit. BRIEF DESCRIPTION OF DRAWINGS
[0029] In order to more clearly illustrate the technical scheme in the embodiments of the utility model or the prior art, the drawings needed to be used in the embodiment or the prior art description will be briefly introduced below, and obviously, the drawings in the following description are only some embodiments of the utility model, and other drawings can be obtained according to the structure shown in the drawings without creative labor for those skilled in the art.
[0030] Figure 1 The utility model provides the whole frame schematic diagram of one embodiment of high voltage discharge package,
[0031] Figure 2 The utility model provides the structure schematic diagram of signal generating circuit related to one embodiment of high voltage discharge package,
[0032] Figure 3 The utility model provides the structure schematic diagram of voltage boosting circuit related to one embodiment of high voltage discharge package,
[0033] Figure 4 The utility model provides the transformer schematic diagram of voltage boosting circuit related to one embodiment of high voltage discharge package,
[0034] Figure 5 The utility model provides the structure schematic diagram of voltage boosting circuit and sampling circuit related to one embodiment of high voltage discharge package.
[0035] EXPLANATION OF DRAWINGS:
[0036] 10, signal generating circuit, U1, signal drive chip, C1, external capacitor,
[0037] 20, voltage boosting circuit, Q1, first MOS tube, Q2, second MOS tube, U2, transformer, C2, non-polarity capacitor, C3, polarity capacitor,
[0038] 30, discharge circuit, C4 to C8, first capacitor to fifth capacitor, D1 to D5, first diode to fifth diode,
[0039] 40, sampling circuit, R1, voltage dividing resistor.
[0040] The purposes, functional features and advantages of the utility model will be further explained in combination with embodiments and with reference to the drawings. DETAILED DESCRIPTION
[0041] The technical solutions in the embodiments of the utility model will be clearly and completely described below in combination with the drawings in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, rather than all the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by those skilled in the art without creative labor fall within the protection scope of the utility model.
[0042] It should be noted that if the embodiments of the utility model involve directional indications (such as up, down, left, right, front, back, etc.), the directional indications are only used to explain the relative position relationship, movement condition, etc. between components in a certain posture, and if the certain posture changes, the directional indications also change accordingly.
[0043] In addition, if the embodiments of the utility model involve descriptions such as "first", "second", etc., the descriptions of "first", "second", etc. are only for description purposes, and cannot be understood as indicating or implying the relative importance or implicitly indicating the number of indicated technical features. Therefore, the features with "first" and "second" can explicitly or implicitly include at least one feature. In addition, if "and / or" or "and / or" appears in the entire text, it means that the three parallel schemes are included, for example, "A and / or B" includes A scheme, or B scheme, or A and B simultaneously satisfy the scheme. In addition, the technical solutions of each embodiment can be combined with each other, but it must be based on the realization of the ordinary skill in the art, and when the combination of technical solutions appears contradictory or unachievable, it should be considered that the combination of technical solutions does not exist, and is not within the protection scope required by the utility model.
[0044] The utility model provides a kind of high-voltage discharge package.
[0045] Please refer to Figure 1 In an embodiment of the utility model, the high-voltage discharge package includes three discharge devices, and any one of the discharge devices includes:
[0046] A signal generating circuit 10 for generating a pulse signal;
[0047] A boost circuit 20, the boost circuit 20 is connected to the signal generating circuit 10, for accepting the driving of the pulse signal, improves the voltage of the pulse signal;
[0048] A discharging circuit 30 is connected to the voltage-boosting circuit 20, and is configured to receive the boosted pulse signal and form an arc on the electrodes of the high-voltage discharge package.
[0049] A sampling circuit 40 is connected to the discharging circuit 30, and is configured to collect the discharging state of the discharging circuit 30.
[0050] In the embodiment, the high-voltage discharge package has a structure including three independent discharging devices, each of which has complete signal processing and discharging functions, and the specific structure is as follows:
[0051] The signal generation circuit 10 generates a pulse signal with a specific frequency, duty cycle and amplitude through a built-in oscillator or waveform generator, and the output signal has low voltage and high frequency characteristics, serving as the driving basis for subsequent circuits.
[0052] The voltage-boosting circuit 20 is connected to the signal generation circuit 10, and is configured to convert the input high-frequency pulse signal into a high-voltage pulse.
[0053] The discharging circuit 30 is connected to the output end of the voltage-boosting circuit 20, and is configured to guide the boosted high-voltage pulse to the electrode gap through the on and off of the control switch, form a stable arc channel when the electrode electric field intensity exceeds the air breakdown threshold, and realize the release of energy to the external load or space.
[0054] The sampling circuit 40 is connected to the key nodes of the discharging circuit 30, and is configured to monitor the discharging current, voltage waveform and arc state parameters in real time. The collected signals can be transmitted to the control unit after analog-to-digital conversion, and are used for closed-loop feedback regulation or state diagnosis.
[0055] Specifically, in a possible implementation, the signal generation circuit 10 includes a signal driving chip U1.
[0056] The signal driving chip U1 is configured to receive an input driving signal and generate a pulse signal.
[0057] In the embodiment, the signal driving chip U1 receives an external input driving signal (such as a square wave, a PWM signal or a digital control signal), converts it into a high-frequency pulse signal through an internal oscillator, a timer or a waveform generator module, and the parameters (frequency, duty cycle and amplitude) of the output pulse signal can be programmed and adjusted through an external configuration interface (such as SPI, I2C or a resistance voltage division network).
[0058] In addition, the chip has overcurrent protection, overheat shutdown and undervoltage lock functions, which ensure the stability and safety of signal generation.
[0059] Specifically, in a possible implementation, please refer toFigure 2 The signal generating circuit 10 further comprises an external capacitor C1;
[0060] A first end of the external capacitor C1 is connected to a high-side bootstrap power supply of the signal driving chip U1, and a second end of the external capacitor C1 is connected to a high-side source of the signal driving chip U1.
[0061] The external capacitor C1 is configured to provide a floating power supply.
[0062] In the embodiment, the first end of the external capacitor C1 is connected to a high-side bootstrap power supply pin (HB pin) of the signal driving chip U1, and the second end of the external capacitor C1 is connected to a high-side source pin (HS pin) of the signal driving chip U1.
[0063] In the working process of the chip, the external capacitor C1 stores charges through a bootstrap mechanism, provides a floating power supply for a high-side driving circuit, ensures that a gate voltage of a high-side switching device is higher than a source voltage, and maintains a conduction state.
[0064] The capacitance is selected according to a driving frequency and a load current demand, and a typical value is 10 nF to 100 nF. The withstand voltage value needs to be higher than an output voltage of the boost circuit 20.
[0065] Exemplarily, referring to Figure 2 The signal generating circuit 10 further comprises two voltage stabilizing capacitors which are connected in parallel between a positive power supply pin of the signal driving chip U1 and the ground. The positive power supply pin is further connected to an external power supply to supply power for the signal driving chip U1. A low-side input pin and a high-side input pin of the signal driving chip U1 are respectively connected to external signal sources.
[0066] Specifically, in a feasible implementation, referring to Figure 3 and Figure 4 The boost circuit 20 comprises a first MOS transistor Q1, a second MOS transistor Q2 and a transformer U2.
[0067] A gate of the first MOS transistor Q1 is connected to a high-side output end of the signal driving chip U1, a source of the first MOS transistor Q1 is connected to a first end of the transformer U2, and a drain of the first MOS transistor Q1 is grounded.
[0068] A gate of the second MOS transistor Q2 is connected to a low-side output end of the signal driving chip U1, a drain of the second MOS transistor Q2 is connected to the first end of the transformer U2, and a source of the second MOS transistor Q2 is grounded.
[0069] A second end of the transformer U2 is grounded.
[0070] In the embodiment, referring to Figure 3The gate of the first MOS tube Q1 is connected to the high-side output end of the signal driving chip U1, the source is connected to the first end of the primary winding of the transformer U2, and the drain is grounded. The first MOS tube Q1 works in a high-side configuration, and the gate-source voltage difference is maintained by a bootstrap power supply to realize high-voltage side switch control.
[0071] The gate of the second MOS tube Q2 is connected to the low-side output end of the signal driving chip U1, the drain is connected to the first end of the primary winding of the transformer U2, and the source is grounded. The second MOS tube Q2 works in a low-side configuration, and is complementary to the first MOS tube Q1 to form a push-pull driving structure.
[0072] Please refer to Figure 4 The first end of the primary winding of the transformer U2 is the common connection point of the first MOS tube Q1 and the second MOS tube Q2, and the second end is grounded. The secondary winding of the transformer U2 boosts the pulse voltage on the primary side to the target amplitude through electromagnetic induction.
[0073] Specifically, in a possible implementation, a non-polar capacitor C2 is connected between the drain of the first MOS tube Q1 and the ground, and the non-polar capacitor C2 is used to reduce electromagnetic interference.
[0074] The boost circuit 20 further includes:
[0075] A polar capacitor C3 is connected in parallel with the non-polar capacitor C2, and is used to smooth the voltage change of the drain.
[0076] In this embodiment, the polar capacitor C3 and the non-polar capacitor C2 are connected in parallel between the drain of the first MOS tube Q1 and the ground. The non-polar capacitor C2 is connected in parallel between the drain of the first MOS tube Q1 and the ground, forms a low-impedance high-frequency path, absorbs the spike voltage and high-frequency noise generated in the switching process of the MOS tube, reduces the radiation interference, and can reduce the voltage stress and loss in the switching process of the MOS tube by suppressing the oscillation of the drain voltage, improve the overall efficiency of the boost circuit 20, reduce the interference of high-frequency noise on the signal driving chip U1 and the secondary winding of the transformer U2, and reduce the mis-triggering or arc instability phenomenon.
[0077] The polar capacitor C3 can absorb low-frequency voltage fluctuations (such as ripples) generated in the switching process of the MOS tube through its large-capacity energy storage characteristics, smooth the voltage change of the drain, reduce the impact of voltage spikes on the transformer U2 and subsequent circuits, provide local energy buffer when the duty cycle of the high-frequency pulse signal changes or the load is in transient response, and maintain the stability of the input voltage of the boost circuit 20, and improve the dynamic performance of the system.
[0078] Specifically, in a possible implementation, please refer to Figure 5The discharge circuit 30 comprises a parallel capacitor group for filtering and a parallel diode group for rectifying and preventing reverse current impact.
[0079] In the embodiment, the parallel capacitor group and the parallel diode group comprise a plurality of capacitors and diodes, in an example, refer to Figure 5 The first group of three capacitors (C4-C6) are connected in series at one end to the first output end of the transformer U2 and at the other end to the discharge electrode, and the second group of two capacitors (C7, C8) are connected in series at one end to the second output end of the transformer U2 and at the other end to the discharge electrode, the first group of capacitors and the second group of capacitors are connected in parallel and a plurality of rectifier diodes (D1-D5) are connected therebetween.
[0080] Specifically, in a feasible implementation, the sampling circuit 40 comprises a voltage dividing resistor R1 for voltage dividing the current.
[0081] In the embodiment, refer to Figure 5 The first end of the voltage dividing resistor R1 is connected to the second output end of the transformer U2 and the second end is grounded, and the voltage output by the transformer U2 can be detected by detecting the first end of the voltage dividing resistor R1, thereby detecting the discharge arc strength of the discharge device.
[0082] Specifically, in a feasible implementation, the phase adjustment range of the three pulse signals is 0-360 degrees.
[0083] When the amplitudes of the three pulse signals are equal and the phase difference is 120 degrees, the arc strengths of the three discharge devices are uniformly distributed.
[0084] In the embodiment, the phase adjustment range of the three pulse signals is 0-360 degrees, and precise control can be achieved by a signal driving chip U1 or an external control module (such as DSP, FPGA), when the amplitudes of the three pulse signals are equal and the phase difference is 120 degrees, the arc strengths of the three discharge devices are uniformly distributed.
[0085] Specifically, in an example, three-way pulse signals act on the high-frequency transformer U2, and three-way high-frequency high-voltage electricity V1=A1*sin(W*t+φ1), V2=A2*sin(W*t+φ2), V3=A3*sin(W*t+φ3) (where Ax is amplitude related, W is period related, and φx is phase related) is generated, and three-way discharge arcs Varc1=V1-V2=A1*sin(W*t+φ1)-A2*sin(W*t+φ2)=Aarc1*sin(W*t+φarc1) (where Aarc1 is related to A1, A2, φ1, and φ2; and φarc1 is related to A1, A2, φ1, and φ2) can be obtained. Similarly, the other two discharge arcs Varc2=Aarc2*sin(W*t+φarc2) and Varc3=Aarc3*sin(W*t+φarc3) can be obtained. The values of Aarc1, Aarc2, and Aarc3 in the above expressions are the magnitudes of the discharge strength. After the frequency and power supply voltage of the high-frequency transformer U2 are determined, A1, A2, and A3 in the above expressions are fixed values, and different values of Aarc1, Aarc2, and Aarc3 can be obtained by adjusting the values of φ1, φ2, and φ3. In particular, when A1=A2=A3 and φ1=φ2=φ3=120°, Aarc1=Aarc2=Aarc3 can be obtained.
[0086] The technical scheme of the utility model adopts three-way discharge devices to generate three-way high-voltage arcs, each discharge device generates a pulse signal through a signal generating circuit 10, then boosts the voltage through a voltage boosting circuit 20, and then forms an arc on an electrode through a discharge circuit 30 to discharge, the discharge state of the circuit can be directly detected through a sampling circuit 40, and the discharge strength of the three-way discharge arcs can be controlled by adjusting the voltage of the signal generating circuit 10.
[0087] The above is only an exemplary embodiment of the utility model, and does not limit the patent range of the utility model, and any equivalent structural transformation or direct / indirect application in other related technical fields under the technical concept of the utility model is included in the patent protection range of the utility model.
Claims
1. A high-voltage discharge package, characterized in that, The high-voltage discharge package includes three discharge devices, and any one of the discharge devices includes: Signal generating circuit, used to generate pulse signals; A boost circuit, connected to the signal generation circuit, is used to receive the drive of the pulse signal and increase the voltage of the pulse signal; A discharge circuit, connected to the boost circuit, is used to receive the boosted pulse signal and form an electric arc on the electrodes of the high-voltage discharge pack. A sampling circuit, connected to the discharge circuit, is used to collect the discharge state of the discharge circuit.
2. The high-voltage discharge pack as described in claim 1, characterized in that, The signal generation circuit includes: a signal driving chip; The signal driving chip is used to receive the input driving signal and generate a pulse signal.
3. The high-voltage discharge pack as described in claim 2, characterized in that, The signal generating circuit also includes: an external capacitor; The first end of the external capacitor is connected to the high-side bootstrap power supply of the signal driver chip, and the second end is connected to the high-side source of the signal driver chip. The external capacitor is used to provide a floating power source.
4. The high-voltage discharge pack as described in claim 3, characterized in that, The boost circuit includes: a first MOSFET, a second MOSFET, and a transformer; The gate of the first MOS transistor is connected to the high-side output terminal of the signal driving chip, the source is connected to the first terminal of the transformer, and the drain is grounded. The gate of the second MOS transistor is connected to the low-side output terminal of the signal driving chip, the drain is connected to the first terminal of the transformer, and the source is grounded. The second terminal of the transformer is grounded.
5. The high-voltage discharge pack as described in claim 4, characterized in that, A non-polar capacitor is connected between the drain of the first MOS transistor and ground. The non-polar capacitor is used to reduce electromagnetic interference.
6. The high-voltage discharge pack as described in claim 5, characterized in that, The boost circuit also includes: A polarized capacitor, connected in parallel with the non-polarized capacitor, is used to smooth voltage changes at the drain electrode.
7. The high-voltage discharge pack as described in claim 6, characterized in that, The discharge circuit includes a parallel capacitor bank and a parallel diode bank. The parallel capacitor bank is used for filtering, and the parallel diode bank is used for rectification and to prevent reverse current surges.
8. The high-voltage discharge pack as described in claim 7, characterized in that, The sampling circuit includes a voltage divider resistor, which is used to divide the current.
9. The high-voltage discharge package as described in claim 1, characterized in that, The phase adjustment range of the three pulse signals is 0 to 360 degrees.
10. The high-voltage discharge pack as described in claim 9, characterized in that, When the amplitudes of the three pulse signals are equal and the phase difference is 120 degrees, the arc intensity of the three discharge devices is uniformly distributed.