Epitaxial wafer for improving current expansion

Abstract

The utility model discloses an epitaxial wafer for improving current expansion, and belongs to the technical field of LEDs. According to the utility model, the GaN layer, the AlN layer and the AlGaN layer in the electron barrier layer can improve the problem of unbalanced carrier injection caused by low hole ionization rate of the traditional p-type material in the LED; two-dimensional electron gas can be formed at the interface of the LaAlO3 layer and the SrTiO3 layer, carrier distribution can be optimized through reasonable regulation and control, holes of the P layer can move towards a quantum well more uniformly, and better current expansion is formed to improve the luminous efficiency.

Description

Technical Field

[0001] This utility model relates to the field of LED technology, specifically to an epitaxial wafer that enhances current extension. Background Technology

[0002] LED chips are light-emitting semiconductor electronic components widely used in lighting and other fields. LED epitaxial wafers are solid-state light sources, light-emitting devices made using semiconductor PN junctions. When a forward current is applied, electrons and holes in the semiconductor recombine, releasing energy as photons or partially as photons. LED epitaxial wafer lighting has significant advantages such as high efficiency, energy saving, environmental friendliness, and long lifespan, and has been widely used in streetlights, displays, indoor lighting, and automotive lighting, among other applications.

[0003] Luminous efficacy is the most important metric for the competitiveness of LED epitaxial wafers. Improving the luminous efficacy of LED epitaxial wafers based on existing technology is a perennial topic for enhancing their competitiveness. Furthermore, current LED products have high requirements for current spread. Under applied current, current congestion can easily lead to increased chip voltage or even burnout. Better current spread is needed to alleviate current congestion and improve the imbalance of carrier injection in LEDs. Utility Model Content

[0004] The technical problem to be solved by this utility model is to overcome the shortcomings of the prior art and provide an epitaxial wafer that improves current spread. The GaN, AlN and AlGaN layers in its electron blocking layer can improve the carrier injection imbalance problem caused by the low hole ionization rate of traditional p-type materials in LEDs. Moreover, a two-dimensional electron gas can be formed at the interface of the LaAlO3 and SrTiO3 layers. Reasonable control can optimize the carrier distribution, which is conducive to the more uniform movement of holes in the P layer into the quantum well, forming better current spread and improving luminous efficiency.

[0005] The technical solution of this utility model is as follows:

[0006] The epitaxial wafer for improving current expansion comprises, from bottom to top, a substrate, a buffer layer, an undoped GaN layer, an N-type GaN layer, a stress relief layer, a multiple quantum well layer, an electron blocking layer, and a P-type semiconductor layer; wherein, the electron blocking layer is composed of, from bottom to top, a GaN layer, an AlN layer, an AlGaN layer, a LaAlO3 layer, and a SrTiO3 layer.

[0007] Preferably, the electron blocking layer is doped with Mg at a concentration of 1×10⁻⁶. 18 -5×10 19 atoms / cm 3 .

[0008] Preferably, the substrate is a sapphire substrate, a Si substrate or a SiC substrate.

[0009] Preferably, the thickness of the undoped GaN layer is 1-3 μm.

[0010] Preferably, the thickness of the N-type doped GaN layer is 1.5-3 μm.

[0011] Preferably, the doping element of the N-type doped GaN layer is Si, and the doping concentration of Si is 1×10 17 -5×10 20 atoms / cm 3 .

[0012] Preferably, the thickness of the stress release layer is 50-100 nm.

[0013] Preferably, the multi-quantum well layer is an InGaN / GaN quantum well layer with a thickness of 150-250 nm.

[0014] Preferably, in the electron blocking layer, the thickness of the GaN layer is 10-30 nm, the thickness of the AlN layer is 1-10 nm, and the thickness of the AlGaN layer is 10-20 nm; the thickness of the LaAlO3 layer is 5-20 nm, and the thickness of the SrTiO3 layer is 1-10 nm.

[0015] Preferably, the P-type semiconductor layer is a composite layer of a P-type GaN layer and a P-type contact layer, and the P-type contact layer is an InGaN layer doped with Mg; the doping element is Mg, the doping concentration of Mg in the P-type GaN layer is 3×10 19 -3×10 20 atoms / cm 3 , the thickness is 30-120 nm, and the doping concentration of Mg in the P-type contact layer is 8×10 19 -8×10 20 atoms / cm 3 , the thickness is 10-30 nm.

[0016] Compared with the prior art, the utility model has the following beneficial effects:

[0017] The epitaxial wafer for improving current expansion has an electronic barrier layer which is composed of GaN layer, AlN layer, AlGaN layer, LaAlO3 layer and SrTiO3 layer from bottom to top, and can form a double-layer two-dimensional electron gas channel. The GaN layer, AlN layer and AlGaN layer heterostructure material system has the advantages of wide band gap, high breakdown field strength, high electron saturation drift speed, high thermal conductivity and stable chemical properties of GaN material, and also has a large band step difference and a strong polarization effect. Two-dimensional electron gas conduction channels can be generated in the heterojunction interface through polarization stress, the donor carrier concentration is improved, the ability of electron injection into the active area is enhanced, and the imbalance of carrier injection caused by low hole ionization rate of traditional p-type material in the LED is improved. The two-dimensional electron gas can also be formed at the interface of the LaAlO3 layer and the SrTiO3 layer, the carrier distribution can be optimized through reasonable control, the holes in the P layer can move more uniformly to the quantum well, and better current expansion is formed to improve the light efficiency. BRIEF DESCRIPTION OF DRAWINGS

[0018] Figure 1 It is a structure schematic view of the epitaxial wafer for improving current expansion of the utility model.

[0019] In the figure, 100, substrate; 200, buffer layer; 300, undoped GaN layer; 400, N-type GaN layer; 500, stress release layer; 600, multi-quantum well layer; 700, electronic barrier layer; 711, GaN layer; 712, AlN layer; 713, AlGaN layer; 721, LaAlO3 layer; 722, SrTiO3 layer; 800, P-type semiconductor layer. DETAILED DESCRIPTION

[0020] In order to enable the personnel in the technical field to better understand the technical scheme in the utility model, the technical scheme of the utility model will be clearly and completely described below in combination with the embodiments of the utility model.

[0021] As Figure 1 shown, the epitaxial wafer for improving current expansion of the following embodiments includes substrate, buffer layer, undoped GaN layer, N-type GaN layer, stress release layer, multi-quantum well layer, electronic barrier layer and P-type semiconductor layer from bottom to top; wherein the electronic barrier layer is composed of GaN layer, AlN layer, AlGaN layer, LaAlO3 layer and SrTiO3 layer from bottom to top.

[0022] The preparation method of the epitaxial wafer for improving current expansion of the following embodiments comprises the following steps:

[0023] S1, prepare the substrate, the material can be sapphire, Si substrate or SiC substrate;

[0024] S2 growing a buffer layer on the substrate: first, a PVD method is used to deposit an AlN film layer with a thickness of 10-30 nm, then in a MOCVD device, hydrogen is introduced for cleaning the surface of the substrate under high temperature and low pressure, and then the temperature is reduced to 500-650 ℃ to grow a buffer layer;

[0025] S3 in-situ annealing treatment under a hydrogen atmosphere;

[0026] S4 growing an undoped GaN layer on the buffer layer: growing an undoped GaN layer in a MOCVD device, specifically, during the growth of the undoped GaN layer, the growth temperature is controlled to be 950-1150 ℃, the pressure is 50-500 torr, and finally an undoped GaN layer with a thickness of 1-3 μm is deposited;

[0027] S5 growing an N-type GaN layer on the undoped GaN layer: growing an N-type GaN layer in a MOCVD device, controlling the temperature in the MOCVD reaction chamber to be 1080-1180 ℃, the pressure to be 100-450 torr, and finally depositing an N-type doped GaN layer with a thickness of 1.5-3 μm, the doping element of the N-type GaN layer is Si, and the doping concentration of Si is 1×10 17 -1×10 20 atoms / cm 3 ;

[0028] S6 growing a stress release layer on the N-type GaN layer: adjusting the reaction chamber temperature to 750-950 ℃, controlling the reaction chamber pressure to be 100-500 torr, and growing a stress release layer with a thickness of 50-100 nm;

[0029] S7 growing a multi-quantum well layer on the low-temperature stress release layer: controlling the reaction chamber temperature to be 750-950 ℃, controlling the reaction chamber pressure to be 100-500 torr, and growing a multi-quantum well layer with 10-15 periods, the multi-quantum well layer is an InGaN / GaN quantum well layer with a total thickness of 150-250 nm, which is alternately grown by GaN quantum barriers and InGaN quantum wells;

[0030] S8 growing an electron blocking layer on the multi-quantum well layer in sequence: the electron blocking layer is composed of GaN layer, AlN layer, AlGaN layer, LaAlO3 layer, and SrTiO3 layer from bottom to top, the thickness of the GaN layer is 10-30 nm, the thickness of the AlN layer is 1-10 nm, the thickness of the AlGaN layer is 10-20 nm, the thickness of the LaAlO3 layer is 5-20 nm, and the thickness of the SrTiO3 layer is 1-10 nm; the doping element of the electron blocking layer is Mg, and the doping concentration of Mg is 1×10 18 -5×10 19 atoms / cm3 Growth temperature 900-1000℃, growth pressure 100-260 torr;

[0031] S9 grows a P-type semiconductor layer sequentially on the electron blocking layer: the P-type semiconductor layer is a composite layer of sequentially deposited P-type GaN layer and P-type contact layer, wherein the P-type GaN layer is a Mg-doped GaN layer with a Mg doping concentration of 3 × 10⁻⁶. 19 -3×10 20 atoms / cm 3 The thickness is 30-120 nm, the growth temperature is 900-1000℃, and the growth pressure is 150-600 torr; the p-type contact layer is a Mg-doped InGaN layer with a Mg doping concentration of 8 × 10⁻⁶. 19 -8×10 20 atoms / cm 3 The thickness is 10-30 nm, the growth temperature is 900-1000℃, and the growth pressure is 200-600 torr;

[0032] After the S10 epitaxial structure growth is completed, the temperature of the reaction chamber is lowered and annealed in a nitrogen atmosphere at a temperature of 650-850℃ for 1-10 minutes. The epitaxial growth is then completed by cooling to room temperature.

[0033] Example 1

[0034] The method for fabricating the current-enhancing epitaxial wafer in this embodiment is as follows:

[0035] S1 prepares a sapphire substrate 100;

[0036] S2. A buffer layer 200 is grown on substrate 100: Specifically, an AlN thin film is first deposited using PVD. During the growth of the AlN thin film, the growth temperature is controlled at 600℃, the sputtering power is 4000W, and the pressure is 8 Torr, ultimately depositing a 20nm AlN buffer layer. Subsequently, in an MOCVD device, hydrogen gas is introduced at 1050℃ and 100 Torr to clean the surface of substrate 100, and then the temperature is lowered to 600℃ and the pressure is 600 Torr to grow the buffer layer.

[0037] S3 was subjected to in-situ annealing in a hydrogen atmosphere at a temperature of 1050°C and a pressure of 200 torr.

[0038] S4. An undoped GaN layer 300 is grown on the buffer layer 200: The undoped GaN layer 300 is grown in an MOCVD apparatus, with the growth temperature controlled at 950°C and the pressure at 200 torr, and a 1.5 μm undoped GaN layer is finally deposited.

[0039] S5. An N-type GaN layer 400 is grown on the undoped GaN layer 300: The N-type GaN layer 400 is grown in an MOCVD apparatus; during the growth of the N-type GaN layer 400, the temperature in the reaction chamber of the MOCVD apparatus is controlled at 1100℃ and the pressure at 200 torr, ultimately depositing a 2μm N-type doped GaN layer. The doping element of the N-type GaN layer is Si, and the Si doping concentration is 3×10⁻⁶. 19 atoms / cm 3 ;

[0040] S6 grows the stress relief layer 500 on the N-type GaN layer 400: When growing the stress relief layer 500, the reaction chamber temperature is adjusted to 850°C, the reaction chamber pressure is controlled at 200 torr, and the growth thickness is 75 nm.

[0041] S7 grows the multi-quantum well layer 600 on the stress relief layer 500: the multi-quantum well layer 600 is formed by alternating growth of GaN quantum barriers and InGaN quantum wells, with a total thickness of 150nm; when growing GaN quantum barriers, the reaction chamber temperature is controlled at about 880℃, when growing InGaN quantum wells, the reaction chamber temperature is controlled at about 750℃, the reaction chamber pressure is controlled at 200torr, and the multi-quantum well layer 600 is grown for 11 cycles;

[0042] S8 grows an electron blocking layer 700 on a multi-quantum well layer 600. The electron blocking layer 700 is fabricated by sequentially stacking GaN layer 711, AlN layer 712, AlGaN layer 713, LaAlO3 layer 721, and SrTiO3 layer 722 from bottom to top. In the electron blocking layer 700, the thickness of the GaN layer is 25 nm, the thickness of the AlN layer is 5 nm, the thickness of the AlGaN layer is 15 nm, the thickness of the LaAlO3 layer is 15 nm, and the thickness of the SrTiO3 layer is 5 nm. The electron blocking layer 700 is doped with Mg at a concentration of 5 × 10⁻⁶. 18 atoms / cm 3 The growth temperature is 950℃ and the growth pressure is 200tor.

[0043] S9 grows a P-type semiconductor layer 800 on the electron blocking layer 700. The P-type semiconductor layer 800 is a composite layer consisting of a sequentially deposited P-type GaN layer and a P-type contact layer. Both the P-type GaN layer and the P-type contact layer are doped with Mg, wherein the Mg doping concentration in the P-type GaN layer is 3 × 10⁻⁶. 19 atoms / cm 3 The thickness is 120 nm, the growth temperature is 900℃, and the growth pressure is 200 torr; the Mg doping concentration in the P-type contact layer is 8 × 10⁻⁶. 19 atoms / cm 3, the thickness of the GaN layer 711 is 30 nm, the thickness of the AlN layer 712 is 2 nm, the thickness of the AlGaN layer 713 is 11 nm, the thickness of the LaAlO3 layer 721 is 6 nm, and the thickness of the SrTiO3 layer 722 is 10 nm, and the growth temperature is 900℃ and the growth pressure is 600 torr.

[0044] After the epitaxial structure growth is completed, the temperature of the reaction cavity is reduced, and annealing treatment is performed in a nitrogen atmosphere, the annealing temperature is 650℃, the annealing treatment is performed for 4 min, and the epitaxial growth is completed after the temperature is reduced to room temperature.

[0045] Example 2

[0046] The difference between this example and Example 1 is that the thickness of the GaN layer 711 in the electron blocking layer 700 is 29 nm, the thickness of the AlN layer 712 is 2 nm, the thickness of the AlGaN layer 713 is 11 nm, the thickness of the LaAlO3 layer 721 is 6 nm, and the thickness of the SrTiO3 layer 722 is 10 nm.

[0047] Example 3

[0048] The difference between this example and Example 1 is that the thickness of the GaN layer 711 in the electron blocking layer 700 is 12 nm, the thickness of the AlN layer 712 is 9 nm, the thickness of the AlGaN layer 713 is 18 nm, the thickness of the LaAlO3 layer 721 is 6 nm, and the thickness of the SrTiO3 layer 722 is 2 nm.

[0049] Example 4

[0050] The difference between this example and Example 1 is that the thickness of the GaN layer 711 in the electron blocking layer 700 is 11 nm, the thickness of the AlN layer 712 is 2 nm, the thickness of the AlGaN layer 713 is 11 nm, the thickness of the LaAlO3 layer 721 is 6 nm, and the thickness of the SrTiO3 layer 722 is 2 nm.

[0051] Example 5

[0052] The difference between this example and Example 1 is that the thickness of the GaN layer 711 in the electron blocking layer 700 is 28 nm, the thickness of the AlN layer 712 is 8 nm, the thickness of the AlGaN layer 713 is 18 nm, the thickness of the LaAlO3 layer 721 is 18 nm, and the thickness of the SrTiO3 layer 722 is 8 nm.

[0053] Example 6

[0054] The difference between this example and Example 1 is that the thickness of the GaN layer 711 in the electron blocking layer 700 is 28 nm, the thickness of the AlN layer 712 is 2 nm, the thickness of the AlGaN layer 713 is 12 nm, the thickness of the LaAlO3 layer 721 is 18 nm, and the thickness of the SrTiO3 layer 722 is 2 nm.

[0055] Example 7

[0056] The difference between this embodiment and embodiment 1 is that the thickness of the GaN layer 711 in the electron blocking layer 700 is 12 nm, the thickness of the AlN layer 712 is 8 nm, the thickness of the AlGaN layer 713 is 18 nm, the thickness of the LaAlO3 layer 721 is 6 nm, and the thickness of the SrTiO3 layer 722 is 8 nm.

[0057] Comparative Example 1

[0058] The difference between this embodiment and embodiment 1 is that the GaN layer 711 and the AlN layer 712 are not present in the electron blocking layer 700, and the thickness of the AlGaN layer 713 is 20 nm.

[0059] Comparative Example 2

[0060] The difference between this embodiment and embodiment 1 is that the GaN layer 711, the AlN layer 712, the LaAlO3 layer 721, and the SrTiO3 layer 722 are not present in the electron blocking layer 700, and the thickness of the AlGaN layer 713 is 30 nm.

[0061] Comparative Example 3

[0062] The difference between this embodiment and embodiment 1 is that the GaN layer 711, the AlN layer 712, and the AlGaN layer 713 are not present in the electron blocking layer 700.

[0063] Comparative Example 4

[0064] The difference between this embodiment and embodiment 1 is that the LaAlO3 layer 721 is not present in the electron blocking layer 700.

[0065] Comparative Example 5

[0066] The difference between this embodiment and embodiment 1 is that the SrTiO3 layer 722 is not present in the electron blocking layer 700.

[0067] The epitaxial wafers prepared in Examples 1-5 and Comparative Examples 1-5 were made into 10 mil x 23 mil core particles for testing, and the test results are shown in Table 1:

[0068] Table 1 Test results of the epitaxial wafers prepared in Examples 1-7 and Comparative Examples 1-5

[0069]

[0070] As can be seen from Table 1, in the epitaxial wafers prepared in Examples 1-7, two two-dimensional electron gases are formed, which is conducive to the uniform distribution of carriers and more effective current expansion, and the light efficiency is obviously improved; in Comparative Examples 1, 3-5, only one two-dimensional electron gas is present, and the light efficiency improvement rate is lower than that of the examples.

Claims

1. An epitaxial wafer with enhanced current expansion, characterized in that, From bottom to top, it includes a substrate (100), a buffer layer (200), an undoped GaN layer (300), an N-type GaN layer (400), a stress relief layer (500), a multi-quantum well layer (600), an electron blocking layer (700), and a P-type semiconductor layer (800); wherein, the electron blocking layer (700) is composed of a GaN layer (711), an AlN layer (712), an AlGaN layer (713), a LaAlO3 layer (721), and a SrTiO3 layer (722) from bottom to top.

2. The epitaxial wafer with enhanced current extension as described in claim 1, characterized in that, The electron blocking layer (700) is doped with Mg at a concentration of 1×10⁻⁶. 18 -5×10 19 atoms / cm 3 .

3. The epitaxial wafer with enhanced current extension as described in claim 1, characterized in that, The substrate (100) is a sapphire substrate, a Si substrate, or a SiC substrate.

4. The epitaxial wafer with enhanced current extension as described in claim 1, characterized in that, The thickness of the undoped GaN layer (300) is 1-3 μm.

5. The epitaxial wafer with enhanced current extension as described in claim 1, characterized in that, The thickness of the N-type GaN layer (400) is 1.5-3 μm.

6. The epitaxial wafer with enhanced current extension as described in claim 1, characterized in that, The N-type GaN layer (400) is doped with Si, and the Si doping concentration is 1×10⁻⁶. 17 -5×10 20 atoms / cm 3 .

7. The epitaxial wafer with enhanced current extension as described in claim 1, characterized in that, The thickness of the stress relief layer (500) is 50-100 nm.

8. The epitaxial wafer with enhanced current extension as described in claim 1, characterized in that, The multiple quantum well layer (600) is an InGaN / GaN quantum well layer with a thickness of 150-250 nm.

9. The epitaxial wafer with enhanced current extension as described in claim 1, characterized in that, In the electron blocking layer (700), the thickness of the GaN layer (711) is 10-30 nm, the thickness of the AlN layer (712) is 1-10 nm, the thickness of the AlGaN layer (713) is 10-20 nm, the thickness of the LaAlO3 layer (721) is 5-20 nm, and the thickness of the SrTiO3 layer (722) is 1-10 nm.

10. The epitaxial wafer with enhanced current extension as described in claim 1, characterized in that, The P-type semiconductor layer (800) is a composite layer of a P-type GaN layer and a P-type contact layer. The P-type contact layer is an InGaN layer doped with Mg. The doping element is Mg, and the doping concentration of Mg in the P-type GaN layer is 3 × 10⁻⁶. 19 -3×10 20 atoms / cm 3 The thickness is 30-120 nm, and the Mg doping concentration in the P-type contact layer is 8 × 10⁻⁶. 19 -8×10 20 atoms / cm 3 The thickness is 10-30nm.

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