Radio altimeter inspection tester

Abstract

The utility model relates to the technical field of radio altimeter inspection testers, in particular to a radio altimeter inspection tester, which comprises an inspection tester shell internally integrated with a radio frequency module and a data acquisition module control module. The radio frequency module comprises a radio frequency receiving circuit and a radio frequency transmitting circuit; the data acquisition module control module comprises an FPGA chip and an ARM chip, the input end of the FPGA chip is connected with the output end of the radio frequency receiving circuit, the output end of the FPGA chip is connected with the input end of the radio frequency transmitting circuit, the ARM chip is connected with the FPGA chip through a bus, and the input end of the FPGA chip is connected with the output end of the radio frequency receiving circuit. According to the utility model, the FPGA chip and the ARM chip in the data acquisition module control module are adopted to work cooperatively, so that accurate receiving and processing of pulse signals and software delay control are realized, a traditional physical delay line structure is replaced, the manufacturing cost is reduced, and meanwhile, the delay characteristic can be flexibly adjusted to adapt to different test requirements.

Description

TECHNICAL FIELD

[0001] The utility model relates to wireless radio altimeter inspection appearance technical field relates to a wireless radio altimeter inspection appearance. BACKGROUND

[0002] The altimeter detector is mainly used for accurate measurement and calibration of altimeters of various aircrafts to ensure that pilots can obtain accurate altitude information during flight, which is crucial for flight safety. By simulating different flight environment conditions, the detector can test the measurement accuracy, response time and other key performance indicators of the altimeter, thereby ensuring the reliability of the altitude data of the aircraft during take-off, cruising, landing and other stages.

[0003] The pulse altimeter widely used on aircrafts works by measuring the round-trip time of the pulse signal to calculate the distance between the aircraft and the ground. With the continuous development of electronic technology and signal processing technology, pulse altimeters have continuously improved in performance and functionality, such as the introduction of digital signal processing, coding modulation and other technologies. This puts higher requirements on altimeter detectors, which need to have the ability to adapt to different types and performance pulse altimeters, as well as more comprehensive testing functions and higher testing accuracy.

[0004] In the prior art, the traditional altimeter detector usually uses a delay line to realize the delay ranging of the pulse signal. The delay line is designed based on physical principles and realizes the delay transmission of the signal through specific materials and structures, which can realize real-time delay without relying on software execution. However, the traditional delay line has the following defects:

[0005] On the one hand, the cost is high. The delay line usually needs to use special materials and high-precision manufacturing processes to ensure its delay characteristics, which is expensive. In addition, in order to make the delay line work well with other circuit devices in the altimeter system, auxiliary circuits and interface modules need to be added, further increasing the overall system cost.

[0006] On the other hand, the flexibility is insufficient. Once the delay line is manufactured, its delay time is basically fixed and cannot be flexibly adjusted. If the delay time needs to be adjusted according to different measurement requirements during actual testing, different delay lines with different delay characteristics need to be replaced, which not only is cumbersome to operate, but also causes additional time and cost consumption.

[0007] Therefore, the existing altimeter detection scheme using delay line has obvious shortcomings in cost control and flexibility, which cannot effectively adapt to the increasingly complex and diverse testing requirements of current pulse altimeters. SUMMARY

[0008] The utility model discloses to solve the problem of high cost and poor flexibility of the delay line in the prior art, provide a radio altimeter inspection appearance with lower cost, with higher flexibility, and can adapt to a variety of pulse height table test demand, to improve the applicability and economy of detection appearance.

[0009] The utility model discloses the following technical scheme realizes:

[0010] A radio altimeter inspection appearance, comprising:

[0011] The inspection appearance shell is internally integrated with radio frequency module and data acquisition module control module;

[0012] The antenna cover is connected with the radio frequency module through the feed line, and the antenna cover includes a transmitting antenna cover and a receiving antenna cover.

[0013] The support is threadedly connected with the antenna cover.

[0014] The radio frequency module includes a radio frequency receiving circuit and a radio frequency transmitting circuit.

[0015] The data acquisition module control module includes an FPGA chip and an ARM chip.

[0016] Further, the radio frequency receiving circuit includes a high-power attenuating sheet, a digital controllable attenuator, a mixer and a detector.

[0017] Further, the radio frequency transmitting circuit includes a frequency doubler, an amplifier, a switch modulator and a mixer.

[0018] Further, the data acquisition module control module further comprises an ADC acquisition unit and a DAC output unit, an input end of the ADC acquisition unit is connected with a detector of the radio frequency receiving circuit, and an output end of the DAC output unit is connected with a switch modulator of the radio frequency transmitting circuit.

[0019] Further, the inspection instrument shell surface is provided with an aviation connector socket; the shell interior is provided with a lithium battery and a power management unit, and the power management unit is connected with the radio frequency module and the data acquisition module control module through a circuit.

[0020] Further, the power management unit comprises a voltage conversion circuit, and output ends of the voltage conversion circuit are connected with power supply ends of the radio frequency module and the data acquisition module control module respectively.

[0021] Further, the transmitting antenna cover and the receiving antenna cover are both internally provided with a signal coupler, and the signal coupler is connected with the feed line through a coaxial connector.

[0022] The radio altimeter inspection instrument has the advantages that:

[0023] (1) The radio altimeter inspection instrument adopts the cooperation of the FPGA chip and the ARM chip in the data acquisition module control module, realizes the accurate receiving, processing and software delay control of the pulse signal, replaces the traditional physical delay line structure, reduces the manufacturing cost, and makes the delay characteristics flexible to adjust, so that different test requirements can be adapted;

[0024] (2) The radio altimeter inspection instrument integrates the radio frequency module and the data acquisition module control module in the inspection instrument shell, is internally provided with the lithium battery and the power management unit, realizes the highly integrated portable structure design, is convenient for field detection, guarantees the power supply stability and long-time operation capacity of the system, and has the advantages that:

[0025] (3) The radio altimeter inspection instrument sets the high-power attenuation sheet, the digital controllable attenuator, the mixer and the detector in the radio frequency receiving circuit, can effectively control the input signal amplitude, guarantees the signal receiving capacity in a wide dynamic range, improves the detection accuracy and adaptability, introduces the frequency multiplier, the amplifier, the switch modulator and the mixer in the radio frequency transmitting circuit, realizes the stable and adjustable radio frequency signal output, and ensures the test signal quality;

[0026] (4) The radio altimeter inspection instrument sets the ADC acquisition unit and the DAC output unit, can realize the efficient conversion and processing of the analog signal and the digital signal, further improves the data processing speed and the signal fidelity of the whole system, and enhances the detection sensitivity and the resolution of the system.

[0027] The radio altimeter inspection instrument has a signal coupler arranged in the transmitting antenna cover and the receiving antenna cover, is connected with the feeder through a coaxial connector, can effectively reduce signal loss and reflection, improves the overall transmitting and receiving efficiency of the antenna system, and ensures the accuracy of the detection result. BRIEF DESCRIPTION OF DRAWINGS

[0028] In order to more clearly illustrate the technical scheme in the embodiments of the utility model, the drawings needed to be used in the embodiment description will be briefly introduced, and obviously, the drawings in the following description are only some embodiments of the utility model, and other drawings can be obtained by the ordinary skilled in the art without paying creative labor.

[0029] Figure 1 It is a structural frame diagram of the radio altimeter inspection instrument of the utility model;

[0030] Figure 2 It is a system block diagram of the radio altimeter inspection instrument of the utility model;

[0031] Figure 3 It is a radio frequency receiving circuit principle block diagram of the radio altimeter inspection instrument of the utility model;

[0032] Figure 4 It is a radio frequency transmitting circuit principle block diagram of the radio altimeter inspection instrument of the utility model;

[0033] Figure 5 It is a power management unit circuit principle of the radio altimeter inspection instrument of the utility model Figure 1 ;

[0034] Figure 6 It is a power management unit circuit principle of the radio altimeter inspection instrument of the utility model Figure 2 ;

[0035] Figure 7 It is a power management unit circuit principle of the radio altimeter inspection instrument of the utility model Figure 3 ;

[0036] Figure 8 It is a FPGA control circuit principle of the radio altimeter inspection instrument of the utility model Figure 1 ;

[0037] Figure 9 It is a FPGA control circuit principle of the radio altimeter inspection instrument of the utility model Figure 2 ;

[0038] Figure 10 The ARM control circuit principle of the radio altimeter inspection instrument Figure 1 ;

[0039] Figure 11 The ARM control circuit principle of the radio altimeter inspection instrument Figure 2 ;

[0040] Figure 12 The ADC acquisition unit circuit principle of the radio altimeter inspection instrument Figure 1 ;

[0041] Figure 13 The ADC acquisition unit circuit principle of the radio altimeter inspection instrument Figure 2 ;

[0042] Figure 14 The DAC output unit circuit principle of the radio altimeter inspection instrument Figure 1 ;

[0043] Figure 15 The DAC output unit circuit principle of the radio altimeter inspection instrument Figure 2 ;

[0044] Figure 16 The function schematic diagram of the radio altimeter inspection instrument. DETAILED DESCRIPTION

[0045] In order to make the purpose, technical scheme and advantages of the present application clearer, the present application will be further described in detail below with reference to the embodiments and drawings, and the illustrative embodiments and the description thereof are only used to explain the present application, and not as a limitation to the present application.

[0046] Embodiment 1

[0047] Reference Figure 1 , the present embodiment proposes a structural embodiment of a radio altimeter inspection instrument.

[0048] The radio altimeter checker mainly comprises a checker, an antenna cover, a feeder and a support, etc. The antenna cover comprises a transmitting antenna cover and a receiving antenna cover, and contains a signal coupler. The transmitting antenna cover is used for coupling the radio frequency signal transmitted by the on-board radio altimeter, sending the signal to the checker through the feeder for signal analysis and processing, and isolating, shielding or absorbing the radio frequency signal generated by the transmitting antenna of the airplane to prevent the transmitting signal from self-feedback and causing measurement error. The receiving antenna cover is used for transmitting the radio frequency signal sent by the checker through the internal coupler, and the receiving antenna of the airplane receives and identifies the transmitted signal.

[0049] The checker is mainly used for limiting amplitude, power modulation, fast detection, signal conversion and digital conditioning of the radio frequency pulse signal sent by the signal coupler. After accurate delay processing and setting, the modulated wave is subjected to carrier modulation and power adjustment, and then is transmitted to the signal coupler through the feeder and is received, identified and processed by the receiving antenna of the airplane radio altimeter.

[0050] The support is used for fixing and supporting the antenna cover, and keeps close contact with the airplane skin around the transmitting and receiving antennas of the airplane by adjusting the extension length.

[0051] The feeder is mainly used for communication connection between the coupler socket and the checker

[0052] A preferred mode comprises that the antenna cover is composed of an antenna, a signal coupler, a coaxial connector and an electromagnetic shielding shell, etc. The antenna cover is installed and fixed with the support through threads, and the feeder is connected with the antenna cover and the checker through the coaxial connector. The support has the functions of length extension, locking and folding, which is convenient for use, installation and carrying.

[0053] Referring to Figure 2 , the checker comprises a checker shell, and a radio frequency module, a lithium battery, a power management unit and a data acquisition module control module are integrated inside the checker shell. The radio frequency module mainly realizes signal reception, mixing, output of 45-70M intermediate frequency signal, signal detection, frequency multiplication of 45-70M intermediate frequency signal, mixing output of amplitude controllable 4.2G-4.4G modulated signal, and is mainly composed of a radio frequency receiving circuit, a radio frequency transmitting circuit and a power supply and control.

[0054] Referring to Figures 5-7 , the power management unit is mainly composed of two integrated chips. The chips support an input voltage range of 5.5V to 36V, and an output current of up to 3A. The main function of the power management unit is to select a lithium battery or a DC power supply switch, and to generate 5V and 3.3V voltages.

[0055] The core of the data acquisition module is an FPGA and an ARM architecture.

[0056] Reference Figures 8-9 The FPGA completes the collection of the detection signal and the intermediate frequency envelope signal, precise delay, parameter measurement, signal receiving / transmitting, and power control functions. The detection signal is collected and counted at high speed by the FPGA, and the corresponding pulse signal is output after precise delay, so as to realize the simulation of the height. The delay is divided into inherent delay, fixed delay, and dynamic delay. The inherent delay is mainly determined by the inherent time of the hardware circuit and the software operation. The fixed delay and the dynamic delay can simulate the fixed and dynamic changes of the height respectively.

[0057] Reference Figures 10-11 The ARM core mainly realizes the functions of display screen communication, button and switch input detection, power management unit control and processing, external RS422 communication, and bus communication with the FPGA. The ADC collection and conditioning unit completes the envelope sampling of the input signal of the radio frequency module, sends the collected signal into the FPGA for monitoring, judgment, and operation, and outputs the center frequency of the processed transmission signal as a same frequency signal through the DAC / DDS conditioning and output unit to simulate the echo transmission.

[0058] The main function of the data collection module is to collect the signal, collect the rising edge and falling edge of the signal to prepare for the function of the subsequent delay module, and obtain the pulse width through the judgment of the rising edge and falling edge. The delay module starts counting when the rising edge comes, waits for the counting to reach the number of the required delay, generates a return signal, and outputs the signal through the return signal output module. The key control output module controls the start and end of data collection by judging the input data of the FMC bus module in the FPGA sent by the ARM module. The FMC bus module also transmits the height data.

[0059] Further, the data collection module control module further includes an ADC collection unit and a DAC output unit. The input end of the ADC collection unit is connected with the detector of the radio frequency receiving circuit, and the output end of the DAC output unit is connected with the switch modulator of the radio frequency transmitting circuit.

[0060] Reference Figures 12-13 The ADC collection unit is mainly composed of an analog-to-digital converter chip. The chip supports 12-bit high speed and low power consumption, and is powered by 3.3V. The main function of the ADC collection unit is to collect the input signal.

[0061] Reference Figures 14-15 The DAC output unit is mainly composed of a digital-to-analog converter chip. The chip supports 14-bit high speed and low power consumption, and is powered by 3.3V. The DAC output unit is mainly used to output the intermediate frequency signal and the power value collected by the ARM architecture.

[0062] Embodiment 2

[0063] The embodiment is based on the radio altimeter checker of embodiment 1 and proposes a radio frequency module specific implementation.

[0064] Reference Figure 3 The radio frequency receiving circuit includes a high-power attenuator, a first band-pass filter, a digital controllable attenuator, a mixer, a first detector, a PLL, a first amplifier, a second amplifier, a third amplifier, a fourth amplifier, a frequency divider, a high-pass filter, and a second detector. The radio frequency input is connected to the input end of the high-power attenuator. The output end of the high-power attenuator is connected to the input end of the high-power attenuator. The output end of the high-power attenuator is connected to the input end of the digital controllable attenuator. The output end of the digital controllable attenuator is connected to the input end of the mixer. The output end of the PLL is connected to the input end of the first amplifier. The output end of the first amplifier is connected to the mixing input end of the mixer. The output end of the mixer is connected to the input end of the second band-pass filter. The output end of the second band-pass filter is connected to the input end of the first detector. The output end 1 of the first detector is connected to the input end of the second amplifier. The output end of the second amplifier is connected to the input end of the frequency divider. The output end of the frequency divider is connected to the input end of the high-pass filter. The output end of the high-pass filter outputs the intermediate frequency signal. The output end 2 of the first detector is connected to the input end of the third amplifier. The output end of the third amplifier is connected to the second detector. The output end of the second detector outputs the TTL signal after detection and comparison.

[0065] That is, the external radio frequency signal first enters the high-power attenuator input end and is attenuated to prevent overload. The output end of the high-power attenuator is connected to the first band-pass filter to filter out the out-of-band noise. The filtered signal is sent to the digital controllable attenuator, which dynamically adjusts the signal amplitude according to the control signal. The output of the digital controllable attenuator enters the signal input end of the mixer. The local oscillator signal generated by the PLL is amplified by the first amplifier and input to the local oscillator end of the mixer to complete the frequency down-conversion. The output of the mixer is filtered by the second band-pass filter to obtain the target intermediate frequency signal. The intermediate frequency signal is input to the first detector to separate two outputs: the output end 1 is amplified by the second amplifier and sent to the frequency divider. After frequency division, the high-pass filter outputs the final intermediate frequency signal. The output end 2 is amplified by the third amplifier and input to the second detector to generate the TTL logic signal after detection.

[0066] Reference Figure 4The radio frequency transmitting circuit comprises a first amplifier, a second amplifier, a third amplifier, a fourth amplifier, a fifth amplifier, a first frequency multiplier, a second frequency multiplier, a third frequency multiplier, a first band-pass filter, a second band-pass filter, a third band-pass filter, a fourth band-pass filter, a fifth band-pass filter, a frequency mixer, a PLL, a switch modulator, and a digital controllable attenuator, wherein a signal is input to an input end of the first amplifier, an output end of the first amplifier is connected to an input end of the first frequency multiplier, an output end of the first frequency multiplier is connected to an input end of the first band-pass filter, an output end of the first band-pass filter is connected to an input end of the second amplifier, an output end of the second amplifier is connected to an input end of the second frequency multiplier, an output end of the second frequency multiplier is connected to an input end of the second band-pass filter, an output end of the second band-pass filter is connected to an input end of the third amplifier, an output end of the third amplifier is connected to an input end of the third frequency multiplier, an output end of the third frequency multiplier is connected to an input end of the third band-pass filter, an output end of the third band-pass filter is connected to an input end of the frequency mixer, the PLL is connected to an input end of the fourth amplifier, an output end of the fourth amplifier is connected to a mixing end of the frequency mixer, an output end of the frequency mixer is connected to an input end of the fourth band-pass filter, an output end of the fourth band-pass filter is connected to an input end of the fifth amplifier, an output end of the fifth amplifier is connected to an input end of the switch modulator, an output end of the switch modulator is connected to an input end of the fifth band-pass filter, an output end of the fifth band-pass filter is connected to an input end of the digital controllable attenuator, and an output end of the digital controllable attenuator outputs a radio frequency signal.

[0067] That is, after the input signal is amplified by the first amplifier, the signal is sent to the first frequency multiplier to increase the frequency, the frequency-multiplied signal is filtered by the first band-pass filter to remove harmonics, and then the signal is amplified by the second amplifier, and the above process is repeated to sequentially pass through the second frequency multiplier, the second band-pass filter, the third amplifier, the third frequency multiplier, and the third band-pass filter, so as to gradually generate a high-frequency carrier signal. The high-frequency carrier signal is input to the signal end of the frequency mixer, and the reference signal generated by the PLL is amplified by the fourth amplifier and then mixed with the reference signal to synthesize a target radio frequency. The mixed output is filtered by the fourth band-pass filter, and then the power of the signal is increased by the fifth amplifier. The amplified signal enters the switch modulator for pulse or digital modulation. The modulated signal is filtered by the fifth band-pass filter to remove modulation noise. The modulated signal is adjusted by the digital controllable attenuator to adjust the transmitting power, and finally a stable radio frequency signal is output to the antenna or load.

[0068] Embodiment 3

[0069] This embodiment proposes an application scenario of the radio altimeter tester based on the embodiment 1.

[0070] Reference Figure 16 The radio altimeter tester comprises an analog height function, an analog ascending function, an analog descending function, an analog cycle function, and a sensitivity function.

[0071] The simulation height function is to open the aircraft altimeter device and connect the antenna; the host computer platform inputs the height value to be measured in the radio altimeter tester device, clicks start test, and the radio frequency module receives and demodulates the pulse signal; the lower computer detects the pulse signal delay corresponding to the height value, sends the pulse signal to the radio frequency module for modulation and output, and the aircraft calculates the height value through the time difference between the transmitted and received two signals, and displays the current height on the dial.

[0072] The simulation ascent function is roughly the same as the simulation height function. In this function interface, the ascent height step needs to be set. After setting, click start. The height value increases from 20 meters to 6000 meters by steps; the aircraft dial also synchronously displays 20 meters to 6000 meters by steps.

[0073] The simulation descent function is roughly the same as the simulation height function. In this function interface, the descent height step needs to be set. After setting, click start. The height value increases from 6000 meters to 20 meters by steps; the aircraft dial also synchronously displays 6000 meters to 20 meters by steps.

[0074] The simulation cycle function is roughly the same as the simulation height function. In this function interface, the cycle height step, the upper limit height value and the lower limit height value need to be set. After setting, click start. The height value increases from the lower limit height to the upper limit height by steps, and then decreases to the lower limit height by steps, and repeats. The aircraft dial also synchronously displays the corresponding height value.

[0075] The sensitivity function is that the ARM directly controls the attenuator of the radio frequency module after receiving the attenuation configuration instruction sent by the host computer, and increases or decreases the output power.

[0076] The signal path control of the above function scenarios includes: the radio frequency receiving circuit processes the input signal through the high-power attenuator and the digital controllable attenuator, down-converts the signal to the intermediate frequency signal through the mixer, and the FPGA captures the envelope signal output by the detector in real time through the ADC acquisition unit.

[0077] The ARM receives the height value set by the host computer and calculates the time delay according to the formula. The FPGA internally constructs a digital delay line and uses an interpolation filter to achieve a 0.1 ns level delay resolution. The transmitting circuit shifts the baseband signal to the 5.8 GHz frequency band through the frequency multiplier, and outputs through the switch modulator. The system monitors the phase difference of the transmitted and received signals in real time, and triggers automatic calibration when the error exceeds ±0.3 ns.

[0078] The basic principle and main features of the present application and the advantages of the present application are shown and described above. Those skilled in the art should understand that the present application is not limited by the above examples, and the above examples and descriptions in the specification are only to illustrate the principles of the present application. Without departing from the spirit and scope of the present application, various changes and improvements can be made to the present application, and these changes and improvements all fall within the scope of the present application. The scope of protection of the present application is defined by the appended claims and their equivalents.

Claims

1. A radio altimeter checker, characterized in that, include: The inspection instrument housing integrates an RF module, a data acquisition module, and a control module. The radome is connected to the radio frequency module via a feed line. The radome includes a transmitting radome and a receiving radome. The transmitting radome is connected to the radio frequency output terminal of the inspection instrument housing via a coaxial connector, and the receiving radome is connected to the radio frequency input terminal of the inspection instrument housing via a coaxial connector. The bracket is threadedly connected to the antenna cover; The radio frequency module includes a radio frequency receiving circuit and a radio frequency transmitting circuit. The radio frequency receiving circuit is connected to the receiving antenna cover via a feed line, and the radio frequency transmitting circuit is connected to the transmitting antenna cover via a feed line. The data acquisition module control module includes an FPGA chip and an ARM chip. The input terminal of the FPGA chip is connected to the output terminal of the radio frequency receiving circuit, and the output terminal of the FPGA chip is connected to the input terminal of the radio frequency transmitting circuit. The ARM chip is connected to the FPGA chip via a bus.

2. The radio altimeter checker according to claim 1, characterized in that, The radio frequency receiving circuit includes a high-power attenuator, a digitally controllable attenuator, a mixer, and a detector. The radio frequency input is connected to the high-power attenuator, the high-power attenuator is connected to the mixer through the digitally controllable attenuator, the mixer is connected to the detector, and the output of the detector is connected to the input of the FPGA chip.

3. The radio altimeter checker according to claim 1, characterized in that, The radio frequency transmitting circuit includes a frequency multiplier, an amplifier, a switching modulator, and a mixer. The output terminal of the FPGA chip is connected to the input terminal of the frequency multiplier. The frequency multiplier is connected to the mixer through the amplifier. The mixer is connected to the switching modulator. The switching modulator performs radio frequency output.

4. The radio altimeter checker according to claim 2, characterized in that, The data acquisition module control module also includes an ADC acquisition unit and a DAC output unit. The input terminal of the ADC acquisition unit is connected to the detector of the radio frequency receiving circuit, and the output terminal of the DAC output unit is connected to the switching modulator of the radio frequency transmitting circuit.

5. A radio altimeter checker according to claim 1, characterized in that, The surface of the inspection instrument housing is provided with an aviation connector socket; the interior of the housing is provided with a lithium battery and a power management unit, and the power management unit is connected to the radio frequency module and the data acquisition module control module through a circuit.

6. A radio altimeter checker according to claim 5, characterized in that, The power management unit includes a voltage conversion circuit, the output of which is connected to the power supply terminals of the radio frequency module and the data acquisition module control module, respectively.

7. A radio altimeter checker according to claim 1, characterized in that, Both the transmitting and receiving antenna covers are equipped with signal couplers, which are connected to the feed line via coaxial connectors.

Images