P1 port circuit
By designing the P1 port circuit and combining components such as optocouplers and current-limiting resistors, the problems of difficult data parsing and low transmission reliability were solved, achieving efficient data parsing and secure transmission, thereby improving the operating efficiency of the smart grid and protecting user privacy.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-06
- Publication Date
- 2026-03-27
AI Technical Summary
The existing P1 port data reading system suffers from problems such as difficulty in data parsing, low transmission reliability, and insufficient security, which affect the efficient operation of the smart grid and the protection of user privacy.
A P1 port circuit was designed, including components such as an optocoupler, a current-limiting resistor, and a transistor. Combined with a DC-DC circuit and a current-limiting chip, it achieves efficient data parsing, transmission, and management. A security protection mechanism is adopted to ensure the reliability and security of data transmission.
It improves data transparency and security, promotes efficient energy use and management, and provides comprehensive energy management solutions.
Smart Images

Figure CN224052293U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The utility model relates to P1 port circuit. BACKGROUND
[0002] P1 port usually uses DLMS / COSEM protocol for data transmission. This is a widely accepted international standard for exchanging data between metering devices and management systems. Through P1 port, real-time and historical power consumption data, including active power, reactive power, voltage, current, etc. can be obtained. Each record contains an accurate timestamp, which helps analyze user's power consumption patterns. Current electricity prices and other related billing information can also be obtained, which is particularly important for dynamic pricing systems. Some advanced functions also include logging events such as power outages and power restoration.
[0003] Users can monitor their own power consumption through devices connected to P1 port and take measures to save energy. Enterprises can use these data for more detailed energy management and cost control. Energy suppliers and service providers can use these data to optimize power grid operation and provide better customer service.
[0004] With the development of smart grid, the popularity of smart meters is increasing. P1 port, as a standardized interface, allows users and third-party devices to directly read detailed power consumption data from smart meters. However, existing P1 port data reading systems have problems such as difficult data analysis, low transmission reliability, and insufficient security. Therefore, a more efficient, reliable and secure P1 port data reading and management system is needed.
[0005] P1 port technology not only improves the transparency of energy use, but also promotes the innovation and development of the energy market. With the progress of smart grid technology and the introduction of more intelligent solutions, P1 port will continue to play an important role in supporting more efficient and sustainable energy management.
[0006] To ensure interoperability between smart meters provided by different suppliers, the Netherlands introduced P1 port as a unified data access standard. This helps avoid technical lock-in, promotes market competition and technological innovation.
[0007] To protect user privacy and data security, data transmission through P1 port usually uses encryption technology. Only authorized devices can access P1 port data, usually through password or other forms of identity verification. SUMMARY
[0008] The utility model wants to solve the technical problem of providing a P1 port circuit, intelligent electric meter data system and method. The utility model provides a kind of comprehensive energy management solution for user by efficient data reading, analysis, transmission and management. The system not only improves the transparency and security of data, but also promotes the efficient use and management of energy.
[0009] To solve the above problems, the technical scheme adopted by the utility model is:
[0010] A P1 port circuit, including P1 mouth communication circuit;
[0011] P1 mouth communication circuit includes photoelectric coupler D1, DP5 and triode QP2, QP1;
[0012] Digital request line Data_Request pin, for carrying out data connection with the RJ12 port of intelligent meter;
[0013] Photoelectric coupler D1, DP5 secondary edge is electrically connected the signal M_P1_RXD of single-chip microcomputer MCU respectively;
[0014] Photoelectric coupler D1 primary edge is electrically connected digital request line Data_Request;
[0015] Photoelectric coupler DP5 primary edge is electrically connected P1_Data signal;
[0016] Photoelectric coupler D1 secondary edge one end is connected GND and the other end is connected to power supply DVDD through pull-up resistor RP3;
[0017] Photoelectric coupler D1 primary edge is electrically connected digital request line Data_Request through current-limiting resistor RP5;
[0018] Photoelectric coupler D1 secondary edge is also electrically connected the signal M_P1_RXD of single-chip microcomputer MCU;
[0019] Photoelectric coupler DP5 primary edge is electrically connected DVDD through current-limiting resistor RP7;
[0020] Triode QP1 is used for waveform reverse action;
[0021] Photoelectric coupler DP5 secondary edge one end is connected signal Data_Reques, and the other end is connected resistor RP10, and the other end of resistor RP10 is connected ground;
[0022] Photoelectric coupler DP5 other end is connected the base of triode QP2 through the secondary edge capacitor CP2 and resistor RP9 in parallel, and the emitter of triode QP2 is connected ground and the collector is connected resistor RP6 and resistor PR8 respectively;
[0023] The collector of triode QP1 is connected P1_Data signal.
[0024] As a further improvement of the above technical solution:
[0025] The P1 port communication circuit is used for electrically connecting the external OSM device.
[0026] The digital request line Data_Request is grounded through the TVS tube DP4;
[0027] The current limiting resistor RP5 of the primary side of the optocoupler D1 provides the IF current for the primary side of the optocoupler;
[0028] The capacitor CCP2 is connected in parallel on the secondary side of the optocoupler D1.
[0029] The resistor PR8 is electrically connected between the base and the emitter of the transistor QP1;
[0030] The collector of the transistor QP2 is connected to the base of the transistor QP1.
[0031] The P1 port communication circuit is electrically connected with the power module;
[0032] M+5.5V supplies power to the P1 port;
[0033] The DCDC circuit includes input filter capacitors CP1, CP2, enable resistors RP4, RP5, bootstrap capacitor CP6, freewheeling diode DP1, energy storage inductor LP1, feedback resistors RP6, RP7, RP8, output filter capacitors CP4, CP5, DCDC chip UQ1;
[0034] The 5-pin VIN of the DCDC chip UQ1 is connected to the parallel filter capacitors CP1, CP2,
[0035] The 4-pin EN pin of the DCDC chip UQ1 is connected to the voltage dividing resistors RP4 and RP5, and SPM+12V is connected to the voltage dividing resistors RP4 and RP5, and the EN pin of the chip is electrically connected;
[0036] When the EN pin exceeds the threshold of the chip, the DCDC chip UQ1 works normally; when the EN pin is lower than the threshold of the chip, the DCDC chip UQ1 stops working.
[0037] A freewheeling circuit is provided for the inductor current;
[0038] The M+5.5V power output by the DCDC chip UQ1 is output to R+5.5V through the current limiting chip UP1;
[0039] The 4-pin ILIMIT of the current limiting chip UP1 is connected to the resistors RP1 and RP2;
[0040] The 5-pin VIN of the current limiting chip UP1 is connected to the filter capacitor CP7; the 6-pin DV / DT of the current limiting chip UP1 is connected to the capacitor CP8 to ground, serving as a soft start pin;
[0041] The 1-pin EN pin of the current-limiting chip UP1 is connected with resistors RP9 and RP10, and the voltage after voltage division of the resistors RP9 and RP10 reaches the threshold value of the EN pin; the 2-pin SOURCE pin of the current-limiting chip UP1 is connected with a capacitor CP3 and an EP1.
[0042] The power supply module comprises a high-frequency transformer TRN1; the high-frequency transformer TRN1 outputs a power supply SPM+12V;
[0043] The 7-pin and 8-pin windings of the high-frequency transformer TRN1 are connected with a diode DN1; a resistor RN1 is connected in series with a capacitor CN1, and then the series connection is connected in parallel with the diode DN1;
[0044] The output end of the diode DN1 is electrically connected with a Π type filter circuit;
[0045] The Π type filter circuit is electrically connected with a resistor RN2.
[0046] The Π type filter circuit comprises an electrolytic capacitor EN1, an inductor LN1 and an electrolytic capacitor EN2.
[0047] The resistor RN2 is a false load of the power supply SPM+12V.
[0048] The SPM+12V is electrically connected with a DCDC circuit output M+5.5V.
[0049] The intelligent electric meter data system comprises the P1 port circuit, and comprises a data acquisition module, a data analysis module, a data transmission module, a data storage module, a security management module and a user interface module; the data acquisition module is electrically connected with the P1 port circuit of the intelligent electric meter.
[0050] The P1 port circuit reading management method is based on the P1 port circuit; when the signal M_P1_TXD is pulled low, the optocoupler DP5 is turned on; the back end of the optocoupler DP5 is electrically connected with at least two NPN transistors QP2 and QP1; the transistor QP2 is used for waveform shaping.
[0051] When the external OSM device sends a data request signal, first, the Data_Request becomes high level, the optocoupler D1 is turned on, the M_P1_RXD is pulled low, and the single-chip microcomputer MCU receives the data request signal of the external OSM device; then, the single-chip microcomputer MCU sends the signal M_P1_TXD to the external OSM after processing and analysis.
[0052] The system can efficiently analyze P1 port data, ensure the reliability of data transmission, and provide a powerful security protection mechanism, thereby improving the energy management efficiency and data security of users. The utility model discloses reasonable in design, low in cost, durable, safe and reliable, simple to operate, time-saving and labor-saving, capital-saving, compact in structure and convenient to use. BRIEF DESCRIPTION OF DRAWINGS
[0053] Figure 1 is a TVS tube circuit schematic diagram of the utility model.
[0054] Figure 2 is a power supply SPM+12V circuit schematic diagram of the utility model.
[0055] Figure 3 is a bootstrap capacitor CP6 circuit schematic diagram of the utility model.
[0056] Figure 4 is a current limiting chip UP1 circuit schematic diagram of the utility model.
[0057] Figure 5 is a TRN1 circuit structure schematic diagram of the utility model. DETAILED DESCRIPTION
[0058] As Figures 1-5 , the Data_Request pin in the intelligent meter data reading and management system of the P1 port of the present example is a data request of an external OSM (Other Service Module) through an RJ12 cable and the RJ12 port of the intelligent meter.
[0059] The TVS tube DP4 effectively protects the communication tool and the field personnel handheld host from external static electricity or internal voltage spikes. The current limiting resistor RP5 of the original side of the optocoupler provides an IF current for the original side of the optocoupler. The resistance value selection of the current limiting resistor RP5 determines the size of the current of the original side of the optocoupler, which ensures that the optocoupler can meet the range requirements of the CTR of the optocoupler itself under high and low temperature environments. The optocoupler D1 realizes the functions of electrical isolation and signal transmission. One end of the secondary side of the optocoupler D1 is connected to GND, and the other end is connected to the RP3 pull-up resistor to DVDD. The CCP2 is connected in parallel to the secondary side of the optocoupler. The M_P1_RXD is a signal accepted by the single-chip microcomputer MCU. When the external OSM device sends a data request signal, the Data_Request becomes high level, the optocoupler D1 is turned on, the M_P1_RXD is pulled low, and the single-chip microcomputer MCU receives the data request signal of the external OSM device. After processing and analysis, the signal M_P1_TXD is sent to the external OSM. The resistor RP7 is a current limiting resistor of the original side of the optocoupler. One end is connected to the optocoupler DP5, and the other end is connected to DVDD. When the M_P1_TXD is pulled low, the optocoupler DP5 is turned on. Two NPN transistors are used at the back end of the optocoupler. The first transistor functions as a waveform shaping circuit. Because the P1 port communication requires a baud rate of 115200bps, ordinary optocouplers are difficult to achieve, and high-speed optocouplers or capacitive isolation are needed to realize the function. However, the latter is expensive, and a waveform shaping circuit is specially designed to achieve this function.
[0060] As Figures 1-2, the second triode is waveform reverse action, P1 port standard requirements received waveform must be logically inverted, and the design needs OC (Open Collector) output. The light coupling DP5 side of the end of the Data_Reques signal, the other end of the RP10 resistance, the other end of the RP10 resistance is connected to the ground. CP2 and RP9 are connected in parallel to the base of triode QP2, the emitter of QP2 is connected to the ground, and the collector is connected to the resistance RP6. The resistance PR8 is connected in parallel to the base and emitter of QP1. The collector of QP1 is connected to the P1_Data signal. The two light couplings D1 and DP5 and related devices constitute the P1 port communication circuit, which can obtain real-time and historical power consumption data, including active power, reactive power, voltage, current, etc.
[0061] As Figures 1-5 , the 5V power supply of the P1 port communication circuit is isolated from the SPM+12V power supply by a high-frequency transformer. The 7th and 8th windings of the high-frequency transformer TRN1 are connected to the diode DN1, and RN1 is connected in series with CN1 and then connected in parallel across DN1 to absorb the spikes across the diode DN1 and reduce the stress on the diode DN1. The EN1 electrolytic capacitor and the LN1 inductor form a Π-type filter circuit with the EN2 electrolytic capacitor, making the SPM+12V power supply output smooth and stable with only a small ripple. RN2 is a false load for the SPM+12V power supply to avoid leaving the power supply SPM+12V in an idle state and running abnormally for a long time.
[0062] SPM+12V is stepped down to M+5.5V by a DCDC circuit, and M+5.5V powers the P1 port. The DCDC circuit is composed of input filter capacitors CP1 and CP2, enable resistors RP4 and RP5, bootstrap capacitor CP6, freewheeling diode DP1, energy storage inductor LP1, feedback resistors RP6, RP7, and RP8, and output filter capacitors CP4 and CP5, and DCDC chip UQ1. The 5-pin VIN of the DCDC chip is connected to the CP1 and CP2 filter capacitors,
[0063] The 4-pin EN pin of the DCDC chip is connected to RP4 and RP5, and SPM+12V is divided by RP4 and RP5 to the EN pin of the chip. When the EN pin exceeds the threshold of the chip, the DCDC chip works normally, and when the EN pin is lower than the threshold of the chip, the DCDC stops working.
[0064] The 3-pin FB pin of the DCDC chip is connected to the voltage after RP6, RP7, and RP8 are divided, and the three resistors are selected to have a suitable resistance value to make the output voltage 5.5V. The freewheeling diode DP1 provides a freewheeling circuit for the inductor current when the MOS inside the DCDC chip is turned off.
[0065] As Figure 4The M+5.5V power supply output by the DCDC is output to R+5.5V through the current limiting chip UP1. The current limiting chip plays a protection role. In the case of short circuit or overload at the P1 port, the current limiting chip can be turned off in time to ensure that the front-end power supply does not abnormally occur. The 4-pin ILIMIT of the current limiting chip UP1 is connected to resistors RP1 and RP2. The resistor is a sampling resistor for setting the current limiting point of the chip. By adopting a suitable resistance value, the power supply current of P1 is set to about 270mA. The standard requirement for P1 port is that the power supply should be turned off when the load of P1 port is between 250mA and 300mA. The 5-pin VIN of the current limiting chip UP1 is connected to the filter capacitor CP7, which plays a filtering and coupling role. The 6-pin DV / DT of the current limiting chip UP1 is connected to the capacitor CP8 to ground. This pin is the soft start pin of the chip, and the capacitance value can set the slope of the power supply rising. The 1-pin EN pin of the current limiting chip UP1 is connected to RP9 and RP10. When the voltage after voltage division of the resistors reaches the threshold value of the EN pin, the chip starts to work. The 2-pin SOURCE pin of the current limiting chip UP1 is connected to the capacitor CP3 and EP1, which plays a filtering and energy storage role.
[0066] The management system mainly consists of the following parts:
[0067] The data acquisition module 1, the data analysis module 2, the data transmission module 3, the data storage module 4, the security management module 5, and the user interface module 6;
[0068] Among them, the TVS tube DP4 protects the digital request line Data_Request, and prevents external voltage from damaging the circuit;
[0069] M+5.5V supplies power to the current limiting chip, and the current limiting chip outputs R+5.5V to supply power to the P1 port. The current limiting chip protects the P1 port. Once the P1 port abnormally occurs and the current exceeds the current threshold set by the current limiting chip, the current limiting chip will be turned off to protect the P1 port.
[0070] The data transmitted by the P1 port usually includes information such as power consumption, voltage, and current.
[0071] Power consumption: directly read from the electric meter, unit: kWh.
[0072] Power: Power (P) can be calculated by voltage (V) and current (I):
[0073] P=V×I×cos(ϕ) ;
[0074] Energy cost: Energy cost can be calculated by energy consumption and electricity price:
[0075] Cost=Energy consumption×Electricity price Cost=Energy consumption×Electricity price.
[0076] The application scene of the utility model is: family energy management: the user can monitor the family power consumption through the system and take energy-saving measures; commercial application: the enterprise can use the system to manage energy and optimize cost control; public service: the energy supplier can use the system to optimize the power grid operation and provide better customer service.
[0077] The utility model fully describes is in order to disclose more clearly, and the prior art is not enumerated again.
[0078] Finally, it should be noted that: the above examples are used to illustrate the technical solutions of the utility model, but not to limit them; although the utility model has been described in detail with reference to the foregoing examples, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing examples, or make equivalent replacement to some technical features; as the person skilled in the art, it is obvious to combine the multiple technical solutions of the utility model. And these modifications or replacements do not make the essence of the corresponding technical solution deviate from the spirit and scope of the technical solutions of the utility model examples. The technical contents not described in the utility model are all known technologies.
Claims
1. A P1 port circuit, characterized by: The P1 port communication circuit includes a photocoupler D1, a DP5, and a transistor QP2 and QP1; The P1 port communication circuit includes a photocoupler D1, a DP5, and a transistor QP2 and QP1; A digital request line Data_Request pin is used for data connection with an RJ12 port of the smart meter; The photocoupler D1 and the DP5 are electrically connected to the signal M_P1_RXD of the single-chip microcomputer MCU; The photocoupler D1 is electrically connected to the digital request line Data_Request; The photocoupler DP5 is electrically connected to the P1_Data signal; One end of the photocoupler D1 is connected to GND, and the other end is connected to the power supply DVDD through a pull-up resistor RP3; The photocoupler D1 is electrically connected to the digital request line Data_Request through a current-limiting resistor RP5; The photocoupler D1 is also electrically connected to the signal M_P1_RXD of the single-chip microcomputer MCU; The photocoupler DP5 is electrically connected to DVDD through a current-limiting resistor RP7; The transistor QP1 is used for waveform reverse action; One end of the photocoupler DP5 is connected to the signal Data_Reques, and the other end is connected to a resistor RP10, and the other end of the resistor RP10 is connected to the ground; The other end of the photocoupler DP5 is connected to the base of the transistor QP2 through a parallel connection of a capacitor CP2 and a resistor RP9, the emitter of the transistor QP2 is connected to the ground, and the collector is connected to a resistor RP6 and a resistor PR8, respectively; The collector of the transistor QP1 is connected to the P1_Data signal.
2. The P1 port circuit of claim 1, wherein: The P1 port communication circuit is used for electrical connection with an external OSM device.
3. The P1 port circuit of claim 2, wherein: The digital request line Data_Request is connected to the ground through a TVS tube DP4; The current-limiting resistor RP5 of the photocoupler D1 provides an IF current for the photocoupler; A capacitor CCP2 is connected in parallel on the photocoupler D1.
4. The P1 port circuit of claim 3, wherein: The resistor PR8 is electrically connected between the base and the emitter of the transistor QP1; The collector of the transistor QP2 is connected to the base of the transistor QP1.
5. The P1 port circuit of claim 4, wherein: The P1 port communication circuit is electrically connected with a power supply module; M+5.5V is used for power supply of the P1 port; The DCDC circuit includes input filter capacitors CP1 and CP2, enable resistors RP4 and RP5, bootstrap capacitor CP6, freewheeling diode DP1, energy storage inductor LP1, feedback resistors RP6, RP7, and RP8, output filter capacitors CP4 and CP5, and DCDC chip UQ1; The 5-pin VIN of the DCDC chip UQ1 is connected to the parallel connection of filter capacitors CP1 and CP2, The 4-pin EN of the DCDC chip UQ1 is connected to voltage dividing resistors RP4 and RP5, SPM+12V is connected to the EN pin of the chip through voltage dividing resistors RP4 and RP5; When the EN pin exceeds the threshold value of the chip, the DCDC chip UQ1 works normally; when the EN pin is lower than the threshold value of the chip, the DCDC chip UQ1 stops working; The 3-pin FB of the DCDC chip UQ1 is connected to resistors RP6, RP7, and RP8 connected to M+5.5V; the freewheeling diode DP1 provides a freewheeling loop for the inductor current when the MOS inside the DCDC chip UQ1 is off; The M+5.5V power supply output by the DCDC chip UQ1 is output to R+5.5V through the current-limiting chip UP1; The 4-pin ILIMIT of the current-limiting chip UP1 is connected to resistors RP1 and RP2. The 5-pin VIN of the current limiting chip UP1 is connected with the filter capacitor CP7; the 6-pin DV / DT of the current limiting chip UP1 is connected with the capacitor CP8 and the ground, as a soft start pin; The 1-pin EN of the current limiting chip UP1 is connected with the resistors RP9 and RP10, and the voltage after the voltage division of the resistors RP9 and RP10 reaches the threshold value of the EN pin; the 2-pin SOURCE of the current limiting chip UP1 is connected with the capacitor CP3 and the EP1.
6. The P1 port circuit of claim 1, wherein: The power module comprises a high-frequency transformer TRN1; the high-frequency transformer TRN1 outputs a power supply SPM+12V; The 7-pin and the 8-pin of the high-frequency transformer TRN1 are connected with the diode DN1; the resistor RN1 and the capacitor CN1 are connected in series and then connected in parallel to the two ends of the diode DN1; The output end of the diode DN1 is electrically connected with a Π type filter circuit; The Π type filter circuit is electrically connected with the resistor RN2.
7. The P1 port circuit of claim 6, wherein: The Π type filter circuit comprises an electrolytic capacitor EN1, an inductor LN1 and an electrolytic capacitor EN2; The resistor RN2 is a false load of the power supply SPM+12V.
8. The P1 port circuit of claim 7, wherein: The SPM+12V is electrically connected with a DCDC circuit output M+5.5V.