USB interface expansion circuit

By combining components such as communication modules, power control units, and switching units, it is possible to expand the USB interface while maintaining full functionality without increasing power consumption. This solves the limitations in the selection of USB interface expansion and the power consumption problem in existing technologies, and improves the device's battery life.

CN224052637UActive Publication Date: 2026-03-27FUJIAN CENTM INFORMATION
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-03-20
Publication Date
2026-03-27

AI Technical Summary

Technical Problem

In the existing technology, there are limitations in the selection of CPUs or communication modules with two or more USB interfaces. HUB chip expansion can only realize the HOST interface, and PCIe interface expansion leads to high power consumption and reduced device battery life.

Method used

The device employs a combination of a communication module, a power control unit, a first USB switch unit, a second USB switch unit, a PCIe to USB chip, and a HUB chip. Through control signals and power management, it enables the expansion and function switching of the USB interface, ensuring optimal power consumption in different states.

Benefits of technology

Without increasing device power consumption, multiple USB ports are added and a full-featured interface is implemented to improve the device's battery life.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model relates to the technical field of USB (Universal Serial Bus) interface expansion, in particular to a USB interface expansion circuit, which comprises a communication module, a power supply control unit, a first USB switch unit, a second USB switch unit, a PCIE (Peripheral Component Interface Express) to USB chip and an HUB chip, the first USB switch unit is respectively and electrically connected with a USB interface of the communication module, the second USB switch unit and a Type C interface on the handheld terminal equipment, the second USB switch unit is respectively and electrically connected with the PCIE-to-USB chip and the HUB chip, and the power supply control unit is respectively and electrically connected with a PCIE port of the communication module and the PCIE-to-USB chip, so that when the communication module with only one USB interface is selected, the communication module with only one USB interface is selected, and the communication module with only one USB interface is selected. A plurality of USB interfaces can be expanded, a full-function USB interface is provided, meanwhile, the power consumption of a product is not increased, and the cruising ability of the product is not reduced.
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Description

TECHNICAL FIELD

[0001] The utility model relates to USB interface extension technical field, especially a USB interface extension circuit. BACKGROUND

[0002] Handheld terminal equipment, most application scenes or customers need to configure multiple USB interfaces for external U disk or USB equipment communication, and the prior art generally uses the following ways to realize:

[0003] (1) directly using CPU or communication module with two or more than two USB interfaces;

[0004] (2) using CPU or communication module with one USB interface and combining HUB chip to expand USB interface;

[0005] (3) directly using PCIE interface to expand USB interface;

[0006] However, the above-mentioned ways have the following problems:

[0007] Method (1):Not all CPUs or communication modules are configured with two or more than two USB interfaces, causing the limitation of scheme selection;

[0008] Method (2):Directly expanding with HUB chip, so that the USB interface of CPU or communication module can only be used as HOST interface (i.e. host interface), cannot be used as Device interface (i.e. slave interface), and cannot realize full function of USB interface;

[0009] Method (3):Directly using PCIE interface to expand USB interface, since PCIE to USB chip has large power consumption, it will obviously reduce the endurance of handheld terminal equipment, and bring poor experience to customers. UTILITY MODEL CONTENT

[0010] The utility model solves the technical problem that when a CPU or communication module with only one USB interface is selected, multiple USB interfaces can be expanded, and the USB interfaces have full function, without increasing the power consumption of the product and reducing the endurance of the product.

[0011] In order to solve the above technical problem, the utility model adopts the technical scheme that:

[0012] A USB interface expansion circuit, comprising a communication module, a power supply control unit, a first USB switch unit, a second USB switch unit, a PCIE to USB chip and a HUB chip arranged on a handheld terminal equipment, wherein the communication module has one USB interface and one PCIE port.

[0013] The first USB switch unit is electrically connected with a USB interface of the communication module, the second USB switch unit and a Type C interface on the handheld terminal device respectively, the second USB switch unit is electrically connected with the PCIE-USB chip and the HUB chip respectively, and the power control unit is electrically connected with the PCIE port of the communication module and the PCIE-USB chip respectively.

[0014] The utility model discloses beneficial effect lies in:

[0015] The utility model discloses a communication module, power control unit, first USB switch unit, second USB switch unit, PCIE-USB chip and HUB chip are set up, and the communication module has a USB interface and a PCIE port, and the USB interface of communication module is electrically connected with the invariable end of first USB switch unit, and one movable end of first USB switch unit is electrically connected with one movable end of second USB switch unit, and the other movable end of first USB switch unit is electrically connected with the Type C interface on handheld terminal device, and the invariable end of second USB switch unit is electrically connected with the input end of HUB chip, and the other movable end of second USB switch unit is electrically connected with the output end of PCIE-USB chip, and power control unit is electrically connected with the PCIE port of communication module and the input end of PCIE-USB chip respectively, so that when the device is not factory -burned program, the USB interface of communication module is directly connected with the Type C interface of the device through first USB switch unit, and the device can realize program burning function normally, when the program is burned, and the default state of device (when Type C interface is not connected USB equipment or adapter), the USB interface of communication module is as host state, and the USB interface of communication module is connected with HUB chip through first USB switch unit and second USB switch unit, realizes the extension of USB interface of communication module, and power control unit does not power on PCIE-USB chip, and the whole power consumption of device decreases, and the endurance of device is increased, when Type C interface is connected USB equipment or adapter, power control unit powers on PCIE-USB chip, and PCIE-USB chip is connected with HUB chip through second USB switch unit, realizes the extension of USB interface of communication module, and the USB interface of communication module is directly connected with the Type C interface of the device through first USB switch unit, so that the Type C full -functional interface of device can be realized, so that when the CPU or communication module with only one USB interface is selected, not only multiple USB interfaces can be extended, but also full -functional USB interface is provided, and the power consumption of product is not increased, and the endurance of product is not reduced. BRIEF DESCRIPTION OF DRAWINGS

[0016] Figure 1The connection block diagram of the USB interface expansion circuit of the utility model;

[0017] Figure 2 The circuit principle diagram of the first USB switch unit of the utility model;

[0018] Figure 3 The circuit principle diagram of the second USB switch unit of the utility model;

[0019] Figure 4 The circuit principle diagram of the power control unit of the utility model;

[0020] Label explanation:

[0021] 1, communication module; 2, power control unit; 3, first USB switch unit; 4, second USB switch unit; 5, PCIE to USB chip; 6, HUB chip. Specific implementation mode

[0022] In order to explain the technical content, the purpose and the effect of the utility model in detail, the following will be explained by combining with the embodiment and the drawings.

[0023] Please refer to Figure 1 A USB interface expansion circuit, including communication module, power control unit, first USB switch unit, second USB switch unit, PCIE to USB chip and HUB chip arranged on handheld terminal equipment, the communication module has a USB interface and a PCIE port;

[0024] The first USB switch unit is respectively connected with the USB interface of the communication module, the second USB switch unit and the Type C interface on the handheld terminal equipment, the second USB switch unit is respectively connected with the PCIE to USB chip and the HUB chip, and the power control unit is respectively connected with the PCIE port of the communication module and the PCIE to USB chip.

[0025] From the above description, the utility model has the beneficial effect that:

[0026] The scheme is characterized in that the communication module, the power control unit, the first USB switch unit, the second USB switch unit, the PCIE-to-USB chip and the HUB chip are arranged, the communication module has one USB interface and one PCIE port, the USB interface of the communication module is electrically connected with the fixed terminal of the first USB switch unit, one movable terminal of the first USB switch unit is electrically connected with one movable terminal of the second USB switch unit, the other movable terminal of the first USB switch unit is electrically connected with the Type C interface on the handheld terminal device, the fixed terminal of the second USB switch unit is electrically connected with the input terminal of the HUB chip, the other movable terminal of the second USB switch unit is electrically connected with the output terminal of the PCIE-to-USB chip, and the power control unit is electrically connected with the PCIE port of the communication module and the input terminal of the PCIE-to-USB chip, so that when the device is not yet out of the factory for program burning, the USB interface of the communication module is directly connected with the Type C interface of the device through the first USB switch unit, so that the device can normally realize the program burning function; when the program is burned, the USB interface of the communication module is used as the host state in the default state of the device (at this time, the Type C interface is not connected with the USB device or the adapter), the USB interface of the communication module is connected with the HUB chip through the first USB switch unit and the second USB switch unit, the expansion of the USB interface of the communication module is realized, the power control unit does not power on the PCIE-to-USB chip, the overall power consumption of the device is reduced, and the endurance of the device is increased; when the Type C interface is connected with the USB device or the adapter, the power control unit powers on the PCIE-to-USB chip, the PCIE-to-USB chip is connected with the HUB chip through the second USB switch unit, the expansion of the USB interface of the communication module is realized, and at the same time, the USB interface of the communication module is directly connected with the Type C interface of the device through the first USB switch unit, so that the full-function Type C interface of the device is realized; so that when a CPU or a communication module with only one USB interface is selected, the scheme can not only expand multiple USB interfaces, but also has a full-function USB interface, without increasing the power consumption of the product and reducing the endurance of the product.

[0027] Further, the first USB switch unit comprises a chip U60, the model of the chip U60 is SGM7228, the third pin and the fifth pin of the chip U60 are electrically connected with the USB interface of the communication module, and the sixth pin of the chip U60 is electrically connected with one movable terminal of the second USB switch unit.

[0028] Further, the first USB switch unit further comprises resistors R509 and R513, one end of the resistor R509 is electrically connected with one end of the resistor R513 and the tenth pin of the chip U60, and the other end of the resistor R513 is grounded.

[0029] From the above description, the resistor R509 is convenient for debugging and signal testing, etc.; the resistor R513 is used to connect the SEL pin of the chip U60 to the ground when the USB_SEL is in a high resistance state.

[0030] Further, the first USB switch unit further comprises a resistor R512 and a capacitor C616, one end of the resistor R512 is electrically connected to the eighth pin of the chip U60, the other end of the resistor R512 is electrically connected to one end of the capacitor C616, and the other end of the resistor R512 and one end of the capacitor C616 are both grounded, the other end of the capacitor C616 is electrically connected to the ninth pin of the chip U60, and the other end of the capacitor C616 and the ninth pin of the chip U60 are both connected to a power supply of a first preset voltage.

[0031] From the above description, the resistor R512 is used to connect the OE pin of the chip U60 to the ground, so that the chip can work normally; the capacitor C616 is used to filter the power supply end of the chip U60.

[0032] Further, the second USB switch unit comprises a chip U62, the model of the chip U62 is SGM7228, the first pin of the chip U62 is electrically connected to the output end of the PCIE to USB chip, the third pin and the fifth pin of the chip U62 are both electrically connected to the input end of the HUB chip, and the sixth pin of the chip U62 is electrically connected to one movable end of the first USB switch unit.

[0033] Further, the second USB switch unit further comprises a resistor R544 and a resistor R546, one end of the resistor R544 is respectively electrically connected to one end of the resistor R546 and the tenth pin of the chip U62, and the other end of the resistor R546 is grounded.

[0034] From the above description, the resistor R544 is convenient for debugging and signal testing, etc.; the resistor R546 is used to connect the SEL pin of the chip U62 to the ground when the USB_SEL is in a high resistance state.

[0035] Further, the second USB switch unit further comprises a resistor R545 and a capacitor C632, one end of the resistor R545 is electrically connected to the eighth pin of the chip U62, the other end of the resistor R545 is electrically connected to one end of the capacitor C632, and the other end of the resistor R545 and one end of the capacitor C632 are both grounded, the other end of the capacitor C632 is electrically connected to the ninth pin of the chip U62, and the other end of the capacitor C632 and the ninth pin of the chip U62 are both connected to a 3.3V power supply.

[0036] From the above description, the resistor R545 is used to connect the OE pin of the chip U62 to the ground, so that the chip can work normally; the capacitor C632 is used to filter the power supply end of the chip U62.

[0037] Further, the power control unit comprises a chip U5, a transistor Q7 and a MOS tube Q8, the chip U5 is SGM2037, the first pin of the chip U5 is electrically connected with the PCIE port of the communication module, the fourth pin of the chip U5 is electrically connected with the input end of the PCIE to USB chip, the source of the MOS tube Q8 is electrically connected with the PCIE port of the communication module, the gate of the MOS tube Q8 is electrically connected with the collector of the transistor Q7, the base of the transistor Q7 is electrically connected with the input end of the PCIE to USB chip, and the emitter of the transistor Q7 is grounded.

[0038] As known from the above description, when PCIE_1V5_EN outputs high level, the chip U5 works and outputs 1.05V voltage required by the PCIE to USB chip;

[0039] When PCIE_1V5_EN outputs low level, the chip U5 does not work and no 1.05V voltage is outputted;

[0040] When PCIE_3V3_EN outputs high level, the transistor Q7 and the MOS tube Q8 are turned on and 3.3V voltage required by the PCIE to USB chip is outputted;

[0041] When PCIE_3V3_EN outputs low level, the transistor Q7 and the MOS tube Q8 are cut off and no 3.3V voltage is outputted.

[0042] Further, the power control unit further comprises a capacitor C45, one end of the capacitor C45 is grounded, and the other end of the capacitor C45 is electrically connected with the first pin of the chip U5 and the PCIE port of the communication module respectively.

[0043] As known from the above description, the capacitor C45 is an energy storage filter capacitor for the chip power supply end.

[0044] Further, the power control unit further comprises a resistor R43 and a capacitor C66, one end of the resistor R43 is electrically connected with the input end of the PCIE to USB chip, the other end of the resistor R43 is electrically connected with one end of the capacitor C66 and the fourth pin of the chip U5 respectively, and the other end of the capacitor C66 is grounded.

[0045] As known from the above description, the resistor R43 is convenient for debugging and signal testing.

[0046] Please refer to Figures 1 to 4 The embodiment one of the utility model for:

[0047] Please refer to Figure 1A USB interface expansion circuit, comprising a communication module 1, a power control unit 2, a first USB switch unit 3, a second USB switch unit 4, a PCIE to USB chip 5 and a HUB chip 6 arranged on a handheld terminal device, the communication module 1 has a USB interface and a PCIE port;

[0048] The USB interface of the communication module 1 is electrically connected with the fixed terminal of the first USB switch unit 3, one movable terminal of the first USB switch unit 3 is electrically connected with one movable terminal of the second USB switch unit 4, the other movable terminal of the first USB switch unit 3 is electrically connected with a Type C interface on the handheld terminal device, the fixed terminal of the second USB switch unit 4 is electrically connected with the input terminal of the HUB chip 6, the other movable terminal of the second USB switch unit 4 is electrically connected with the output terminal of the PCIE to USB chip 5, and the power control unit 2 is respectively electrically connected with the PCIE port of the communication module 1 and the input terminal of the PCIE to USB chip 5.

[0049] Please refer to Figure 2 The first USB switch unit 3 comprises a chip U60, the model of the chip U60 is SGM7228, the third pin and the fifth pin of the chip U60 are electrically connected with the USB interface of the communication module 1, and the sixth pin of the chip U60 is electrically connected with one movable terminal of the second USB switch unit 4.

[0050] Please refer to Figure 2 The first USB switch unit 3 further comprises a resistor R509 and a resistor R513, one end of the resistor R509 is respectively electrically connected with one end of the resistor R513 and the tenth pin of the chip U60, and the other end of the resistor R513 is grounded.

[0051] Please refer to Figure 2 The first USB switch unit 3 further comprises a resistor R512 and a capacitor C616, one end of the resistor R512 is electrically connected with the eighth pin of the chip U60, the other end of the resistor R512 is electrically connected with one end of the capacitor C616, and the other end of the resistor R512 and one end of the capacitor C616 are both grounded, the other end of the capacitor C616 is electrically connected with the ninth pin of the chip U60, and the other end of the capacitor C616 and the ninth pin of the chip U60 are both connected with a first preset power supply (i.e. 3.3V).

[0052] Please refer to Figure 3The second USB switch unit 4 comprises a chip U62, the model of the chip U62 is SGM7228, the first pin of the chip U62 is electrically connected with the output end of the PCIE-USB chip 5, the third pin and the fifth pin of the chip U62 are electrically connected with the input end of the HUB chip 6, and the sixth pin of the chip U62 is electrically connected with one of the movable ends of the first USB switch unit 3.

[0053] Please refer to Figure 3 The second USB switch unit 4 further comprises a resistor R544 and a resistor R546, one end of the resistor R544 is electrically connected with one end of the resistor R546 and the tenth pin of the chip U62, and the other end of the resistor R546 is grounded.

[0054] Please refer to Figure 3 The second USB switch unit 4 further comprises a resistor R545 and a capacitor C632, one end of the resistor R545 is electrically connected with the eighth pin of the chip U62, the other end of the resistor R545 is electrically connected with one end of the capacitor C632, and the other end of the resistor R545 and one end of the capacitor C632 are grounded, the other end of the capacitor C632 is electrically connected with the ninth pin of the chip U62, and the other end of the capacitor C632 and the ninth pin of the chip U62 are connected with a 3.3V power supply.

[0055] In the embodiment, the number of the HUB chip 6 can be reasonably configured according to actual needs, if there are two HUB chips 6, one HUB chip 6 can have four USB interfaces, one of which is electrically connected with another HUB chip 6, so that four USB interfaces can be expanded, and the same is true for three HUB chips 6, four chips and more HUB chips 6.

[0056] Please refer to Figure 4 The power control unit 2 comprises a chip U5, a transistor Q7 and a MOS tube Q8, the model of the chip U5 is SGM2037, the first pin of the chip U5 is electrically connected with the PCIE port of the communication module 1, the fourth pin of the chip U5 is electrically connected with the input end of the PCIE-USB chip 5, the source electrode of the MOS tube Q8 is electrically connected with the PCIE port of the communication module 1, the gate electrode of the MOS tube Q8 is electrically connected with the collector electrode of the transistor Q7, the base electrode of the transistor Q7 is electrically connected with the input end of the PCIE-USB chip 5, and the emitter electrode of the transistor Q7 is grounded.

[0057] Please refer to Figure 4 The power control unit 2 further comprises a capacitor C45, one end of the capacitor C45 is grounded, and the other end of the capacitor C45 is electrically connected with the first pin of the chip U5 and the PCIE port of the communication module 1 respectively.

[0058] Please refer to Figure 4 , the power control unit 2 further comprises a resistor R43 and a capacitor C66, one end of the resistor R43 is electrically connected with the input end of the PCIE to USB chip 5, the other end of the resistor R43 is electrically connected with one end of the capacitor C66 and the fourth pin of the chip U5 respectively, the other end of the capacitor C66 is grounded.

[0059] The power control unit 2 further comprises a capacitor C47, a resistor R41, a capacitor C68, a capacitor C61, a resistor R47, a capacitor C219, a resistor R244, a capacitor C213, a resistor R229, a capacitor C196, a capacitor C192, a resistor R238 and a resistor R218, and the specific connection relationship between each device is please refer to Figure 4 .

[0060] The working principle of the above-mentioned USB interface expansion circuit is:

[0061] ①When the device is not factory programmed, the control signal end USB_SEL of the chip U60 is connected with the IO port of the communication module 1 which outputs low level state by default, at this time, the third pin of the chip U60 is connected with the first pin, the fifth pin of the chip U60 is connected with the seventh pin, so that the USB port of the communication module 1 is directly connected with the Type C interface of the device, so that the device can realize the normal program burning function;

[0062] ②When the device is default boot state after burning the program, the USB interface of the communication module 1 is in host state, the power supply enable pin PCIE_1V5_EN and PCIE_3V3_EN of the PCIE to USB chip 5 is low, the PCIE to USB chip 5 is not powered, so that the whole power consumption of the device is reduced, and the endurance of the device is increased.

[0063] The control signal end USB_SEL of the chip U62 outputs high level, at this time, the third pin of the chip U62 is connected with the second pin, the fifth pin of the chip U62 is connected with the seventh pin, so that the USB interface of the communication module 1 is connected with the uplink port of the HUB chip 6, realizing the expansion of the USB interface of the communication module 1;

[0064] ③In the USB interface of the communication module 1 as the host state, the CC signal is constantly in the flip state, and whether the Type C interface of the monitoring equipment is inserted into the external device is monitored; when a Host device such as an adapter, a computer terminal, etc. is inserted, the CC pin will be pulled up, and the communication module 1 can recognize that the Host device is inserted; when a Device device such as a U disk, etc. is inserted, the CC pin will be pulled down, and the communication module 1 can recognize that the Device device is inserted; no matter whether the communication module 1 recognizes that the Host device or the Device device is inserted, the control signal end USB_SEL of the chip U60 outputs a low level, so that the USB port of the communication module 1 is directly connected to the Type C interface of the device, and the USB configuration Host role is released at the same time, and what role is actually played is determined by the inserted external device, so that the full-function interface of the Type C of the device is realized.

[0065] The control signal end USB_SEL of the chip U62 outputs a low level, so that the uplink port of the HUB chip 6 is connected to the downlink port of the PCIE-to-USB chip 5, and meanwhile, the power supply enable pins PCIE_1V5_EN and PCIE_3V3_EN of the PCIE-to-USB chip 5 are set high, the PCIE-to-USB chip 5 is powered on, the USB interface is expanded through the PCIE-to-USB chip 5, and the expansion of the USB interface of the device is realized.

[0066] In summary, the utility model provides a kind of USB interface extension circuit, the scheme is provided with communication module, power control unit, first USB switch unit, second USB switch unit, PCIE turns USB chip and HUB chip, communication module has a USB interface and a PCIE port, the USB interface of communication module is electrically connected with the fixed end of first USB switch unit, one movable end of first USB switch unit is electrically connected with one movable end of second USB switch unit, another movable end of first USB switch unit is electrically connected with the Type C interface on handheld terminal device, the fixed end of second USB switch unit is electrically connected with the input end of HUB chip, another movable end of second USB switch unit is electrically connected with the output end of PCIE turns USB chip, power control unit is electrically connected with the PCIE port of communication module and the input end of PCIE turns USB chip respectively, so when equipment is not factory for program burning, the USB interface of communication module is directly connected with the Type C interface of equipment by first USB switch unit, so that equipment can normally realize program burning function;When program is burned, equipment default state of starting (when Type C interface is not connected with USB equipment or adapter), the USB interface of communication module is used as host state, the USB interface of communication module is connected with HUB chip by first USB switch unit and second USB switch unit, the expansion of the USB interface of communication module is realized, power control unit is powered on PCIE turns USB chip, so that the overall power consumption of equipment is reduced, and the endurance of equipment is increased;When Type C interface is connected with USB equipment or adapter, power control unit is powered on PCIE turns USB chip, PCIE turns USB chip is connected with HUB chip by second USB switch unit, the expansion of the USB interface of communication module is realized, and the USB interface of communication module is directly connected with the Type C interface of equipment by first USB switch unit, so that the Type C full function interface of equipment is realized;So when CPU or communication module with only one USB interface is selected, not only multiple USB interfaces can be expanded, but also full function USB interface is provided, without increasing the power consumption of product and reducing the endurance of product.

[0067] The above only describes the embodiments of the utility model, and does not limit the patent range of the utility model, and any equivalent transformation or direct or indirect application in related technical field using the contents of the utility model specification and drawings is also included in the patent protection range of the utility model.

Claims

1. A USB interface expansion circuit, characterized in that, The application relates to a handheld terminal device, which comprises a communication module, a power control unit, a first USB switch unit, a second USB switch unit, a PCIE-USB chip and a HUB chip. The first USB switch unit is electrically connected with the USB interface of the communication module, the second USB switch unit and a Type C interface on the handheld terminal device, the second USB switch unit is electrically connected with the PCIE-USB chip and the HUB chip, and the power control unit is electrically connected with the PCIE port of the communication module and the PCIE-USB chip.

2. The USB interface extension circuit according to claim 1, characterized in that, The first USB switch unit comprises a chip U60, the model of the chip U60 is SGM7228, the third pin and the fifth pin of the chip U60 are electrically connected with the USB interface of the communication module, and the sixth pin of the chip U60 is electrically connected with one movable end of the second USB switch unit.

3. The USB interface extension circuit according to claim 2, characterized in that, The first USB switch unit further comprises a resistor R509 and a resistor R513, one end of the resistor R509 is electrically connected with one end of the resistor R513 and the tenth pin of the chip U60, and the other end of the resistor R513 is grounded.

4. The USB interface extension circuit according to claim 2, characterized in that, The first USB switch unit further comprises a resistor R512 and a capacitor C616, one end of the resistor R512 is electrically connected with the eighth pin of the chip U60, the other end of the resistor R512 is electrically connected with one end of the capacitor C616, the other end of the resistor R512 and one end of the capacitor C616 are grounded, the other end of the capacitor C616 is electrically connected with the ninth pin of the chip U60, and the other end of the capacitor C616 and the ninth pin of the chip U60 are connected with a power supply of a first preset voltage.

5. The USB interface extension circuit according to claim 1, characterized in that, The second USB switch unit comprises a chip U62, the model of the chip U62 is SGM7228, the first pin of the chip U62 is electrically connected with the output end of the PCIE-USB chip, the third pin and the fifth pin of the chip U62 are electrically connected with the input end of the HUB chip, and the sixth pin of the chip U62 is electrically connected with one movable end of the first USB switch unit.

6. The USB interface extension circuit according to claim 5, characterized in that, The second USB switch unit further comprises a resistor R544 and a resistor R546, one end of the resistor R544 is electrically connected with one end of the resistor R546 and the tenth pin of the chip U62, and the other end of the resistor R546 is grounded.

7. The USB interface extension circuit according to claim 5, characterized in that, The second USB switch unit further comprises a resistor R545 and a capacitor C632, one end of the resistor R545 is electrically connected with the eighth pin of the chip U62, the other end of the resistor R545 is electrically connected with one end of the capacitor C632, the other end of the resistor R545 and one end of the capacitor C632 are grounded, the other end of the capacitor C632 is electrically connected with the ninth pin of the chip U62, and the other end of the capacitor C632 and the ninth pin of the chip U62 are connected with a 3.3V power supply.

8. The USB interface extension circuit according to claim 1, characterized in that, The power control unit comprises a chip U5, a transistor Q7 and a MOS tube Q8, the model of the chip U5 is SGM2037, the first pin of the chip U5 is electrically connected with the PCIE port of the communication module, the fourth pin of the chip U5 is electrically connected with the input end of the PCIE to USB chip, the source of the MOS tube Q8 is electrically connected with the PCIE port of the communication module, the gate of the MOS tube Q8 is electrically connected with the collector of the transistor Q7, the base of the transistor Q7 is electrically connected with the input end of the PCIE to USB chip, and the emitter of the transistor Q7 is grounded.

9. The USB interface extension circuit according to claim 8, characterized in that, The power control unit further comprises a capacitor C45, one end of the capacitor C45 is grounded, and the other end of the capacitor C45 is electrically connected with the first pin of the chip U5 and the PCIE port of the communication module respectively.

10. The USB interface extension circuit according to claim 8, characterized in that, The power control unit further comprises a resistor R43 and a capacitor C66, one end of the resistor R43 is electrically connected with the input end of the PCIE to USB chip, the other end of the resistor R43 is electrically connected with one end of the capacitor C66 and the fourth pin of the chip U5 respectively, and the other end of the capacitor C66 is grounded.