Power supply switching circuit of three-phase intelligent electric meter

Abstract

The utility model relates to a power switching circuit of a three-phase intelligent electric meter. The power switching circuit comprises a power supply circuit, a super capacitor circuit, a meter reading stopping battery circuit, a clock battery circuit and a battery control circuit which are electrically connected, the power supply circuit comprises a power supply BAT1 and a direct current step-down circuit which are electrically connected; the DC step-down circuit comprises a DC-DC chip UQ3; the super capacitor circuit comprises a voltage stabilizer UQ2; a pin 1 of the voltage stabilizer UQ2 is grounded, and a pin 2 of the voltage stabilizer UQ2 is connected with three paths of input voltage; a pin 2 of the voltage stabilizer UQ2 is grounded through a super capacitor EV1; a pin 3 outputs three paths, one path outputs 4.0 V, one path outputs MVDD through a capacitor CV4, and the other path outputs MVDD through a diode DV9; the device is reasonable in design, compact in structure and convenient to use.

Description

TECHNICAL FIELD

[0001] The utility model relates to three -phase intelligent electric meter power supply switching circuit. BACKGROUND

[0002] Today, with the increasing popularity of smart grids, three -phase intelligent electric meters not only bear the heavy responsibility of accurate metering of electric energy, but also integrate advanced functions such as remote communication, data analysis and fault warning. These all put forward more strict standards for its power supply system.

[0003] In order to ensure that the tasks can be stably and accurately executed when the mains power supply is normal, the three -phase intelligent electric meter takes the stable mains as the main power supply. However, considering the possible emergencies of the power grid, such as natural disasters, equipment failures or planned power outages, the importance of backup power supply is particularly emphasized in the design of the electric meter. In the case of power failure, the three -phase intelligent electric meter needs to rely on the internal integrated energy storage device (such as super capacitor or electrolytic capacitor), which can provide enough energy in a short time to support the electric meter to complete the carrier data reporting (i. e. power failure reporting function) and other key functions. This function allows the electric meter to send power failure information to the power grid management system immediately after losing the main power supply, including the total number of power failures and the cumulative power failure time, the time of the last 100 power failures and the end, the average current of the last 3 minutes before the power failure, etc. It helps the power grid operation unit to analyze and judge the power failure event, start the emergency response mechanism and reduce the impact of power failure on users.

[0004] In addition, in order to ensure that on -site meter reading operation can still be carried out during power failure, the three -phase intelligent electric meter is also equipped with a special power failure meter reading battery. This battery is designed to have a long service life and can provide continuous power supply for the display module and meter reading interface of the electric meter when the main power supply and carrier communication power supply are both invalid. In this way, even in a completely power -off environment, meter reading personnel can rely on handheld meter reading equipment or the display interface of the intelligent electric meter to accurately read the power consumption data.

[0005] At the same time, in order to ensure that the electric meter still has an accurate clock under extreme conditions and prevent unauthorized opening of the meter cover to steal electricity, the three -phase intelligent electric meter is built -in clock battery. The clock battery is a low -power, long -life battery that can power the microcontroller and cover opening detection circuit of the electric meter when all external power supply is completely invalid, ensuring the continuous accuracy of time information and recording the opening of the meter cover event.

[0006] In summary, the technical background of three -phase intelligent electric meter reflects the comprehensive consideration of power supply stability, emergency power management and time synchronization capability. These designs ensure that the electric meter can function under various conditions and provide solid technical support for the reliable operation of smart grids.

[0007] In the new intelligent three-phase meter power supply system, in order to ensure that the meter can realize long-term and stable operation performance, a multi-path power supply architecture must be built. This architecture covers a variety of power supply modes: in the normal power supply state, the mains is used as the main energy; in the initial stage of power failure, the super capacitor is switched to maintain short-term power supply; when the super capacitor is exhausted, the meter reading battery is started to continue to maintain the system operation; finally, if all the above power supply means fail, the clock battery is relied on to maintain the basic operation function of the microcontroller (MCU). Since the input and output (IO) port resources of the MCU are valuable and limited, how to realize the seamless switching and cooperation of the above four power supply modes in the preset order without additional occupation of MCU resources, and ensure the stability of the meter power supply, has become a problem to be solved in the intelligent three-phase meter power supply system. Practical new type content

[0008] The technical problem to be solved by the utility model is to provide a three-phase intelligent meter power switching circuit.

[0009] To solve the above problems, the technical scheme adopted by the utility model is:

[0010] A three-phase intelligent meter power switching circuit, comprising a power supply circuit, a super capacitor circuit, a meter reading battery circuit, a clock battery circuit and a battery control circuit connected electrically;

[0011] Among them, the power supply circuit outputs 5.2V voltage and is connected to the super capacitor circuit; the super capacitor circuit, the meter reading battery circuit and the clock battery circuit each output one MVDD for the main system power supply in the intelligent meter; the battery control circuit outputs a control signal Power Battery Ctr and is connected to the meter reading battery circuit and the clock battery circuit to control the two battery switches.

[0012] The power supply circuit comprises a power supply BAT1 and a DC-DC circuit connected electrically; the DC-DC circuit comprises a DC-DC chip UQ3;

[0013] The super capacitor circuit comprises a voltage stabilizer UQ2; the pin 1 of the voltage stabilizer UQ2 is grounded, the pin 2 is connected to three input voltages respectively; the pin 2 of the voltage stabilizer UQ2 is grounded through a super capacitor EV1; the pin 3 outputs three paths, one path outputs 4.0V, one path passes through a capacitor CV4, and one path outputs MVDD through a diode DV9;

[0014] The meter reading battery circuit comprises a meter reading battery BAT1 and a voltage stabilizer UQ1 connected electrically; the pin 3 of the voltage stabilizer UQ1 is connected to the pin 2 of a PMOS tube QK2;

[0015] The pin 1 of MOS tube QK2 is connected to Power Battery Ctr through resistor RV5, and the pin 3 is connected to MVDD end through diode DV6;

[0016] The pin 1 of the stop copying battery BAT1 is grounded, and the pin 2 is electrically connected to the pin 2 of the voltage stabilizer UQ1 through diode DV5;

[0017] The clock battery circuit comprises a PMOS tube QK1; the pin 2 of the PMOS tube QK1 is connected to the clock battery BAT2 through diode DV3; the pin 1 of the PMOS tube QK1 is connected to Power Battery Ctr through resistor RV4; and the pin 3 of the PMOS tube QK1 is connected to MVDD end through diode DV4;

[0018] The battery control circuit comprises three paths of Power Battery Ctr, one path of which is connected to ground through resistor RV1, the second path of which is connected to MVDD end through diode DV2, and the third path of which is connected to voltage VCC1 through resistor RV3 and Zener diode DV1.

[0019] As a further improvement of the above technical solution:

[0020] In the power supply circuit, in the DC-DC chip UQ3, the pin 5 is connected to VCC1 end, and the pin 5 is connected to VCC1 end through resistor RQ1; the pin 2 is grounded, and the pin 6 outputs two paths, one path of which outputs 5.2V through inductor LQ1, and the other path of which is grounded through reverse connection Zener diode DV10; the pin 1 is connected to pin 6 through series connection of resistor RQ3 and capacitor CQ2, and the pin 3 is divided into two paths, one path of which is grounded through resistor RQ2, and the other path of which outputs 5.2V through series connection of voltage dividing resistors RQ4 and RQ5;

[0021] The 5.2V end is grounded through parallel connection of capacitors CQ3 and CQ4;

[0022] The VCC1 end is grounded through capacitor CQ1;

[0023] The pin 3 of the DC-DC chip UQ3 outputs 0.97V, and the output voltage is set through voltage dividing resistors RQ4 and RQ5.

[0024] In the super capacitor circuit, one path of the two input voltages is connected to 5.2V through diode DV8, and the other path is connected to 5.2V through capacitor CV3 and resistor group of parallel connection of resistors RV6 and RV7.

[0025] In the stop copying battery circuit, the pin 1 of the voltage stabilizer UQ1 is grounded, the pin 2 is grounded through capacitor CV1, and the pin 3 outputs, and the pin 3 is grounded through capacitor CV2.

[0026] In the DC-DC chip UQ3, the VIN pin is an input voltage pin, connected to the input voltage VCC1; the EN pin is an enable pin of the chip, which is effective at high level, connected to the input voltage VCC1 through the resistor RQ1; the GND pin is a ground pin of the DC-DC chip UQ3, connected to GND; the SW pin is an output pin of the DC-DC chip UQ3, connected to the inductor LQ1; the BST pin is connected between the SW pin and the resistor RQ3 through the capacitor CQ5; the FB pin is a feedback pin, through the voltage dividing resistors RQ4, RQ5 and RQ6, the required output voltage value is set; the Zener diode DV11 is a freewheeling diode, which forms a freewheeling circuit with the inductor LQ1; the capacitors CQ3 and CQ4 are output capacitors; the capacitor CQ1 is an input capacitor, which provides stable input current for UQ3 and stabilizes the input voltage.

[0027] In the super capacitor circuit, the 5.2V DC output by the DC-DC converter is supplied to the super capacitor EV1 through the diode DV7 and the parallel resistors RV6 and RV7; the resistors RV6 and RV7 are current limiting resistors, and the diode DV7 is used to prevent the current of the super capacitor from flowing back to the front end; the 5.2V and the super capacitor EV1 get a 5V voltage through the double diode DV8, and output a 4V DC voltage through the voltage stabilizer UQ2; the capacitors CV3 and CV4 are input and output capacitors of the voltage stabilizer UQ2.

[0028] In the copy battery circuit, the 6V voltage output by the copy battery is input to the voltage stabilizer UQ1 through the diode DV5, and the voltage stabilizer UQ1 outputs a 3.6V DC voltage; the capacitors CV1 and CV2 are input and output capacitors of the voltage stabilizer UQ1 respectively; the Power_Battery_Ctr voltage controls the conduction and shutdown of the PMOS transistor QK2, and determines whether the voltage of the battery BAT1 is supplied to MVDD.

[0029] In the clock battery circuit, the Power_Battery_Ctr voltage controls the conduction and shutdown of the PMOS transistor QK1, and determines whether the voltage of the clock battery BAT2 is supplied to MVDD.

[0030] In the battery control circuit, when normally powered on, the voltage at the Power_Battery_Ctr point is clamped at MVDD+Vf, and Vf is the forward conduction voltage drop of the diode DV2; the Zener voltage of the Zener diode DV1 is 5.1V, and the VCC1 of 12V is reduced to 6.9V after passing through the Zener diode DV1; the resistor RV3 is used to limit the current and withstand the voltage difference between the anode of the Zener diode and the Power_Battery_Ctr; when the voltage of VCC1 is lower than 5.1V, the voltage supply to the circuit is stopped, at this time the remaining energy in the circuit is discharged through the resistor RV1, and the voltage at the Power_Battery_Ctr point begins to gradually decrease.

[0031] The resistors RV1 and RV2 are connected in parallel and jointly determine the size of the current in the path from VCC1 to GND when DV2 is turned on.

[0032] The power supply switching method of the three-phase intelligent electric meter comprises the circuit; when normally powered, 12V DC voltage is present at VCC1, and 5.2V voltage is obtained through the DC-DC chip UQ3; one way of the 5.2V voltage is used to charge the super capacitor EV1, and the super capacitor EV1 is charged to 5V; another way of the 5.2V voltage is used to obtain 5V voltage through the diode DV8 with a 0.2V voltage reduction, and the 5V voltage is used as the input voltage of the voltage stabilizer UQ2; the voltage stabilizer UQ2 outputs stable 4V DC voltage, and the 4V DC voltage is reduced by about 0.2V through the diode DV9 to obtain 3.8V MVDD, which is used to supply power to the corresponding module in the electric meter.

[0033] As a further improvement of the above technical solution:

[0034] When a sudden power failure occurs, the super capacitor EV1 starts to supply power, and 4.8V voltage is obtained through the diode DV8, which is used as the input voltage of the voltage stabilizer UQ2; the voltage stabilizer UQ2 outputs stable 4V DC voltage, and the 4V DC voltage is reduced by about 0.2V through the diode DV9 to obtain 3.8V MVDD, which is used to supply power to the corresponding module in the electric meter;

[0035] At the same time, the voltage of VCC1 gradually decreases, and when the voltage decreases to 5.1V, the Zener diode DV1 stops conducting and stops providing voltage for the circuit, at this time, the remaining energy in the circuit is discharged through the resistor RV1, and the voltage of Power_Battery_Ctr gradually decreases;

[0036] When the voltage of Power_Battery_Ctr decreases to the output voltage of the voltage stabilizer UQ1 + Vgs, i.e. 3.05V, the PMOS tube QK2 is turned on;

[0037] At this time, the Power_Battery starts to supply power to MVDD through the 3.6V voltage output by the voltage stabilizer UQ1, and after the voltage drop of 0.2V through the diode DV6, 3.4V MVDD is obtained; when the voltage of Power_Battery_Ctr decreases to the voltage of the clock battery - the forward conduction voltage drop of the diode DV3 + Vgs, the voltage stabilizer UQ2 is turned on, and the clock battery starts to supply power to MVDD; after the voltage drop of the diodes DV3 and DV4, MVDD is obtained.

[0038] The utility model realizes seamless switching of four modes of power supply, super capacitor power supply, Power_Battery power supply and clock battery power supply, and has the following specific advantages:

[0039] 1. Without occupying the IO port resource of MCU. Before wanting to control different power supply switching, of course, can control the triode or MOS tube through the IO port of MCU to achieve the purpose. But now the function of three-phase intelligent electric meter is more and more, the IO port resource of MCU is also more and more nervous, cannot squeeze out the resource for power switching. The utility model does not need to occupy the IO port resource, completes the circuit switching through Power_Battery_Ctr and voltage competition, saves the MCU resource.

[0040] 2. Through the switch control battery starting, guarantees not to waste the battery power when there is other power supply. When there is commercial power supply, the MOS tube QK1, QK2 is in the off state, only when VCC1 voltage is insufficient, the battery will be automatically turned on to avoid the slow loss of battery power when the commercial power supply.

[0041] The utility model discloses reasonable in design, low in cost, solid and durable, safe and reliable, simple to operate, save time and effort, save money, compact structure and convenient to use. BRIEF DESCRIPTION OF DRAWINGS

[0042] Figure 1 It is the direct current voltage reduction circuit of the utility model.

[0043] Figure 2 It is the super capacitor circuit of the utility model.

[0044] Figure 3 It is the stop battery circuit of the utility model.

[0045] Figure 4 It is the clock battery circuit of the utility model.

[0046] Figure 5 It is the battery control circuit of the utility model.

[0047] Figure 6 It is the block diagram of the utility model. DETAILED DESCRIPTION

[0048] As Figures 1-6 , the utility model scheme is divided into five parts of power supply circuit, super capacitor circuit, stop battery circuit, clock battery circuit and battery control circuit.

[0049] The direct current voltage reduction circuit is as Figure 1As shown in part, its core is DC-DC chip UQ3, which can reduce VCC1 of 12V to 5.2V. Among them, VIN foot is input voltage pin, connected to the input voltage VCC1; EN foot is the enable foot of the chip, high level is effective, connected to the input voltage VCC1 through resistance RQ1; GND pin is the ground pin of UQ3, connected to GND; SW pin is the output pin of DC-DC chip, connected to inductor LQ1; BST pin is connected between SW pin and self bootstrap capacitor CQ5 and current limiting resistor RQ3; FB is feedback pin, its typical voltage is 797mV, the required output voltage value is set through voltage dividing resistor RQ4, RQ5 and RQ6; DV11 is a freewheeling diode, which forms a freewheeling circuit with inductor LQ1; CQ3 and CQ4 are output capacitors, which reduce the output ripple voltage and ripple current of DCDC circuit; CQ1 is an input capacitor, which provides stable input current for UQ3 and stabilizes the input voltage.

[0050] The super capacitor circuit is as shown in Figure 2 5.2V DC output by the DC voltage reduction circuit through diode DV7 and parallel resistor RV6, RV7 to supply power to the super capacitor. RV6, RV7 are current limiting resistors to prevent excessive current at the initial charging stage; diode DV7 is used to prevent the electric current of super capacitor from flowing back to the front end. 5.2V and super capacitor through double diode DV8 get about 5V voltage, through low dropout regulator UQ2 output stable 4V DC voltage. Capacitors CV3, CV4 are input and output capacitors of UQ2, respectively used to suppress the influence of input end interference on LDO and the interference of LDO output on other circuits.

[0051] The stop copying battery circuit is as shown in Figure 3 BAT1 is a 6V stop copying battery. The 6V voltage output by the stop copying battery is input to low dropout regulator UQ1 through diode DV5, and UQ1 outputs stable 3.6V DC voltage; diode DV5 prevents the current from flowing back to the battery charging; capacitors CV1, CV2 are input and output capacitors of UQ1, respectively used to suppress the influence of input end interference on LDO and the interference of LDO output on other circuits. Power_Battery_Ctr voltage controls the conduction and shutdown of PMOS tube QK2, determines whether the battery voltage supplies MVDD; the resistance RV5 of the MOS tube gate is used to limit the current and eliminate the oscillation signal; diode DV6 prevents the current of MVDD from flowing back.

[0052] The clock battery circuit is as shown in Figure 4BAT2 is a 3.6V clock battery. Power_Battery_Ctr controls the on and off of PMOS QK1, and determines whether the clock battery voltage is supplied to MVDD; the resistance of the MOS gate RV4 is used to limit the current and eliminate the oscillation signal; diodes DV3 and DV4 prevent current from flowing back while providing a voltage drop of about 0.4V.

[0053] The battery control circuit is as shown. Figure 5 When normally powered on, the voltage at Power_Battery_Ctr is clamped at MVDD+Vf, and Vf is the forward conduction voltage drop of diode DV2; the zener voltage of zener diode DV1 is 5.1V, and VCC1 of 12V is reduced to 6.9V after passing through zener diode DV1; resistor RV3 is used to limit the current and withstand the voltage difference between the anode of the zener diode and Power_Battery_Ctr; when the voltage of VCC1 is lower than 5.1V, it can no longer provide voltage to the circuit, at which time the remaining energy in the circuit is discharged through resistor RV1, and the voltage at Power_Battery_Ctr begins to gradually decrease. Resistors RV1 and RV2 are connected in parallel and together determine the size of the current in the path from VCC1 to GND when DV2 is turned on.

[0054] RQ1 is a patch resistor with a resistance of 100KΩ;

[0055] RQ2 is a patch resistor with a resistance of 12KΩ;

[0056] RQ3 is a patch resistor with a resistance of 10Ω;

[0057] RQ4 is a patch resistor with a resistance of 20KΩ;

[0058] RQ5 is a patch resistor with a resistance of 47KΩ;

[0059] RV1 is a patch resistor with a resistance of 1MΩ;

[0060] RV2 is a patch resistor with a resistance of 5.1KΩ;

[0061] RV3 is a patch resistor with a resistance of 51KΩ;

[0062] RV4, RV5, RV6, and RV7 are patch resistors with a resistance of 100Ω;

[0063] CQ1 is a patch ceramic capacitor with a capacity of 4.7uf and a withstand voltage of 50V;

[0064] CQ2 and CQ4 are patch ceramic capacitors with a capacity of 100nf and a withstand voltage of 50V;

[0065] CQ3 is a patch ceramic capacitor, capacity 10uf, voltage 10V;

[0066] CV1, CV2, CV3, CV4 are patch ceramic capacitors, capacity 10uf, voltage 16V;

[0067] EV1 is a super capacitor, voltage 5.5V, capacity 1.5F;

[0068] LQ1 is a power inductor, inductance 22uH;

[0069] DV3, DV4, DV5, DV6, DV7, DV9 are patch Schottky diodes, reverse voltage 30V, forward voltage drop low;

[0070] DV1 is a patch Zener diode, Zener voltage 5.1V;

[0071] DV2 is a patch switching diode, reverse voltage 100V;

[0072] DV9 is a patch Schottky diode, reverse voltage 40V, forward voltage drop low;

[0073] DV10 is a patch Schottky diode, fast reverse recovery time, reverse peak voltage 60V;

[0074] UQ1 is a low dropout regulator, output voltage 3.6V;

[0075] UQ2 is a low dropout regulator, output voltage 4V;

[0076] UQ3 is a DC-DC chip, FB is 0.97V, the output voltage can be set by a voltage dividing resistor;

[0077] BAT1 is a 6V backup battery;

[0078] BAT2 is a 3.6V clock battery;

[0079] QK1, QK2 are PMOS transistors, Vgs = -0.45V;

[0080] Working principle: when normally powered on, there is a 12V DC voltage at VCC1, which gets a 5.2V voltage through the DC-DC chip UQ3; the 5.2V voltage is given to the super capacitor after passing through diode DV7, which can charge the super capacitor to 5V; the 5.2V voltage is another way to pass through diode DV8, which is reduced by 0.2V, and gets a 5V voltage as the input voltage of the low dropout regulator UQ2; the low dropout regulator UQ2 outputs a stable 4V DC voltage, which is reduced by about 0.2V through diode DV9 to get a 3.8V MVDD, which powers the corresponding modules in the meter.

[0081] When the power supply is suddenly interrupted, the super capacitor EV1 starts to supply power, and after passing through the diode DV8, 4.8V voltage is obtained as the input voltage of the low dropout regulator UQ2; the low dropout regulator UQ2 outputs a stable 4V direct current voltage, which is reduced by about 0.2V through the diode DV9 to obtain 3.8V MVDD, which is used to supply power to the corresponding module in the electric meter.

[0082] Meanwhile, the voltage of VCC1 gradually decreases after the power supply is interrupted, and when the voltage decreases to 5.1V, the Zener diode DV1 stops conducting and cannot provide voltage for the circuit any more, at this time, the remaining energy in the circuit is discharged through the resistor RV1, and the voltage of Power_Battery_Ctr gradually decreases; when the voltage of Power_Battery_Ctr decreases to the output voltage of UQ1+Vgs, i.e. 3.05V, the PMOS tube QK2 is turned on; at this time, the Power_Battery starts to supply power to MVDD through the 3.6V voltage output by the low dropout regulator UQ1, and after passing through the diode DV6, there is a voltage drop of 0.2V, and 3.4V MVDD is obtained; when the voltage of Power_Battery_Ctr decreases to the voltage of the clock battery-diode DV3 forward conduction voltage drop+Vgs, i.e. 2.95V, UQ2 is turned on, and the clock battery starts to supply power to MVDD; after passing through the diodes DV3 and DV4 with a total voltage drop of 0.4V, 3.2V MVDD is obtained.

[0083] Since the super capacitor, the Power_Battery and the clock battery obtain different MVDD voltages, there is a competition mechanism here, i.e. when the super capacitor has sufficient energy, the 3.8V MVDD output by the super capacitor occupies the advantage, and at this time, the super capacitor supplies power; as the energy of the super capacitor is consumed, the voltage of the super capacitor gradually decreases, and when the MVDD voltage output by the super capacitor is less than 3.4V, the voltage output by the Power_Battery starts to occupy the advantage, and at this time, the Power_Battery supplies power; when the Power_Battery has insufficient energy, the MVDD voltage output by the Power_Battery gradually decreases, and the voltage output by the clock battery starts to occupy the advantage, and at this time, the Power_Battery supplies power.

[0084] Therefore, the circuit realizes seamless switching and cooperative work of the four modes of power supply, i.e. power supply, super capacitor supply, Power_Battery supply and clock battery supply in a preset order, and guarantees the stability of the power supply of the electric meter.

[0085] The utility model discloses utilize the voltage drop of different specifications' low dropout regulator and diode, set up different voltage gradient, realize the voltage switching of power supply, super capacitor, Power_Battery and clock battery under the condition of satisfying the power supply voltage demand of electric component, ensure that electric meter can continuously and stably run under various power supply conditions, improve the working reliability and data integrity of electric meter. The utility model does not need to control power switching through the IO port of MCU, and provides a solution under the situation of tight MCU resources.

[0086] The utility model fully describes is in order to disclose more clearly, and for prior art no longer enumerate one by one.

[0087] Finally, it should be pointed out that: the above examples are only used to illustrate the technical solutions of the utility model, and are not limited thereto; although the utility model has been described in detail with reference to the foregoing examples, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing examples, or make equivalent replacement for part of the technical features; it is obvious for those skilled in the art to combine the plurality of technical solutions of the utility model. And these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the utility model. The technical contents not described in the utility model are all known technologies.

Claims

1. A three-phase smart meter power supply switching circuit, characterized by: The power supply circuit includes a power supply, a super capacitor circuit, a metering battery circuit, a clock battery circuit and a battery control circuit; The power supply is connected to the super capacitor circuit; The super capacitor circuit, the metering battery circuit and the clock battery circuit each output one MVDD for the main system of the smart meter; The battery control circuit outputs a control signal Power Battery Ctr, which is connected to the metering battery circuit and the clock battery circuit to control the two battery switches; The power supply circuit includes a power supply BAT1 and a DC-DC converter circuit; The super capacitor circuit includes a voltage stabilizer UQ2, the pin 1 of which is connected to the ground, the pin 2 of which is connected to three input voltages, and the pin 2 of which is connected to the ground through a super capacitor EV1, and the pin 3 of which outputs three voltages, one of which is 4.0V, one of which is outputted through a capacitor CV4, and one of which is outputted through a diode DV9 as MVDD; The metering battery circuit includes a metering battery BAT1 and a voltage stabilizer UQ1; The pin 1 of the MOS tube QK2 is connected to the Power Battery Ctr through a resistor RV5, and the pin 3 of the MOS tube QK2 is connected to the MVDD terminal through a diode DV6; The pin 1 of the metering battery BAT1 is connected to the ground, and the pin 2 of the metering battery BAT1 is connected to the pin 2 of the voltage stabilizer UQ1 through a diode DV5; The clock battery circuit includes a PMOS tube QK1, the pin 2 of which is connected to a clock battery BAT2 through a diode DV3, the pin 1 of which is connected to the Power Battery Ctr through a resistor RV4, and the pin 3 of which is connected to the MVDD terminal through a diode DV4; The battery control circuit is connected to three paths, one of which is connected to the ground through a resistor RV1, one of which is connected to the MVDD terminal through a diode DV2, and one of which is connected to a voltage VCC1 through a resistor RV3 and a Zener diode DV1.

2. The three-phase smart meter power supply switching circuit of claim 1, wherein: The power supply circuit outputs a 5.2V voltage; In the DC-DC chip UQ3 of the power supply circuit, the pin 5 is connected to the VCC1 terminal, the pin 5 is connected to the VCC1 terminal through a resistor RQ1, the pin 2 is connected to the ground, the pin 6 outputs two voltages, one of which is outputted as 5.2V through an inductor LQ1, and one of which is connected to the ground through a reverse-connection Zener diode DV10, the pin 1 is connected to the pin 6 through a resistor RQ3 and a capacitor CQ2 in series, and the pin 3 is divided into two paths, one of which is connected to the ground through a resistor RQ2, and one of which is outputted as 5.2V through a resistor RQ4 and a resistor RQ5 in series. The 5.2V terminal is connected to the ground through capacitors CQ3 and CQ4 in parallel. The VCC1 terminal is connected to the ground through a capacitor CQ1. The pin 3 of the DC-DC chip UQ3 outputs 0.97V, and the output voltage is set through the voltage dividing resistors RQ4 and RQ5.

3. The three-phase smart meter power supply switching circuit of claim 2, wherein: In the super capacitor circuit, one of the two input voltages is connected to 5.2V through a diode DV8, and the other is connected to 5.2V through a capacitor CV3 and a resistor group of parallel resistors RV6 and RV7.

4. The three-phase smart meter power supply switching circuit of claim 3, wherein: In the copy battery circuit, the foot 1 of the voltage stabilizer UQ1 is grounded, the foot 2 is grounded through the capacitor CV1, the foot 3 is output, and the foot 3 is grounded through the capacitor CV2.

5. The three-phase smart meter power supply switching circuit of claim 4, wherein: In the DC-DC chip UQ3, the VIN foot is an input voltage pin connected to the input voltage VCC1; the EN foot is an enable foot of the chip, which is effective at a high level, and is connected to the input voltage VCC1 through the resistor RQ1; the GND pin is a ground pin of the DC-DC chip UQ3, connected to GND; the SW pin is an output pin of the DC-DC chip UQ3, connected to the inductor LQ1; the BST pin is connected between the SW pin and the resistor RQ3 through the capacitor CQ5; the FB is a feedback pin, which sets the required output voltage value through the voltage dividing resistors RQ4, RQ5 and RQ6; the Zener diode DV11 is a freewheeling diode, which forms a freewheeling circuit with the inductor LQ1; the capacitors CQ3 and CQ4 are output capacitors; and the capacitor CQ1 is an input capacitor, which provides a stable input current and a stable input voltage for the UQ3.

6. The three-phase smart meter power supply switching circuit of claim 5, wherein: In the super capacitor circuit, the 5.2V DC output by the DC-DC voltage reducing circuit is supplied to the super capacitor EV1 through the diode DV7 and the parallel resistors RV6 and RV7; the resistors RV6 and RV7 are current limiting resistors, and the diode DV7 is used to prevent the current of the super capacitor from flowing to the front end; the 5.2V and the super capacitor EV1 get a 5V voltage through the double diode DV8, and output a 4V DC voltage through the voltage stabilizer UQ2; the capacitors CV3 and CV4 are input and output capacitors of the voltage stabilizer UQ2.

7. The three-phase smart meter power supply switching circuit of claim 6, wherein: In the copy battery circuit, the 6V voltage output by the copy battery is input to the voltage stabilizer UQ1 through the diode DV5, and the voltage stabilizer UQ1 outputs a 3.6V DC voltage; the capacitors CV1 and CV2 are input and output capacitors of the voltage stabilizer UQ1; the Power_Battery_Ctr voltage controls the conduction and shutdown of the PMOS tube QK2, and determines whether the voltage of the battery BAT1 is supplied to MVDD.

8. The three-phase smart meter power supply switching circuit of claim 7, wherein: In the clock battery circuit, the Power_Battery_Ctr voltage controls the conduction and shutdown of the PMOS tube QK1, and determines whether the voltage of the clock battery BAT2 is supplied to MVDD. In the battery control circuit, when normally powered on, the voltage at the Power_Battery_Ctr point is clamped at MVDD+Vf, and Vf is the forward conduction voltage drop of the diode DV2; the Zener voltage of the Zener diode DV1 is 5.1V, and the VCC1 of 12V is reduced to 6.9V after passing through the Zener diode DV1; the resistor RV3 is used to limit the current and withstand the voltage difference between the anode of the Zener diode and the Power_Battery_Ctr; when the voltage of VCC1 is lower than 5.1V, the voltage supply to the circuit is stopped, at this time the remaining energy in the circuit is discharged through the resistor RV1, and the voltage at the Power_Battery_Ctr point begins to gradually decrease; The resistors RV1 and RV2 are connected in parallel and together determine the size of the current in the path from VCC1 to GND when DV2 is turned on.

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