Heterojunction solar cell with chemical resistance barrier film

Abstract

The heterojunction solar cell comprises an N-type monocrystalline silicon wafer, transparent conductive film layers are arranged on the front surface and the back surface of the N-type monocrystalline silicon wafer, the anti-chemical barrier film is arranged on one side, far away from the cell, of the transparent conductive film layers, an opening is formed in the anti-chemical barrier film, a grid line is arranged at the opening, and the grid line is connected with the N-type monocrystalline silicon wafer. The grid lines abut against the transparent conductive film layer. A transparent conductive film layer on which a conductive circuit needs to be manufactured is exposed on an anti-chemical barrier film in a laser grooving mode, namely, an opening is formed in the anti-chemical barrier film, and a needed metal grid line is formed through direct copper electroplating. Compared with a yellow light process combined with an electroplating process to prepare the metal grid line, the scheme has the advantages that a seed layer is not sputtered, printing ink is not required, the ink and the seed layer do not need to be etched back after copper electroplating is completed, the transparent conductive film layer and the back passivation layer are prevented from being damaged by an etching-back liquid medicine, and the reduction of Voc and efficiency is avoided.

Description

TECHNICAL FIELD

[0001] The utility model relates to a kind of solar cells, specifically to a kind of heterojunction solar cell with anti-chemical resistance barrier film. BACKGROUND

[0002] In recent years, due to the continuous expansion of silicon wafer, cell and assembly capacity, the cost of photovoltaic power generation has also substantially decreased. Therefore, reducing the proportion of integrated cost (BOS) in the overall photovoltaic power generation system cost structure becomes more important, which means that high-efficiency components will play the most important role in reducing system cost, as they can save more BOS cost under the condition of providing the same amount of electricity. Among all solar cell technologies, researching silicon-based heterojunction (HJT) solar cells is of great significance because they have the advantages of high conversion efficiency (> 25%), simple structure, low process temperature (< 250°C), fewer process steps, and low temperature coefficient.

[0003] Compared with traditional P-type monocrystalline / polycrystalline solar cells, HJT cells with N-type monocrystalline substrates have the characteristics of high efficiency, simple process, LID free, PID free, low temperature coefficient, high power generation, low light decay, low power generation cost, and double-sided light power generation, which ensures more reliable photovoltaic modules, lower construction cost of power stations, and longer service life, and is very suitable for distributed photovoltaic applications, being one of the mainstream technologies for high-efficiency cells. Using double-sided heterojunction components, under the reflection of white background, more than 20% of power can be output. According to field tests, using double-sided HJT components can output an average of 28.9% more power than single-sided HJT components.

[0004] In the process of preparing HJT solar cells, PECVD plays the most important role in determining the performance of the product. After cleaning and texturing the N-type silicon wafer surface, the passivation layer deposited on the light entrance surface is intrinsic layer (i) and the (n) layer doped with phosphorus is stacked on it, and the back surface also deposits intrinsic passivation layer (i) and stacks the (p) layer doped with boron, the thickness of the surface passivation layer i / p and i / n is about 15-25 nm. Then about 60-150 nm of transparent conductive film (TCO) is sputtered on the front and back surfaces, and currently most of them use traditional sputtering ITO (indium tin oxide) as transparent conductive film layer (TCO) or use RPD (Reactive Plasma Deposition) technology to evaporate IWO (indium tungsten oxide) as transparent conductive film. Then, the front and back conductive wires can be made by silk printing low-temperature silver paste on the transparent conductive film, or the front and back conductive wires can be made by electroforming copper, thus completing the preparation of an HJT cell.

[0005] Currently, in the process of making the metalized lines on the front and back of the HJT, since the amorphous silicon film layer is not resistant to high heat, the screen printing must use low-temperature silver paste. The low-temperature silver paste has low solid content and has not been sintered at high temperature, so the resistance of the screen-printed silver paste is relatively high, and therefore the electrical properties of the transparent conductive film are required to be relatively strict. Therefore, the height and width of the lines of the general HJT cell are larger than those of the traditional cell (PERC) using high-temperature silver paste, and the wet weight used is also relatively high, resulting in a large increase in the amount of silver paste used. If the TCO resistance is not improved, the etching back of the ink will partially damage the TCO and the passivation layer on the back, resulting in adverse effects such as reduction of Voc and efficiency. Practical new type content

[0006] The utility model discloses a heterojunction solar cell with anti-chemical resistance barrier film to solve the problem that the etching back of the ink will partially damage the TCO and the passivation layer on the back.

[0007] In order to achieve the above purpose, the utility model adopts the technical scheme of a heterojunction solar cell with anti-chemical resistance barrier film, which comprises an N-type monocrystalline silicon wafer, a transparent conductive film layer is arranged on the front and back of the N-type monocrystalline silicon wafer, an anti-chemical resistance barrier film is arranged on the side of the transparent conductive film layer away from the cell wafer, an opening is arranged on the anti-chemical resistance barrier film, a grid line is arranged at the opening, and the grid line and the transparent conductive film layer are in abutment.

[0008] Further, the material of the anti-chemical resistance barrier film has insulation and a refractive index of 1.4-1.7.

[0009] Further, the material of the anti-chemical resistance barrier film is selected from any one of silicon oxide, silicon nitride, aluminum oxide, silicon oxynitride, silicon aluminum oxide and silicon magnesium oxide.

[0010] Further, the thickness of the anti-chemical resistance barrier film is 5-30 nm.

[0011] Further, the front of the N-type monocrystalline silicon wafer is a textured structure, and the back is a planar structure.

[0012] Further, the front of the N-type monocrystalline silicon wafer is a circular arc textured structure with a radius of less than 2 microns.

[0013] Further, the thickness of the transparent conductive film layer is 40-70 nm, and the refractive index is 1.85-2.1.

[0014] Further, the opening is a fine groove with a width of 5-15 microns or a coarse groove with a width of 15-60 microns.

[0015] Further, an intrinsic amorphous silicon film layer with a thickness of 5-25nm and a microcrystalline silicon layer with a thickness of 5-25nm are arranged between the N-type monocrystalline silicon wafer and the transparent conductive film layer.

[0016] Further, the gate line comprises a fine gate and a main gate, the fine gate has a thickness of 5-15um and a width of 10-30um, and the main gate has a thickness of 5-15um and a width of 30-100um. BRIEF DESCRIPTION OF DRAWINGS

[0017] The accompanying drawings constituting a part of this application provide further understanding of the present application, the illustrative embodiments of the present application and the description thereof serve to explain the present application, and do not constitute improper limitation of the present application.

[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the embodiment description will be briefly introduced, and obviously, the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained without creative labor on the basis of these drawings.

[0019] Figure 1 It is an opening schematic diagram of the anti-chemical barrier film in an embodiment of the present application;

[0020] Figure 2 It is a schematic diagram of the heterojunction solar cell in an embodiment of the present application.

[0021] In the figure: 1, N-type monocrystalline silicon wafer; 2, intrinsic amorphous silicon film layer; 3, microcrystalline silicon layer; 31, N-type microcrystalline silicon film layer; 32, P-type microcrystalline silicon film layer; 4, transparent conductive film layer; 5, anti-chemical barrier film; 6, opening; 7, gate line. DETAILED DESCRIPTION

[0022] In order to make the above-mentioned purpose, features and advantages of the present application more apparent and easy to understand, the specific embodiments of the present application will be described in detail below with reference to the drawings. In the following description, a lot of specific details are set forth in order to provide a sufficient understanding of the present application. However, the present application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without departing from the connotation of the present application, therefore the present application is not limited by the specific embodiments disclosed below.

[0023] Referring to the drawings Figure 1As shown, the heterojunction solar cell with anti-chemical barrier film in the embodiment includes an N-type monocrystalline silicon wafer 1, a transparent conductive film layer 4 arranged on the front and back surfaces of the N-type monocrystalline silicon wafer 1, an anti-chemical barrier film 5 arranged on the side of the transparent conductive film layer 4 away from the wafer, an opening 6 arranged on the anti-chemical barrier film 5, and a grid line 7 arranged at the opening 6, the grid line 7 and the transparent conductive film layer 4 abutting.

[0024] The transparent conductive film layer 4 where the conductive line needs to be made is exposed by laser slotting on the anti-chemical barrier film 5, that is, the opening 6 is prepared on the anti-chemical barrier film 5, and the required metal grid line 7 is formed by direct copper plating. Compared with the preparation of the metal grid line by the combination of the photolithography process and the plating process, the present scheme does not need the sputtering seed layer and the printing ink, and does not need to perform etching back on the ink and the seed layer after the completion of the copper plating, thereby avoiding the damage of the etching back chemical solution to the transparent conductive film layer and the back passivation layer and avoiding the reduction of Voc and efficiency.

[0025] The transparent conductive film layer 4 where the conductive line needs to be made is exposed by laser slotting on the anti-chemical barrier film 5, that is, the opening 6 is prepared on the anti-chemical barrier film 5, and the required metal grid line 7 is formed by direct copper plating. Compared with the preparation of the metal grid line by the combination of the photolithography process and the plating process, the present scheme does not need the sputtering seed layer and the printing ink, and does not need to perform etching back on the ink and the seed layer after the completion of the copper plating, thereby avoiding the damage of the etching back chemical solution to the transparent conductive film layer and the back passivation layer and avoiding the reduction of Voc and efficiency.

[0026] The target material for preparing the anti-chemical barrier film 5 can be placed at the last target position of the transparent conductive film (TCO) coating device to complete the thin film sputtering together with the TCO coating, and the coating can also be subjected to heat treatment together with the TCO layer, so that the equipment cost is not increased.

[0027] The pn junction of the heterojunction solar cell is on the back surface, and the anti-chemical barrier film 5 can also avoid the damage of the plating chemical solution to the back TCO and the interface passivation layer in the process of plating the grid line 7. Since the anti-chemical barrier film 5 and the scheme of laser slotting and copper plating are still used in the front surface metallization of the HJT cell structure, the n value of the anti-chemical barrier film 5 is low, and the anti-chemical barrier film 5 is matched with the high n value and thinned TCO on the front surface to form an excellent anti-reflection film, thereby improving the light quantity of visible light and infrared light, and obviously improving the current and efficiency, and reducing the production cost.

[0028] In some embodiments, the back surface of the N-type monocrystalline silicon wafer 1 is a planar structure. Since the back surface is a planar structure without texturing, the damage of the laser to the TCO and the passivation layer in the process of laser slotting is avoided.

[0029] During the texturing process of HJT cleaning, a smaller textured surface is created on the front side. Furthermore, through a rounded texture process, the front side of the N-type monocrystalline silicon wafer 1 is configured with a rounded textured surface structure of less than 2μm. Less than 2μm means that the vertical distance between the highest and lowest points of the rounded textured surface is less than 2μm. This rounded textured surface structure of less than 2μm increases the amount of light entering the wafer and reduces the adverse effects of laser grooving on the textured surface of the front side of the battery.

[0030] In a plasma-enhanced chemical vapor deposition (PECVD) apparatus, gases such as silane (SiH4), phosphine (PH3), trimethylborane (TMB) (CH3), and H2 (Ar) are introduced to sequentially fabricate an intrinsic amorphous silicon film on the front side, an intrinsic amorphous silicon film on the back side, an N-type microcrystalline silicon film 31 on the front side, and a P-type amorphous silicon film 32 on the back side on an N-type single-crystal silicon substrate. The substrate temperature is 150-500℃. The thickness of the intrinsic amorphous silicon film 2 on the front side is 5-25nm, the thickness of the intrinsic amorphous silicon film 2 on the back side is 5-25nm, the thickness of the N-type microcrystalline silicon film 31 on the front side is 5-25nm, and the thickness of the P-type microcrystalline silicon film 32 on the back side is 5-25nm.

[0031] In some embodiments, the deposition of the transparent conductive film layers 4 on both sides is performed by using a vacuum pumping system to reduce the background pressure of the sputtering chamber to 0.7 × 10⁻⁶. -5 -0.9×10 -5 After torr, argon gas is used as the working gas, and the working pressure of the sputtering chamber is controlled to be 3×10 through a throttle valve. -3 The process involves using a high-purity AZO, ITO, or IZTO target (99.95% purity) with a pulsed DC power supply to sputter a 40-70 nm thick AZO, ITO, or IZTO thin film layer onto the P-type microcrystalline silicon film layer 32 and the N-type microcrystalline silicon film layer 31 on both sides, thereby completing the deposition of the transparent conductive film layer 4 on both sides.

[0032] Alternatively, use high-purity GZO, ICO, or IWO blocks (99.95% purity), and use RPD equipment to vacuum to 0.5 × 10⁻⁶. -5 -0.7×10 -5 After torr, GZO, ICO, or IWO material is directly vapor-deposited onto the P-type microcrystalline silicon film layer 32 and the N-type microcrystalline silicon film layer 31 on both sides. The transparent conductive film layer 4 has a thickness of 40-70 nm and a resistivity of <5 x 10⁻⁶. -4 Ωcm, refractive index 1.85-2.1.

[0033] In some embodiments, a chemical-resistant barrier film 5 is prepared on the transparent conductive film layer 4, and the background pressure of the sputtering chamber is reduced to 0.7 × 10⁻⁶ using a vacuum pumping system in a vacuum sputtering machine. -5-0.9×10 -5 After torr, argon gas is used as the working gas, and the working pressure of the sputtering chamber is controlled to be 3-5 × 10⁻⁵ through a throttle valve. -3 The torr uses pulsed DC or RF as power supply and materials such as silicon oxide, silicon nitride, aluminum oxide, silicon oxynitride, silicon aluminum oxide, and silicon magnesium oxide as target materials. The thickness of the sputtered chemical resistance barrier film 5 is 5-30nm, and the film refractive index is 1.4-1.7.

[0034] In some embodiments, a picosecond laser (circular or square spot) is used to groove the chemical-resistant barrier film 5 on both sides to form openings 6, thereby forming fine grooves with a width of 5-15 μm and coarse grooves with a width of 15-60 μm on the chemical-resistant barrier film 5. The fine grooves are used to accommodate fine grids, and the coarse grooves are used to accommodate coarse grids.

[0035] In some embodiments, see Appendix Figure 2 As shown, the preparation of the copper-plated metallized gate lines 7 on both sides does not require sputtering a metal seed layer. A horizontal electroplating machine is used to directly electroplat the required copper metal lines, using copper sulfate aqueous solution as the plating solution. The current density is 5-40 ASD. The thickness of the fine gates on both sides is 5-15 μm, and the width is 10-30 μm; the main gate has a plating thickness of 5-15 μm and a width of 30-100 μm; the gate line resistivity is <6 x 10⁻⁶. -6 Ωcm.

[0036] The above process completes the fabrication of a heterojunction solar cell with anti-reflection and anti-chemical layers on both the front and back sides. After the cells are encapsulated, they form a double-glass module, which is mainly used in the ground-mounted power station and distributed power station markets.

[0037] The above embodiments are only for illustrating the technical concept and features of this utility model. Their purpose is to enable those skilled in the art to understand the content of this utility model and implement it. They cannot be used to limit the protection scope of this utility model. All equivalent changes or modifications made in accordance with the spirit and essence of this utility model should be covered within the protection scope of this utility model.

[0038] It should also be noted that the various specific technical features described in the above specific embodiments can be combined in any suitable way without contradiction. In order to avoid unnecessary repetition, this utility model will not describe the various possible combinations separately.

Claims

1. A heterojunction solar cell with a chemically resistant barrier film, characterized in that, The device includes an N-type monocrystalline silicon wafer (1), a transparent conductive film layer (4) is provided on the front and back sides of the N-type monocrystalline silicon wafer (1), a chemical resistance barrier film (5) is provided on the side of the transparent conductive film layer (4) away from the N-type monocrystalline silicon wafer (1), an opening (6) is provided on the chemical resistance barrier film (5), a gate line (7) is provided at the opening (6), and the gate line (7) abuts against the transparent conductive film layer (4).

2. The heterojunction solar cell with a chemically resistant barrier film according to claim 1, characterized in that, The chemical-resistant barrier film (5) is made of insulating material with a refractive index of 1.4-1.

7.

3. The heterojunction solar cell with a chemically resistant barrier film according to claim 1, characterized in that, The chemical-resistant barrier film (5) is made of any one of silicon oxide, silicon nitride, aluminum oxide, silicon oxynitride, aluminum silicon oxide, or magnesium silicon oxide.

4. The heterojunction solar cell with a chemically resistant barrier film according to claim 1, characterized in that, The thickness of the chemical-resistant barrier film (5) is 5-30 nm.

5. The heterojunction solar cell with a chemically resistant barrier film according to any one of claims 1-4, characterized in that, The front side of the N-type monocrystalline silicon wafer (1) has a textured surface, and the back side has a planar surface.

6. The heterojunction solar cell with a chemically resistant barrier film according to claim 5, characterized in that, The front side of the N-type single crystal silicon wafer (1) has a circular arc textured surface structure of less than 2μm.

7. The heterojunction solar cell with a chemically resistant barrier film according to claim 1, characterized in that, The thickness of the transparent conductive film layer (4) is 40-70 nm, and the refractive index is 1.85-2.

1.

8. The heterojunction solar cell with a chemically resistant barrier film according to any one of claims 1-4, characterized in that, The opening (6) is a fine groove with a width of 5-15 μm or a coarse groove with a width of 15-60 μm.

9. The heterojunction solar cell with a chemically resistant barrier film according to any one of claims 1-4, characterized in that, An intrinsic amorphous silicon film layer (2) and a microcrystalline silicon layer (3) are disposed between the N-type single crystal silicon wafer (1) and the transparent conductive film layer (4). The thickness of the intrinsic amorphous silicon film layer (2) is 5-25 nm, and the thickness of the microcrystalline silicon layer (3) is 5-25 nm.

10. The heterojunction solar cell with a chemically resistant barrier film according to any one of claims 1-4, characterized in that, The gate line (7) includes a fine gate and a main gate. The thickness of the fine gate is 5-15 μm and the width is 10-30 μm. The thickness of the main gate is 5-15 μm and the width is 30-100 μm.

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