Circuit board of analog module and device thereof

By using a three-layer circuit board design and shielding measures, the problem of insufficient transmission rate in the analog circuit section of the circuit board was solved, achieving stable transmission of high-frequency signals and improved anti-interference capabilities.

CN224068856UActive Publication Date: 2026-03-31四川九洲防控科技有限责任公司
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-03-14
Publication Date
2026-03-31

AI Technical Summary

Technical Problem

The analog circuitry on existing circuit boards is unable to meet the high-frequency transmission rate requirements, affecting the overall circuit operating frequency.

Method used

The circuit board adopts a three-layer structure design. The first layer is used to place components and wires, the second layer is the ground layer, and the third layer is used as the reference layer. A ground copper layer and a shielding strip are set. The impedance between the wires and the ground layer meets the 50-ohm requirement and is connected by thickened lines and non-uniform vias. The shielding strip is connected to the metal shell to shield external interference.

Benefits of technology

The transmission rate of the analog module was improved, signal interference and crosstalk were reduced, and the anti-interference capability of the circuit board was enhanced.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

The embodiment of the utility model relates to the technical field of circuit board layout, and discloses a circuit board of an analog module and a device thereof. The circuit board of the analog module comprises a three-layer structure, a first layer of the circuit board is used for placing components and wires, SAM connectors are aligned along a first direction and are arranged at equal intervals, Balun circuits are aligned along the first direction and are arranged at equal intervals, and an ith connector and an ith Balun circuit are aligned along a second direction to form an ith channel branch, the analog-to-digital conversion chip is arranged on the side where the output end of each balun circuit is located and located in the middle of the M channel branches in the first direction, the second layer of the circuit board is provided with a ground layer, the third layer of the circuit board is provided with a ground layer and serves as a reference layer, and the impedance of the wire on the first layer and the impedance of the reference layer meet the impedance requirement. According to the utility model, the thickened lines, the interlayer reference and the shielding strips are adopted, so that the problem of low transmission rate in an analog module is solved, and the transmission rate and the anti-interference capability of analog signals are improved.
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Description

Technical Field

[0001] This utility model relates to the field of circuit board layout technology, and in particular to a circuit board and device for an analog module. Background Technology

[0002] In the field of circuit board design, the layer structure and routing method of the circuit board are of paramount importance in the field of circuit board layout technology.

[0003] With the rapid development of science and technology, the frequency of signals transmitted on circuit boards is also getting higher and higher. This requires the transmission rate of the traces on the circuit board to meet the requirements. The transmission rate of traces has increased from a few megabits and tens of megabits in the early days to tens of thousands of megabits now. For the increasingly higher requirements of trace transmission rate, the analog circuit part on the circuit board also needs to improve the transmission rate accordingly. However, it is currently difficult for the traces of the analog circuit part on the circuit board to meet the transmission rate requirements, thus affecting the operating frequency of the circuit on the entire circuit board. Therefore, how to set the circuit board structure to improve the trace transmission rate is an urgent problem to be solved. Utility Model Content

[0004] The purpose of this utility model is to provide at least one circuit board and device for an analog module, which can at least solve the technical problem that straight lines on the circuit board affect the transmission rate, and at least achieve the goal of improving the transmission rate of the analog module on the circuit board by reasonably arranging the circuit board structure.

[0005] To address the aforementioned technical problems, at least one embodiment of this application provides a circuit board for an analog module, comprising a three-layer structure. The first layer of the circuit board is used to place components and wires. Each SAM connector is aligned and arranged at equal intervals along a first direction. Each balun circuit is aligned and arranged at equal intervals along the first direction. The i-th connector and the i-th balun circuit are aligned and arranged along a second direction to form the i-th channel branch. The analog-to-digital conversion chip is disposed on one side of the output terminal of each balun circuit and in the middle position in the second direction. The second layer of the circuit board is provided as a ground layer, and the third layer is provided as a ground layer and serves as a reference layer, so that the impedance of the wires on the first layer and the impedance of the reference layer meet the impedance requirements. Here, M is a positive integer greater than or equal to 1, and i is a positive integer less than or equal to M.

[0006] At least one embodiment of this application also provides an analog module device, including a circuit board of the analog module as described above and a metal housing, wherein the metal housing is pressed together with a shielding strip on the circuit board for shielding external interference.

[0007] The embodiments of this application provide a circuit board for an analog module. Compared with the prior art, it adopts a layered reference plane, thickened lines, and shielding strips, which solves the impedance requirements of the traces on the circuit board. The use of shielding strips solves the anti-interference problem of the circuit board and improves the transmission rate of the traces.

[0008] Additionally, a ground copper layer is formed around the first layer of conductors. Non-uniformly distributed vias are formed on this ground copper layer to connect to the ground layers of the second and third layers. The non-uniformly distributed vias avoid resonance caused by uniform vias, reducing signal interference and crosstalk on the traces. The ground copper layer is connected to ground, improving the circuit board's anti-interference capability.

[0009] In addition, a shielding strip is provided around the conductor and the copper ground layer to shield the components and conductors on the first layer, thereby preventing external signals from interfering with the signals transmitted on the circuit board.

[0010] In addition, on the second layer, corresponding to the location where the conductors are set on the first layer, the ground layer is hollowed out for interlayer reference to ensure that the wiring impedance meets the requirements.

[0011] In addition, on the first layer, the connection lines between the i-th connector and the input terminal of the i-th balun circuit, the connection lines in the i-th balun circuit, and the connection lines between the i-th balun circuit and the analog-to-digital converter chip are made of thicker lines, which improves the signal transmission rate.

[0012] Furthermore, the connection lines between the i-th connector and the input terminal of the i-th balun circuit, including the connection lines between the i-th connector and the i-th input filter capacitor, and the connection lines between the i-th input filter capacitor and the input terminal of the first transformer in the i-th balun circuit, are made of thick straight lines, and these lines are all located on the same straight line. Using straight lines further improves the signal transmission rate.

[0013] Furthermore, the width of the thickened line ranges from 16µm to 20µm, ensuring compliance with impedance requirements and signal transmission rate requirements. The absence of vias on the thickened line avoids interference caused by vias.

[0014] In addition, the connecting lines of each channel branch from the input end of the SAM connector to the balun circuit and then to the input end of the analog-to-digital converter chip are of equal length, ensuring the consistency and synchronization of signal transmission.

[0015] In addition, the filter circuits in each balun circuit are arranged around the analog-to-digital converter chip to improve the stability of the input signal of the analog-to-digital converter circuit and avoid interference.

[0016] In addition, the analog module device, which includes the circuit board of the analog module described in this application and the metal casing, is connected by pressing the metal casing with the shielding strip on the circuit board, which improves the shielding effect and increases the ability to resist external interference. Attached Figure Description

[0017] One or more embodiments are illustrated by way of example with reference numerals in the accompanying drawings. These illustrations do not constitute a limitation on the embodiments. Elements with the same reference numerals in the drawings are denoted as similar elements. Unless otherwise stated, the figures in the drawings are not to be limited by scale.

[0018] Figure 1 This is a schematic diagram of the Maren circuit principle in the prior art;

[0019] Figure 2 This is a schematic diagram of the principle of analog-to-digital conversion circuit in the existing technology;

[0020] Figure 3 This is a schematic diagram of a PCB layout structure according to an embodiment of the present invention;

[0021] Figure 4 This is a schematic diagram of the equal layout structure of each channel branch connection line on the first layer according to an embodiment of the present invention;

[0022] Figure 5 This is a schematic diagram of the thickened layout structure of the first layer upper connecting line according to an embodiment of the present utility model;

[0023] Figure 6 This is a schematic diagram of the first layer via layout structure according to an embodiment of the present invention;

[0024] Figure 7 This is a schematic diagram of the second layer stratum layout structure according to an embodiment of the present invention;

[0025] Figure 8 This is a schematic diagram of the third layer stratum layout structure according to an embodiment of the present invention;

[0026] Figure 9 This is a schematic diagram of the layout structure of the first layer of shielding strip according to an embodiment of the present invention. Detailed Implementation

[0027] To make the objectives, technical solutions, and advantages of the embodiments of this utility model clearer, the various embodiments of this utility model will be described in detail below with reference to the accompanying drawings. However, those skilled in the art will understand that many technical details have been provided in the various embodiments of this utility model to enable readers to better understand this utility model. However, the technical solutions claimed by this utility model can be implemented even without these technical details and with various changes and modifications based on the following embodiments.

[0028] To facilitate understanding of the embodiments of this application, the relevant content regarding the simulation module will be introduced first.

[0029] The analog module consists of an SMA connector, a balun circuit, and an analog-to-digital converter circuit connected in sequence.

[0030] like Figure 1 As shown, the SMA connector X9 is connected to a balun circuit, which includes a transformer, a matching circuit, and a filter connected in sequence.

[0031] The transformer includes transformer chip U29 and transformer chip U30. One input terminal PD of transformer chip U29 is connected to the output terminal of SMA connector through capacitor C260, and the other input terminal P is connected to analog ground AGND. One output terminal S is connected to the P terminal of transformer chip U30 and one end of capacitor C264, and the other output terminal SD is connected to the SD terminal of transformer chip U30 and one end of capacitor C259.

[0032] The PD and S terminals of transformer chip U30 are connected to analog ground AGND.

[0033] The matching circuit includes capacitors C264, C259, and C263, and resistors R81, R82, R85, R89, R95, and R96. Capacitors C259, R81, and R82 are connected in series to form the first series combination. Capacitors C264, R95, and R96 are connected in series to form the second series combination. Resistors R85 and R89 are connected in series to form the third series combination. The connection point of resistors R81 and R82 is connected to one end of the third series combination, the connection point of resistors R95 and R96 is connected to the other end of the third series combination, and the connection point of resistors R85 and R89 is connected to one end of capacitor C263. The other end of capacitor C263 is connected to analog ground AGND.

[0034] The filter circuit includes filter capacitors C258, C265, and C262, and resistors 83, 86, 90, and 97. The other end of resistor R82 is connected to one end of filter capacitor C258, one end of resistor 83, and one end of resistor 86. The other end of resistor R96 is connected to one end of filter capacitor C265, one end of resistor 90, and one end of resistor 97. The other ends of filter capacitors C258 and C265 are connected to analog ground AGND. The other end of resistor 86 is connected to one end of capacitor C261, and the other end of capacitor C261 is connected to the other end of resistor 90.

[0035] The other end of resistor 83 is connected to one end of filter capacitor C262 and serves as the VINC_P output terminal of filter circuit AD3. The other end of resistor 97 is connected to the other end of filter capacitor C262 and serves as the VINC_N output terminal of filter circuit AD3.

[0036] like Figure 2 As shown, the analog-to-digital converter circuit includes an analog-to-digital converter chip U28. The AD3_VINC_P input terminal of the analog-to-digital converter chip U28 is connected to the VINC_P output terminal of the filter circuit AD3, and its AD3_VINC_N input terminal is connected to the VINC_N output terminal of the filter circuit AD3.

[0037] An input filter capacitor C260 is installed between the SMA connector X9 and the transformer chip U29. The connection line between the input terminal of the SMA connector X9 and the input terminal of the transformer chip U29 is the third connection branch. The output terminal of the transformer chip U29 is converted into two connection branches. The fifth connection branch line runs from the S output terminal of the transformer chip U29, through capacitor C264, resistor R95, resistor R96, and resistor R97, to the AD3_VINC_N input terminal of the analog-to-digital converter chip U28. The sixth connection branch line runs from the SD output terminal of the transformer chip U29, through capacitor C259, resistor R91, resistor R82, and resistor R83, to the AD3_VINC_P input terminal of the analog-to-digital converter chip U28. Among them, capacitor C264, resistor R95, resistor R96, and resistor R97 are connected in series to form the fourth series combination of the third channel branch, and capacitor C259, resistor R91, resistor R82, and resistor R83 are connected in series to form the fifth series combination of the third channel branch.

[0038] Example 1:

[0039] The embodiments of this utility model relate to a simulation module layout structure.

[0040] Compared with the prior art, the implementation of this utility model adopts thicker input connection lines to increase anti-interference capability, uses equal connection lines between each input terminal and the analog-to-digital converter chip to ensure the consistency of input signals, uses the third ground layer as a reference layer to ensure that the impedance between the conductor and the ground layer is 50 ohms, and sets a shielding strip in the first layer where the connection is set, thus solving the problem of interference and crosstalk between analog channels.

[0041] The following is a detailed description of the implementation details of a simulation module layout structure in this embodiment. The following content is only for the convenience of understanding and is not necessary for implementing this solution.

[0042] The embodiments of this utility model provide a simulation module wiring structure, taking into account, as Figure 1 The circuit schematic shown is the third channel branch AD3 in the PCB diagram. For consistency, the specific embodiments of this application are described using the PCB number.

[0043] In one specific embodiment of this application, the analog module includes four SMA connectors, four balun circuits, and an analog-to-digital converter circuit. Each SMA connector is connected to the input terminal of a balun circuit, and the output terminal of each balun circuit is connected to the corresponding input terminal of the analog-to-digital converter circuit. In this embodiment, M equals 4.

[0044] All balun circuits have the same structure, such as Figure 1 As shown. The analog-to-digital converter circuit is as follows. Figure 2 As shown.

[0045] The AD1_VINC_P output of the first balun circuit is connected to the AD1_VINC_P input of the analog-to-digital converter chip U28, and its AD1_VINC_N output is connected to the AD1_VINC_N input of the analog-to-digital converter chip U28.

[0046] The AD2_VINC_P output of the second balun circuit is connected to the AD2_VINC_P input of the analog-to-digital converter chip U28, and its AD2_VINC_N output is connected to the AD2_VINC_N input of the analog-to-digital converter chip U28.

[0047] The AD3_VINC_P output of the third balun circuit is connected to the AD3_VINC_P input of the analog-to-digital converter chip U28, and its AD3_VINC_N output is connected to the AD3_VINC_N input of the analog-to-digital converter chip U28.

[0048] The AD4_VINC_P output of the fourth balun circuit is connected to the AD4_VINC_P input of the analog-to-digital converter chip U28, and its AD4_VINC_N output is connected to the AD4_VINC_N input of the analog-to-digital converter chip U28.

[0049] The PCB structure of the analog module in this application is illustrated using an analog module that includes four balun circuits. The same principle applies to structures with different numbers of balun circuits, and will not be repeated here.

[0050] When laying out the circuit board (PCB) structure of the analog module, along one direction on the circuit board, in this embodiment from left to right, the SMA connector is placed at the front end, the balun circuit is placed in the middle, and the analog-to-digital conversion circuit is placed at the back end.

[0051] The first layer of the circuit board is used to set up traces and components, the second layer is used to arrange traces, and the third layer serves as a reference plane layer to set up the ground plane. The impedance of the conductors on the first layer and the impedance of the reference layer meet the impedance requirements.

[0052] In the device layout, all SMA connectors are aligned and equally spaced along a first direction, and all balun circuits are aligned and equally spaced along a first direction. Along the same direction, they are labeled as the first SMA connector to the fourth SMA connector, and the first balun circuit to the fourth balun circuit. The i-th SMA connector and the i-th balun circuit are aligned along a second direction.

[0053] The i-th SMA connector and the i-th balun circuit form the i-th channel branch. The four channel branches are aligned and equally spaced to ensure the consistency of the input signal. Here, i takes a value of 1, 2, 3, or 4.

[0054] The analog-to-digital converter (ADC) circuit is located on the side where the output of the balun circuit is located, in the middle of the four channel branches in the second direction. The second distance between the ADC circuit and the output of the second balun circuit is equal to the third distance between the ADC circuit and the output of the third balun circuit. Correspondingly, the first distance between the ADC circuit and the output of the first balun circuit is equal to the fourth distance between the ADC circuit and the output of the fourth balun circuit.

[0055] The filter circuits in each balun circuit are located around the analog-to-digital converter (ADC) chip, and are closest to the ADC chip. The ADC chip is closest to the second and third balun circuits. The filter circuits in the second and third balun circuits are located on the same side of the ADC chip. The filter circuit in the first balun circuit is located on one side of the ADC chip. The filter circuit in the fourth balun circuit is located on the other side of the ADC chip, opposite to the filter circuit in the first balun circuit. In other words, the filter circuits in the first and fourth balun circuits are symmetrically arranged on both sides of the ADC chip.

[0056] The connection lines between the input terminals of each SMA connector and the input terminals of the analog-to-digital converter chip are of equal length and are all thickened. The width of the thickened lines ranges from 16µm to 20µm. No vias are placed on the thickened lines to avoid interference caused by vias.

[0057] The connection between the input terminal of each SMA connector and the input terminal of the first transformer in its respective balun circuit is located on the first layer and uses a thickened straight line. This includes the connection line from the SMA connector to the first capacitor and the connection line from the input filter capacitor to the input terminal of the first transformer in the balun circuit. The connection line from the SMA connector to the input filter capacitor and the connection line from the input filter capacitor to the input terminal of the first transformer in the balun circuit are located on the same straight line. The width of the thickened line ranges from 16µm to 20µm. No vias are placed on the thickened line to avoid interference caused by vias.

[0058] A ground copper layer is installed around the conductors in the first layer to surround the connections of each channel branch, shielding the conductors to provide the shortest return path. At the same time, the large ground layer increases the channel's anti-interference capability.

[0059] Non-uniformly distributed vias are set on the copper ground layer, and all non-uniform vias are connected to the second ground layer and then to the third ground layer.

[0060] A shielding strip is installed around the ground copper layer and the conductors on the first layer to shield the analog module. The shielding strip is installed along the SMA connector, balun circuit and analog-to-digital converter chip. The shielding strip area is exposed and not covered with green solder mask. It is exposed so that it can be directly pressed and connected to the metal shielding structure of the outer shell to increase the anti-interference capability.

[0061] In the second layer, except for the vias needed to place components and the positions corresponding to the conductors in the first layer, the rest is set as a ground layer. The positions corresponding to the conductors in the first layer are hollowed out, that is, no ground layer is set at the positions corresponding to the conductors in the first layer.

[0062] The third layer serves as the reference plane for the first layer of conductors and is used as a ground plane. The impedance between the ground plane and the first layer of conductors is 50Ω.

[0063] Example 2

[0064] The embodiments of this utility model are detailed descriptions of the above-described embodiment one, see [link to embodiment one]. Figures 3 to 9 .

[0065] This application provides a simulation module wiring structure, such as... Figure 3 As shown, since the sampling frequency of the analog module is relatively high, the first connection line between the SMA connector and the balun circuit is a thickened straight line. No vias are set on the thickened straight line, and the thickened straight line is set on the first layer of the PCB. In a specific embodiment of this application, the width of the input line is 16-20 mm, and no vias are set on the thickened straight line to avoid interference caused by vias.

[0066] In one specific embodiment of this application, the analog module includes four SMA connectors, four balun circuits, and an analog-to-digital converter circuit. The output of one SMA connector is connected to the input of one balun circuit, and the outputs of all balun circuits are connected to different inputs of the analog-to-digital converter circuit.

[0067] Specifically, the first connection branch line from the input terminal of the SMA connector X8 of the first channel branch AD1 to the input terminal of the first balun circuit transformer chip U26, and then from the output of the transformer chip U26, transforms into two connection branches. The first connection branch line, from the S output terminal of the transformer chip U26, passes through the fourth series combination of the first channel branch and connects to the AD1_VINC_N input terminal of the analog-to-digital converter chip U28. The second connection branch line, from the SD output terminal of the transformer chip U26, passes through the fifth series combination of the first channel branch and connects to the AD1_VINC_P input terminal of the analog-to-digital converter chip U28. The fourth series combination of the first channel branch includes a capacitor C256, a resistor R78, a resistor R79, and a resistor R80 connected in series in sequence. The fifth series combination of the first channel branch includes a capacitor C247, a resistor R66, a resistor R67, and a resistor R68 connected in series in sequence. The length of the first connection branch line is equal to the length of the second connection branch line.

[0068] Similarly, the second connection branch from the input terminal of the SMA connector X7 of the second channel branch AD2 to the input terminal of the second balun circuit transformer chip U24, and then from the output of the transformer chip U24, transforms into two connection branches. The third connection branch, from the S output terminal of the transformer chip U24, passes through the fourth series combination of the second channel branch and connects to the AD2_VINC_N input terminal of the analog-to-digital converter chip U28. The fourth connection branch, from the SD output terminal of the transformer chip U24, passes through the fifth series combination of the second channel branch and connects to the AD2_VINC_P input terminal of the analog-to-digital converter chip U28. The fourth series combination of the second channel branch includes capacitor C232, resistor R63, resistor R64, and resistor R65 connected in series in sequence. The fifth series combination of the first channel branch includes capacitor C214, resistor R55, resistor R56, and resistor R57 connected in series in sequence. The length of the third connection branch is equal to the length of the fourth connection branch.

[0069] The third connection line, originating from the input terminal of the SMA connector X9 of the third channel branch AD3, connects to the input terminal of the third balun circuit transformer chip U29. From the output of transformer chip U29, it transforms into two connection branches: a fifth connection branch, originating from the S output terminal of transformer chip U29, passing through the fourth series combination of the third channel branch, and connecting to the AD3_VINC_N input terminal of analog-to-digital converter chip U28; and a sixth connection branch, originating from the SD output terminal of transformer chip U29, passing through the fifth series combination of the third channel branch, and connecting to the AD3_VINC_P input terminal of analog-to-digital converter chip U28. The fourth series combination of the third channel branch includes capacitor C232, resistor R63, resistor R64, and resistor R65 connected in series. The fifth series combination of the first channel branch includes capacitor C214, resistor R55, resistor R56, and resistor R57 connected in series. The length of the fifth connection branch is equal to the length of the sixth connection branch.

[0070] The line originates from the input terminal of the SMA connector X10 of the fourth channel branch AD4, to the fourth connection branch of the input terminal of the third balun circuit transformer chip U31, and then from the output of the transformer chip U31, it transforms into two connection branches. The seventh connection branch, originating from the S output terminal of the transformer chip U31, passes through the fourth series combination of the fourth channel branch and connects to the AD4_VINC_N input terminal of the analog-to-digital converter chip U28. The eighth connection branch, originating from the SD output terminal of the transformer chip U31, passes through the fifth series combination of the fourth channel branch and connects to the AD4_VINC_P input terminal of the analog-to-digital converter chip U28. The fourth series combination of the fourth channel branch includes capacitor C274, resistor R117, resistor R118, and resistor R119 connected in series in sequence. The fifth series combination of the fourth channel branch includes capacitor C267, resistor R110, resistor R109, and resistor R111 connected in series in sequence. The length of the seventh connection branch is equal to the length of the eighth connection branch.

[0071] In one specific embodiment of this application, such as Figure 4 As shown, the first total length of the first connecting branch line and the first connecting sub-branch line, the second total length of the first connecting branch line and the second connecting sub-branch line, the third total length of the second connecting branch line and the third connecting sub-branch line, the fourth total length of the second connecting branch line and the fourth connecting sub-branch line, the fifth total length of the third connecting branch line and the fifth connecting sub-branch line, the sixth total length of the third connecting branch line and the sixth connecting sub-branch line, the seventh total length of the fourth connecting branch line and the seventh connecting sub-branch line, and the eighth total length of the fourth connecting branch line and the eighth connecting sub-branch line are equal to ensure that the input signal is synchronized. The so-called equality in this application is equality within the allowable error range.

[0072] Specifically, such as Figure 5 As shown, the output terminal of the third SMA connector X9 is connected to the 131 connection line between the first capacitor C260 and the first capacitor C260 and the input terminal of the first transformer chip U29 of the first balun circuit. The 131 connection line and the 132 connection line are on the same straight line and are thick straight lines with a width greater than 16-20 μm. No vias are set on the first connection line and the second connection line to avoid interference caused by vias.

[0073] The fifth and sixth connecting branches use thick lines with a width of 16-20 micrometers. No vias are placed on the thick lines to avoid interference caused by vias.

[0074] Similarly, the output of the second SMA connector X7 is connected to the 121 connection line between capacitor C215 and the 122 connection line between capacitor C215 and the input of the first transformer chip U24 of the second balun circuit. The 121 connection line and the 122 connection line are on the same straight line and are thick straight lines with a width of 16-20 microns. No vias are set on the 121 connection line and the 122 connection line to avoid interference caused by vias.

[0075] The third and fourth connecting branch lines use thick lines with a width of 16-20 mm. No vias are placed on the thick lines to avoid interference caused by vias.

[0076] The connection methods for the remaining first and fourth channels are the same, and so on, so I will not repeat them here.

[0077] like Figure 6 As shown, a ground copper layer is set around the connection of each channel branch on the first layer to surround the connection of each channel branch, so as to provide the shortest return path. At the same time, the large area of ​​the ground layer increases the anti-interference ability of the channel. Non-uniform vias are set on the ground copper layer to prevent the resonance phenomenon of uniform vias. All non-uniform vias are connected to the ground layer of the second layer, and then to the ground layer of the third layer.

[0078] like Figure 7 As shown, a ground layer is set on the second layer, and the corresponding connection position on the first layer is hollowed out, including the position of the thick straight line and the position of the thick line. The ground layer is hollowed out, that is, no ground line is run.

[0079] like Figure 8 As shown, a ground layer is set on the third layer, the third layer is used as the reference layer, and the impedance between the conductor on the first layer and the ground layer on the third layer is set to 50Ω.

[0080] like Figure 9 As shown, a shielding strip is set around the first layer of components and copper foil to surround the analog module. Vias are set on the shielding strip to connect to the ground plane of the second layer and the ground plane of the third layer. The shielding strip extends along the SAM connector, balun circuit, analog-to-digital converter chip, and surrounds the wires and components.

[0081] Furthermore, the shielding strip area is exposed without being covered with green oil, allowing it to be directly pressed and connected to the outer metal shielding structure, thus increasing anti-interference capabilities.

[0082] Example 3

[0083] The present invention relates to an analog module PCB board, which adopts the methods of Embodiment 1 and Embodiment 2 to arrange components and wires, avoid interference and crosstalk between high-frequency traces of the analog module, and improve the high-frequency signal transmission rate.

[0084] It should be understood that the terms "mechanism," "device," "component," etc., used in this application are merely one method of distinguishing different components, elements, parts, sections, or assemblies at different levels. However, if other terms can achieve the same purpose, they can be replaced by other expressions.

[0085] Those skilled in the art will understand that the above embodiments are specific examples of implementing the present invention. In practical applications, the technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification, and various changes can be made to them in form and detail without departing from the spirit and scope of the present invention.

Claims

1. A circuit board of an analog module, the analog module comprising M SAM connectors, a number of balun circuits equal to the number of SAM connectors, and at least one analog-to-digital conversion chip, characterized in that, The circuit board comprises a three-layer structure, the first layer of the circuit board is used for placing components and wires, the SAM connectors are aligned and arranged at equal intervals in the first direction, the balun circuits are aligned and arranged at equal intervals in the first direction, the i th connector is aligned and arranged with the i th balun circuit in the second direction, and the i th channel branch is formed; The analog-digital conversion chip is arranged on one side of the output end of each balun circuit and at the middle position in the second direction; The second layer of the circuit board is provided with a ground layer, the third layer is provided with a ground layer and serves as a reference layer, and the impedance of the wires on the first layer and the reference layer meets the impedance requirement, wherein M is a positive integer greater than or equal to 1, and i is a positive integer less than or equal to M.

2. The analog module's circuit board according to claim 1, characterized in that, A ground copper skin layer is arranged around the wires on the first layer, and non-uniformly distributed vias are arranged on the ground copper skin layer and used for connecting the ground layer of the second layer and the ground layer of the third layer.

3. The analog module's circuit board according to claim 2, characterized in that, Shielding strips are arranged around the wires and the ground copper skin layer and used for shielding the components and wires on the first layer.

4. The analog module's circuit board according to claim 1, characterized in that, The ground layer of the second layer is hollowed out at positions corresponding to the positions of the wires arranged on the first layer.

5. The analog module's circuit board according to claim 1, characterized in that, On the first layer, the connection lines between the i th connector and the input end of the i th balun circuit, the connection lines in the i th balun circuit, and the connection lines between the i th balun circuit and the analog-digital conversion chip are thickened lines.

6. The analog module's circuit board according to claim 5, characterized in that, The connection lines between the i th connector and the input end of the i th balun circuit comprise connection lines between the i th connector and the i th input filter capacitor and connection lines between the i th input filter capacitor and the input end of the first transformer in the i th balun circuit, and the connection lines are thickened straight lines, and the connection lines between the i th connector and the i th input filter capacitor and the connection lines between the i th input filter capacitor and the input end of the first transformer in the i th balun circuit are located on the same straight line.

7. The analog module's circuit board according to claim 5, characterized in that, The width of the thickened lines ranges from 16 mail to 20 mail, and no via is arranged on the thickened lines.

8. The analog module's circuit board according to claim 1, characterized in that, The lengths of the connection lines of each channel branch from the input end of the SAM connector to the balun circuit and then to the input end of the analog-digital conversion chip are equal.

9. The analog module's circuit board according to claim 1, characterized in that, The filter circuit in each balun circuit is arranged around the analog-digital conversion chip.

10. An analog module device, comprising: The circuit board and the metal shell comprising the analog module according to any one of claims 1-9 are pressed and connected with the shielding strips on the circuit board and used for shielding external interference.