Slow start circuit

By combining NMOS transistors, resistors, and capacitors, the Miller plateau effect is utilized to extend the conduction time. Combined with Zener diodes and reverse connection protection circuits, the high cost of soft-start circuits is solved, achieving soft-start of the load circuit and improved system stability.

CN224097606UActive Publication Date: 2026-04-07CHONGQING CLOUDCHILD TECH CO LTD
View PDF 1 Cites 0 Cited by

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-04-01
Publication Date
2026-04-07

AI Technical Summary

Technical Problem

Existing soft-start circuits are costly and complex to design, and cannot effectively avoid the problems of large current surges and sudden changes in LED brightness during motor startup.

Method used

A combination of NMOS transistors, resistors, and capacitors is used to extend the conduction time by utilizing the Miller plateau effect. Combined with Zener diodes and reverse connection protection circuits, reverse power supply is prevented. An overvoltage protection circuit is set up to isolate the drive signal of the NMOS transistor and avoid current surges and voltage overloads.

Benefits of technology

This achieves slow conduction of the load circuit, avoids current surge impact, improves system stability and safety, and reduces costs.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN224097606U_ABST
    Figure CN224097606U_ABST
Patent Text Reader

Abstract

The utility model belongs to the field of power supply circuits, and particularly relates to a slow start circuit. Which comprises a power supply VCC and a load resistor R3, and is characterized by further comprising an NMOS tube Q1, a first resistor R1, a second resistor R2, a fourth resistor R4 and a first capacitor C1, the circuit is used for prolonging the conduction time of an NMOS tube Q1 and preventing a load resistor R3 from being impacted by surge current. The grid electrode of the NMOS tube Q1 is connected with the power supply through a first resistor R1; the power supply VCC is connected with the drain electrode of the NMOS tube Q1 through a second resistor R2 and a first capacitor C1 which are sequentially connected in series; the power supply VCC is connected with the source electrode of the NMOS tube Q1 through a fourth resistor R4, and the source electrode of the NMOS tube Q1 is also connected with a ground terminal GND; and the load resistor R3 is connected in parallel between the drain electrode of the NMOS tube Q1 and the power supply VCC. According to the invention, the load circuit is slowly switched on, slow starting is realized, and the load circuit is prevented from being impacted by current surge.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This application belongs to the field of power supply circuits, and specifically relates to a soft-start circuit. Background Technology

[0002] Existing technologies for implementing soft-start circuits employ timer chips or PWM modules within an MCU to gradually amplify the control signal, or utilize operational amplifiers and feedback networks to form a negative feedback control system, ensuring that the output voltage or current rises at a predetermined slope. These methods are too costly and complex to design. CN 119134878A, "A Soft-Start Circuit Based on a BUCK Converter," uses a PWM generator module to output a PWM square wave with a gradually increasing duty cycle for soft start, but this method is also costly. Utility Model Content

[0003] To address the technical problem of high cost of soft-start circuits, this application proposes a soft-start circuit;

[0004] In a first aspect, a soft-start circuit is provided, including a power supply VCC and a load resistor R3, and further including: an NMOS transistor Q1, a first resistor R1, a second resistor R2, a fourth resistor R4 and a first capacitor C1; used to extend the conduction time of the NMOS transistor Q1 and prevent the load resistor R3 from being impacted by surge current.

[0005] The gate of the NMOS transistor Q1 is connected to the power supply through a first resistor R1; the power supply VCC is connected to the drain of the NMOS transistor Q1 through a second resistor R2 and a first capacitor C1 connected in series; the power supply VCC is connected to the source of the NMOS transistor Q1 through a fourth resistor R4, and the source of the NMOS transistor Q1 is also connected to the ground terminal GND; the load resistor R3 is connected in parallel between the drain of the NMOS transistor Q1 and the power supply VCC.

[0006] Preferably, it further includes: a Zener diode D1 connected in parallel between the source of the NMOS transistor Q1 and the power supply VCC; the Zener diode D1 is used to limit the voltage between the gate and source of the NMOS transistor Q1.

[0007] Preferably, it further includes: a reverse connection protection circuit to prevent the soft-start circuit from malfunctioning when the power supply VCC has a negative voltage; the reverse connection protection circuit includes: an NMOS transistor Q2, a fifth resistor R5, a sixth resistor R6, and a second capacitor C2; the source of the NMOS transistor Q2 is connected to the source of the NMOS transistor Q1; the fifth resistor R5 and the second capacitor C2 are respectively connected in parallel between the power supply VCC and the source of the NMOS transistor Q2; a sixth resistor R6 for current limiting is provided between the power supply VCC and the gate of the NMOS transistor Q2.

[0008] Preferably, it further includes: a diode U1 disposed between the soft-start circuit and the reverse connection protection circuit for isolation; the cathode of the diode U1 is connected to the power supply VCC, and the anode of the diode U1 is connected to the source of the NMOS transistor Q1 through a fourth resistor R4.

[0009] Preferably, it further includes: a seventh resistor R7 for voltage division; the power supply VCC is connected to one end of the sixth resistor R6 through the seventh resistor R7, and the other end of the sixth resistor R6 is connected to the gate of the NMOS transistor Q2.

[0010] Preferably, it also includes an eighth resistor for voltage division; the power supply VCC is connected to the anode of the diode U1 through the eighth resistor R8.

[0011] Preferably, it further includes: a third capacitor C3 for filtering out high-frequency components in the power supply VCC; one end of the third capacitor C3 is connected to the power supply VCC, and the other end is connected to the drain of the NMOS transistor Q1.

[0012] Preferably, it further includes: an overvoltage protection circuit, used to prevent the soft-start circuit from being burned out when the power supply VCC is overvoltage; the overvoltage protection circuit includes: an NPN transistor Q3, a ninth resistor R9, and a tenth resistor R10; the power supply VCC is connected to the drain of the NMOS transistor Q2 through the series-connected tenth resistor R10 and ninth resistor R9, the base of the NPN transistor Q3 is connected to the connection point of the tenth resistor R10 and the ninth resistor R9, the collector of the NPN transistor Q3 is connected to the power supply VCC, and the emitter of the NPN transistor Q3 is connected to the drain of the NMOS transistor Q2.

[0013] Preferably, it further includes: an overvoltage protection circuit, used to prevent the soft-start circuit from being burned out when the power supply VCC is overvoltage; the overvoltage protection circuit includes: an NPN transistor Q3, a ninth resistor R9, and a Zener diode D2; the power supply VCC is connected to the cathode of the Zener diode D2, the anode of the Zener diode D2 is connected to the drain of the NMOS transistor Q2 through the ninth resistor R9, the base of the NPN transistor Q3 is connected to the junction of the Zener diode D2 and the ninth resistor R9, the collector of the NPN transistor Q3 is connected to the power supply VCC, and the emitter of the NPN transistor Q3 is connected to the drain of the NMOS transistor Q2.

[0014] Preferably, it further includes: an eleventh resistor R11; the eleventh resistor R11 is used to limit the voltage at the drain of the NMOS transistor Q2; one end of the eleventh resistor R11 is connected to the drain of the NMOS transistor Q2, and the other end is connected to the ground terminal GND.

[0015] In summary, this application includes at least one of the following beneficial technical effects:

[0016] This application provides a soft-start circuit that enables the load circuit to turn on slowly, achieving a soft start and avoiding current surges impacting the load circuit. At the same time, this application sets up an overvoltage protection circuit to ensure that the voltage is within a safe range, increasing the safety and reliability of the circuit operation. In addition, diode U1 is used to isolate the drive signals of NMOS transistors Q1 and Q2, preventing them from interfering with each other and improving the stability of the system. Attached Figure Description

[0017] like Figure 1 This is a diagram of a first embodiment of a soft-start circuit;

[0018] like Figure 2 This is a diagram of a second embodiment of a soft-start circuit;

[0019] like Figure 3 This is a third embodiment of a soft-start circuit;

[0020] like Figure 4 This is a fourth embodiment of a soft-start circuit;

[0021] like Figure 5 This is a fifth embodiment of a soft-start circuit. Detailed Implementation

[0022] Terminology Explanation:

[0023] Miller plateau: A unique voltage stabilization phase during the turn-on process of a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor).

[0024] Firstly, such as Figure 1 As shown, a soft-start circuit is provided, including a power supply VCC, a ground terminal GND and a load resistor R3, and also including: an NMOS transistor Q1, a first resistor R1, a second resistor R2, a fourth resistor R4 and a first capacitor C1; used to extend the conduction time of the NMOS transistor Q1 and avoid the load resistor R3 from being impacted by surge current.

[0025] The gate of the NMOS transistor Q1 is connected to the power supply via a first resistor R1; the power supply VCC is connected to the drain of the NMOS transistor Q1 via a second resistor R2 and a first capacitor C1 connected in series; the power supply VCC and the source of the NMOS transistor Q1 are connected via a fourth resistor R4, and the source of the NMOS transistor Q1 is also connected to ground GND; the load resistor R3 is connected in parallel between the drain of the NMOS transistor Q1 and the power supply VCC. In the prior art, the large current surge during motor startup can damage the motor windings and power supply system; the sudden brightness change of an LED light reduces its lifespan and degrades the user experience. These technical problems are all caused by the large instantaneous current during circuit startup. This application aims to solve these technical problems by designing a soft-start circuit to prevent the large current during motor startup from damaging the motor windings and power supply system, thereby improving LED lifespan and enhancing the user experience. Furthermore, the components used in this application are simple, inexpensive, and easy to implement, reducing costs.

[0026] First, this application utilizes the Miller plateau effect of MOSFETs to achieve soft start-up. Parasitic capacitances exist between the three pins of a MOSFET, with the gate-drain capacitance Cgd being called the Miller capacitance. When the MOSFET starts to conduct, the drain voltage Vds begins to decrease. Due to the presence of the Miller capacitance, a portion of the gate current is used to charge Cgd, rather than all of it, to increase the gate voltage Vgs, causing Vgs to remain stable for a period, forming a Miller plateau. The MOSFET conduction process can be divided into three stages. In the first stage, the gate voltage rises rapidly, and the Miller capacitance has no effect. In the second stage, when the gate voltage reaches the Miller plateau voltage, the gate current is mainly used to charge the Miller capacitance, and the gate voltage plateaus. In the third stage, after the Miller capacitance is fully charged, the gate current continues to charge Cgs and Cgd, and the gate voltage continues to rise until the MOSFET is fully turned on.

[0027] Then, this application further adds a first resistor R1, a second resistor R2, and a first capacitor C1 between Cgd to extend the Miller plateau time. This results in a slower output voltage start-up from the load resistor R3, increasing the conduction time. The RC network formed by the added first resistor R1, second resistor R2, and first capacitor C1 extends the conduction time and avoids sudden current changes. The first resistor R1 and the gate capacitor (Cgs) constitute the basic time constant (τ=R1⋅Cgs). The parallel second resistor R2 and Cgd are connected in series with the first resistor R1 to form a composite time constant (τ′=(R1+R2)⋅Cgd), which further slows down the gate charging speed during the Miller plateau stage, extending the conduction time and achieving a smooth current rise, i.e., a slow start-up. By coordinating with the first resistor R1 to adjust the time constant, the conduction speed is slowed down through the modulation of the Miller effect, achieving a slow start-up and suppressing inrush current.

[0028] Preferably, the device further includes a Zener diode D1 connected in parallel between the source of the NMOS transistor Q1 and the power supply VCC; the Zener diode D1 is used to limit the voltage between the gate and source of the NMOS transistor Q1. The Zener diode D1 utilizes the reverse breakdown characteristic of a diode. When the reverse voltage applied to the Zener diode reaches its regulated voltage, the diode enters a reverse breakdown state. At this time, the current flowing through the diode increases sharply, but the voltage across the diode remains essentially unchanged, thus achieving the voltage regulation function.

[0029] Preferred, such as Figure 2 As shown, it also includes a reverse connection protection circuit to prevent the soft-start circuit from malfunctioning when the power supply VCC experiences a negative voltage. The reverse connection protection circuit includes an NMOS transistor Q2, a fifth resistor R5, a sixth resistor R6, and a second capacitor C2. The source of the NMOS transistor Q2 is connected to the source of the NMOS transistor Q1. The fifth resistor R5 and the second capacitor C2 are connected in parallel between the power supply VCC and the source of the NMOS transistor Q2, respectively. A sixth resistor R6 for current limiting is provided between the power supply VCC and the gate of the NMOS transistor Q2. The reverse connection protection circuit utilizes the forward conduction and reverse cutoff characteristics of the NMOS transistor Q2 diode to prevent circuit damage caused by reverse power connection. The internal structure of the NMOS transistor Q2 is prior art and will not be described in detail here.

[0030] Preferred, such as Figure 3 As shown, it also includes: a diode U1 disposed between the soft-start circuit and the reverse connection protection circuit for isolation; the cathode of the diode U1 is connected to the power supply VCC, and the anode of the diode U1 is connected to the source of the NMOS transistor Q1 through a fourth resistor R4. Using the diode U1 isolates the drive signals of NMOS transistors Q1 and Q2, preventing them from interfering with each other and improving the stability of the system.

[0031] Preferably, it further includes: a seventh resistor R7 for voltage division; the power supply VCC is connected to one end of the sixth resistor R6 through the seventh resistor R7, and the other end of the sixth resistor R6 is connected to the gate of the NMOS transistor Q2.

[0032] Preferably, it also includes an eighth resistor for voltage division; the power supply VCC is connected to the anode of the diode U1 through the eighth resistor R8.

[0033] Preferably, it further includes: a third capacitor C3 for filtering out high-frequency components in the power supply VCC; one end of the third capacitor C3 is connected to the power supply VCC, and the other end is connected to the drain of the NMOS transistor Q1.

[0034] Preferred, such as Figure 4As shown, it also includes: an overvoltage protection circuit, used to prevent the soft-start circuit from being burned out when the power supply VCC is overvoltage; the overvoltage protection circuit includes: an NPN transistor Q3, a ninth resistor R9 and a tenth resistor R10; the power supply VCC is connected to the drain of the NMOS transistor Q2 through the series connection of the tenth resistor R10 and the ninth resistor R9, the base of the NPN transistor Q3 is connected to the connection of the tenth resistor R10 and the ninth resistor R9, the collector of the NPN transistor Q3 is connected to the power supply VCC, and the emitter of the NPN transistor Q3 is connected to the drain of the NMOS transistor Q2.

[0035] Preferred, such as Figure 5 As shown, it also includes an overvoltage protection circuit to prevent the soft-start circuit from burning out when the power supply VCC is overvoltage. The overvoltage protection circuit includes an NPN transistor Q3, a ninth resistor R9, and a Zener diode D2. The power supply VCC is connected to the cathode of the Zener diode D2, the anode of the Zener diode D2 is connected to the drain of the NMOS transistor Q2 through the ninth resistor R9, the base of the NPN transistor Q3 is connected to the junction of the Zener diode D2 and the ninth resistor R9, the collector of the NPN transistor Q3 is connected to the power supply VCC, and the emitter of the NPN transistor Q3 is connected to the drain of the NMOS transistor Q2. When the input voltage fluctuates abnormally, exceeding the range of the Zener diode, it breaks down. Then, when VBE > 0.7, the transistor Q3 conducts, directly pulling the voltage to ground to prevent damage to other circuits.

[0036] Preferably, it further includes: an eleventh resistor R11; the eleventh resistor R11 is used to limit the voltage at the drain of the NMOS transistor Q2; one end of the eleventh resistor R11 is connected to the drain of the NMOS transistor Q2, and the other end is connected to the ground terminal GND.

[0037] In summary, this application includes at least one of the following beneficial technical effects: it provides a soft-start circuit that enables the load circuit to turn on slowly, thereby achieving a soft start and avoiding current surges impacting the load circuit; it ensures that the voltage is within a safe range through an overvoltage protection circuit; and it uses diode U1 to isolate the drive signals of NMOS transistors Q1 and Q2, preventing them from interfering with each other and improving the stability of the system.

[0038] The above are all preferred embodiments of this application and are not intended to limit the scope of protection of this application. Any feature disclosed in this specification (including the abstract and drawings) may be replaced by other equivalent or similar features unless specifically stated otherwise. That is, unless specifically stated otherwise, each feature is only one example of a series of equivalent or similar features.

Claims

1. A soft-start circuit, comprising a power supply VCC, a ground terminal GND, and a load resistor R3, characterized in that, Also includes: The NMOS transistor Q1, first resistor R1, second resistor R2, fourth resistor R4, and first capacitor C1 are used to extend the conduction time of the NMOS transistor Q1 and prevent the load resistor R3 from being impacted by surge current. The gate of the NMOS transistor Q1 is connected to the power supply through a first resistor R1; the power supply VCC is connected to the drain of the NMOS transistor Q1 through a second resistor R2 and a first capacitor C1 connected in series; the power supply VCC is connected to the source of the NMOS transistor Q1 through a fourth resistor R4, and the source of the NMOS transistor Q1 is also connected to the ground terminal GND; the load resistor R3 is connected in parallel between the drain of the NMOS transistor Q1 and the power supply VCC.

2. The soft-start circuit according to claim 1, characterized in that, Also includes: A Zener diode D1 is connected in parallel between the source of the NMOS transistor Q1 and the power supply VCC; the Zener diode D1 is used to limit the voltage between the gate and source of the NMOS transistor Q1.

3. The soft-start circuit according to claim 1, characterized in that, Also includes: The reverse connection protection circuit is used to prevent the soft-start circuit from malfunctioning when the power supply VCC has a negative voltage; the reverse connection protection circuit includes: NMOS transistor Q2, fifth resistor R5, sixth resistor R6, and second capacitor C2. The source of NMOS transistor Q2 is connected to the source of NMOS transistor Q1; the fifth resistor R5 and the second capacitor C2 are connected in parallel between the power supply VCC and the source of NMOS transistor Q2; a sixth resistor R6 for current limiting is provided between the power supply VCC and the gate of NMOS transistor Q2.

4. The soft-start circuit according to claim 3, characterized in that, Also includes: A diode U1 is disposed between the soft-start circuit and the reverse connection protection circuit for isolation; the cathode of the diode U1 is connected to the power supply VCC, and the anode of the diode U1 is connected to the source of the NMOS transistor Q1 through a fourth resistor R4.

5. The soft-start circuit according to claim 4, characterized in that, Also includes: The seventh resistor R7 is used for voltage division; the power supply VCC is connected to one end of the sixth resistor R6 through the seventh resistor R7, and the other end of the sixth resistor R6 is connected to the gate of the NMOS transistor Q2.

6. The soft-start circuit according to claim 4, characterized in that, It also includes an eighth resistor for voltage division; the power supply VCC is connected to the anode of the diode U1 through the eighth resistor R8.

7. The soft-start circuit according to claim 4, characterized in that, Also includes: The third capacitor C3 is used to filter out high-frequency components in the power supply VCC. One end of the third capacitor C3 is connected to the power supply VCC, and the other end is connected to the drain of the NMOS transistor Q1.

8. The soft-start circuit according to claim 4, characterized in that, Also includes: An overvoltage protection circuit is used to prevent the soft-start circuit from burning out when the power supply VCC is overvoltaged. The overvoltage protection circuit includes: NPN transistor Q3, ninth resistor R9 and tenth resistor R10; The power supply VCC is connected to the drain of NMOS transistor Q2 through a series connection of tenth resistor R10 and ninth resistor R9. The base of NPN transistor Q3 is connected to the connection point of the tenth resistor R10 and the ninth resistor R9. The collector of NPN transistor Q3 is connected to the power supply VCC. The emitter of NPN transistor Q3 is connected to the drain of NMOS transistor Q2.

9. The soft-start circuit according to any one of claims 4-7, characterized in that, Also includes: An overvoltage protection circuit is used to prevent the soft-start circuit from burning out when the power supply VCC is overvoltaged. The overvoltage protection circuit includes: NPN transistor Q3, ninth resistor R9 and Zener diode D2; The power supply VCC is connected to the cathode of the Zener diode D2. The anode of the Zener diode D2 is connected to the drain of the NMOS transistor Q2 through the ninth resistor R9. The base of the NPN transistor Q3 is connected to the junction of the Zener diode D2 and the ninth resistor R9. The collector of the NPN transistor Q3 is connected to the power supply VCC. The emitter of the NPN transistor Q3 is connected to the drain of the NMOS transistor Q2.

10. The soft-start circuit according to any one of claims 1-8, characterized in that, Also includes: Eleventh resistor R11; The eleventh resistor R11 is used to limit the voltage at the drain of the NMOS transistor Q2; One end of the eleventh resistor R11 is connected to the drain of the NMOS transistor Q2, and the other end is connected to the ground terminal GND.

Citation Information

Patent Citations

  • Slow start circuit based on BUCK converter

    CN119134878A