Display panel and display device
By setting up pads with varying thicknesses in the display panel, the problem of non-conductivity caused by edge warping of integrated circuits was solved, resulting in a more stable electrical connection.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-08
- Publication Date
- 2026-04-07
AI Technical Summary
During the bonding process between integrated circuits and array substrates, the edge pads of integrated circuits are prone to lifting, leading to a lack of conductivity.
By setting the thickness of the pad group further away from the input pad to be greater than that of the pad group closer to the input pad, the problem of smaller indentations caused by warping is compensated, and the difference in pressure between pad groups is reduced to ensure the stability of the electrical connection.
This effectively reduces the phenomenon of non-conductivity between the integrated circuit layer and the array substrate, and improves the reliability and stability of the electrical connection.
Smart Images
Figure CN224097904U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of display, in particular to a display panel and a display device. BACKGROUND
[0002] In order to meet the increasingly high definition requirements, the output pads of integrated circuits (IC) become more and more, for example, from the original two rows of pads to three or four rows of pads, and the distance between part of the output pads and the input pads of the integrated circuits is also increased.
[0003] When the integrated circuit and the array substrate are bonded by using a pressure head, the edge pads of the integrated circuit are prone to warping, so that the integrated circuit and the array substrate cannot be conducted. CONTENT OF THE UTILITY MODEL
[0004] The purpose of the present application is to provide a display panel and a display device, aiming to reduce the difference in the amount of pressing between the first pad group and the second pad group, so as to reduce the phenomenon that the integrated circuit layer and the array substrate cannot be conducted.
[0005] The display panel provided by the embodiments of the present application comprises: an integrated circuit layer comprising a first surface and a second surface oppositely arranged along a first direction, the first direction being the thickness direction of the integrated circuit layer; a plurality of first pads arranged on the first surface of the integrated circuit layer, the plurality of first pads comprising a plurality of input pads and a plurality of output pads oppositely arranged along a second direction, the second direction being parallel to the first surface; wherein the plurality of output pads comprise a plurality of pad groups arranged along the second direction, each pad group comprising at least one output pad arranged along a third direction, the third direction being parallel to the first surface and perpendicular to the second direction; the plurality of pad groups comprise a first pad group and a second pad group arranged adjacent to each other along the second direction, the second pad group being arranged away from the input pads relative to the first pad group, and the thickness of the second pad group being greater than the thickness of the first pad group.
[0006] In some embodiments, the thickness of the plurality of pad groups gradually increases in the direction away from the input pads along the second direction.
[0007] In some embodiments, the thickness difference of any two adjacent pad groups along the first direction is the same.
[0008] In some embodiments, there is a thickness difference between every two adjacent pad groups along the first direction, and the thickness difference gradually increases in the direction away from the input pads along the second direction.
[0009] In some embodiments, the display panel further comprises: an array substrate disposed opposite to a first surface of the integrated circuit layer, the first surface being disposed on a side of the second surface close to the array substrate; and a plurality of second pads located on a side of the array substrate facing the first surface and electrically connected to the first pads.
[0010] In some embodiments, the first pads and the second pads are disposed in alignment, and the display panel further comprises: a conductive layer located between the integrated circuit layer and the array substrate and electrically connecting the first pads and the second pads.
[0011] In some embodiments, the conductive layer is an anisotropic conductive film having conductive particles therein, and one pad group farthest from the input pad has a maximum thickness in the first direction, the maximum thickness being smaller than a diameter of the conductive particles.
[0012] In some embodiments, one pad group closest to the input pad has a minimum thickness in the first direction, a thickness of the input pad being greater than or equal to the minimum thickness and smaller than the maximum thickness.
[0013] In some embodiments, the plurality of input pads are arranged equidistantly in the third direction and have equal thicknesses, and the plurality of output pads are arranged equidistantly in the second direction and the third direction respectively, and within the same pad group, the plurality of output pads have equal thicknesses.
[0014] Embodiments of the present application also provide a display device comprising the display panel of any of the above embodiments.
[0015] In the display panel provided by the present application, the thickness of the second pad group farther from the input pad is set to be greater than the thickness of the first pad group closer to the input pad, and the greater thickness of the second pad group can compensate for the problem of smaller indentation due to warping, thereby reducing the difference in the amount of pressing between the first pad group and the second pad group, and reducing the phenomenon that the integrated circuit layer and the array substrate cannot be conducted. BRIEF DESCRIPTION OF DRAWINGS
[0016] The technical solutions and other beneficial effects of the present application will become apparent from the following detailed description of specific embodiments of the present application, taken in conjunction with the accompanying drawings.
[0017] Figure 1 is a schematic diagram of an indentation of a conductive layer in a display panel;
[0018] Figure 2 is a schematic diagram of a cross-sectional structure of a display panel according to some embodiments of the present application;
[0019] Figure 3 is a cross-sectional view of the display panel after deformation; Figure 2
[0020] Figure 4 is a top view of the integrated circuit layer and the first bonding pad in the display panel; Figure 2
[0021] Figure 5 is a side view of the integrated circuit layer and the first bonding pad in the display panel; Figure 2
[0022] Figure 6 is a structural schematic diagram of a display device provided by some embodiments of the present application.
[0023] Legend of reference signs:
[0024] 100, display panel; 200, display device; 201, display panel;
[0025] 10, integrated circuit layer; 101, first surface; 102, second surface;
[0026] 20, first bonding pad; 21, input bonding pad; 22, output bonding pad; 220, bonding pad group; 221, first bonding pad group; 222, second bonding pad group; P1, first row of bonding pad groups; P2, second row of bonding pad groups; P3, third row of bonding pad groups; P4, fourth row of bonding pad groups;
[0027] 30, array substrate;
[0028] 40, conductive layer; A1, first row of pressure marks; A2, first row of pressure marks; A3, third row of pressure marks; A4, fourth row of pressure marks;
[0029] 50, pressure head;
[0030] 60, first virtual bonding pad;
[0031] Z, first direction; Y, second direction; X, third direction. DETAILED DESCRIPTION
[0032] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work fall within the scope of protection of the present application.
[0033] Please refer to Figure 1 , Figure 1 is a pressure mark schematic diagram of a conductive layer in a display panel.
[0034] The display panel includes an integrated circuit layer, an array substrate, a first pad on the surface of the integrated circuit layer, a second pad on the surface of the array substrate, and a conductive layer 40 located between the integrated circuit layer and the array substrate. The conductive layer 40 electrically connects the first pad and the second pad. The first pad includes an input pad and an output pad disposed opposite each other along a second direction Y. The output pad includes a first row of pads, a second row of pads, a third row of pads, and a fourth row of pads arranged in a direction away from the input pads.
[0035] When using a pressure head to bond the integrated circuit layer to the array substrate, the integrated circuit layer is prone to deformation after bonding with the array substrate, resulting in edge warping. Figure 1 The display shows the indentation state of the conductive layer 40 corresponding to the output pads. The first row of indentations A1, the second row of indentations A2, the third row of indentations A3, and the fourth row of indentations A4 correspond to four pad groups (i.e., the first row of pads, the second row of pads, the third row of pads, and the fourth row of pads) along the direction away from the input pads. Among them, the fourth row of indentations A4 is located at the edge of the conductive layer 40, and the fourth row of pads is located at the edge of the integrated circuit layer; the first row of pads is the pad group closest to the input pads, and the first row of indentations A1 is the innermost indentation of the conductive layer 40.
[0036] Since the thickness of multiple pad groups is equal along the first direction Z, when the edge warps, the amount of pressure applied to the pad group closer to the edge is smaller, that is, the pressure becomes shallower from the first row of indentations A1 to the fourth row of indentations A4.
[0037] Based on this, some embodiments of this application provide a display panel, including: an integrated circuit layer, including a first surface and a second surface disposed opposite to each other along a first direction, the first direction being the thickness direction of the integrated circuit layer; and a plurality of first pads disposed on the first surface of the integrated circuit layer, the plurality of first pads including a plurality of input pads and a plurality of output pads disposed opposite to each other along a second direction, the second direction being parallel to the first surface. The plurality of output pads include a plurality of pad groups arranged along the second direction, each pad group including at least one output pad arranged along a third direction, the third direction being parallel to the first surface and perpendicular to the second direction. The plurality of pad groups include a first pad group and a second pad group disposed adjacent to each other along the second direction, the second pad group being disposed away from the input pads relative to the first pad group, and the thickness of the second pad group being greater than the thickness of the first pad group.
[0038] In this embodiment, the thickness of the second pad group, which is farther away from the input pad, is set to be greater than the thickness of the first pad group, which is closer to the input pad. The larger thickness of the second pad group can compensate for the problem of smaller indentations caused by warping, thereby reducing the difference in the amount of pressure between the first pad group and the second pad group, so as to reduce the phenomenon that the integrated circuit layer and the array substrate cannot conduct.
[0039] Please see Figures 2 to 5 , Figure 2 This is a cross-sectional structural diagram of the display panel in some embodiments of this application. Figure 3 yes Figure 2 A cross-sectional view of the display panel after it has been deformed. Figure 4 yes Figure 2 A top view of the integrated circuit layer and the first pad. Figure 5 yes Figure 2 A side view of the integrated circuit layer and the first pad.
[0040] The display panel 100 includes an integrated circuit layer 10 and a plurality of first pads 20. The integrated circuit layer 10 includes a first surface 101 and a second surface 102 disposed opposite to each other along a first direction Z, where the first direction Z is the thickness direction of the integrated circuit layer 10. The plurality of first pads 20 are disposed on the first surface 101 of the integrated circuit layer 10. The plurality of first pads 20 include a plurality of input pads 21 and a plurality of output pads 22 disposed opposite to each other along a second direction Y, where the second direction Y is parallel to the first surface 101. The plurality of output pads 22 include a plurality of pad groups 220 arranged along the second direction Y. Each pad group 220 includes at least one output pad 22 arranged along a third direction X, where the third direction X is parallel to the first surface 101 and perpendicular to the second direction Y. The plurality of pad groups 220 include a first pad group 221 and a second pad group 222 arranged adjacent to each other along the second direction Y. The second pad group 222 is arranged away from the input pad 21 relative to the first pad group 221, and the thickness of the second pad group 222 is greater than the thickness of the first pad group 221.
[0041] Figure 4 The arrangement of the first pad 20 is shown, wherein the input pads 21 are arranged in a row along the third direction X, and the output pads 22 include four pad groups 220, each pad group 220 is arranged in a row along the third direction X, that is, one pad group 220 is a row (or a line) of output pads 22.
[0042] It should be noted that only four rows of pad groups 220 are shown in the figure, and this embodiment of the application is not limited thereto. Along the direction away from the input pad 21 in the second direction Y, the pad groups are, in sequence, the first row of pad group P1, the second row of pad group P2, the third row of pad group P3, and the fourth row of pad group P4.
[0043] In some embodiments, the plurality of input pads 21 are arranged at equal distances along the third direction X, and the plurality of input pads 21 have equal thickness along the first direction Z.
[0044] Since the input pads 21 are arranged in a row along the third direction X, the degree of warping of the integrated circuit layer 10 is the same here, so the thickness of the input pads 21 is equal, which can make the pressure of the input pads 21 consistent.
[0045] In some embodiments, the plurality of output pads 22 are arranged at equal distances along the second direction Y and the third direction X, and within the same pad group 220, the plurality of output pads 22 have equal thickness along the first direction Z.
[0046] Since the deformation degree of the integrated circuit layer 10 at the same pad group 220 is the same, setting the thickness of the output pads 22 in the same pad group 220 to be equal can make the downward pressure of the output pads 22 in the same pad group 220 the same.
[0047] The integrated circuit layer 10 can be a driver chip. The first pad 20 is located on the first surface 101 of the integrated circuit layer 10 and is used to make an electrical connection with the array substrate to realize signal transmission.
[0048] The first pad 20 can be made of a conductive metal such as copper. The integrated circuit layer 10 can also include a circuit structure, through which the input pad 21 and the output pad 22 of the first pad 20 are electrically connected. The input pad 21 can be electrically connected to an external circuit (e.g., a flexible circuit board), and the output pad 22 can be electrically connected to the internal circuit of the array substrate.
[0049] In some embodiments, the thickness of the plurality of pad groups 220 gradually increases along the first direction Z in the second direction Y, away from the input pad 21.
[0050] Because the warpage of the corresponding position of the integrated circuit layer 10 gradually increases along the direction away from the input pad 21 in the second direction Y (e.g.) Figure 3 As shown), this results in a smaller pressure drop for pad group 220 closer to the edge (further from input pad 21). Figure 1 (As shown). Therefore, by setting the thickness of the multiple pad groups 220 to gradually increase along the first direction Z, the downward pressure of the multiple pad groups 220 can be matched.
[0051] In some embodiments, the thickness difference between two adjacent pad groups 220 along the first direction Z is 0.2 μm to 2.0 μm.
[0052] In some embodiments, the thickness difference between any two adjacent pad groups 220 along the first direction Z is the same. In other embodiments, the thickness difference between two adjacent pad groups 220 along the first direction Z may be different. Embodiments of this application can be based on... Figure 1 The difference in the pressure of the middle pad group 220 leads to a differentiated design of the thickness of the pad group 220, ultimately ensuring that the pressure of multiple pad groups 220 is consistent.
[0053] In some embodiments, the thickness difference between two adjacent pad groups 220 along the first direction Z is different, with a thickness difference between each two adjacent pad groups 220 along the first direction Z. The thickness difference gradually increases in the second direction Y, away from the input pad 21. This allows for more effective improvement in the pressure applied to the output pad 22 at the edge position, especially in cases with greater edge warping.
[0054] For example, such as Figure 5 As shown, the thickness difference between the first row of pads P1 and the second row of pads P2 is ΔH1, the thickness difference between the second row of pads P2 and the third row of pads P3 is ΔH2, and the thickness difference between the third row of pads P3 and the fourth row of pads P4 is ΔH3, where ΔH1 < ΔH2 < ΔH3.
[0055] The display panel 100 further includes an array substrate 30 and a plurality of second pads (not shown). The array substrate 30 is disposed opposite to a first surface 101 of the integrated circuit layer 10, and the first surface 101 is disposed on the side of the second surface 102 near the array substrate 30. The second pads are located on the side of the array substrate 30 facing the first surface 101 and are electrically connected to the first pads 20. The material of the second pads may be the same as the material of the first pads 20.
[0056] In some embodiments, the first pad 20 and the second pad are aligned. For example, the first pad 20 and the second pad are connected in a one-to-one correspondence to achieve bonding between the integrated circuit layer 10 and the array substrate 30. That is, the arrangement and size of the first pad 20 and the second pad can be the same.
[0057] In some embodiments, the thickness of the second pad along the first direction Z can be differentiated, following the same thickness variation trend as the first pad 20. For example, the second pad can be set to be thicker at locations where the first pad 20 is thicker, and thinner at locations where the first pad 20 is thinner. Under the same pressure, a larger second pad thickness increases the downward pressure on the first pad 20, which is beneficial for the conductivity between the first pad 20 and the second pad.
[0058] The display panel 100 may further include a first virtual pad 60 and a second virtual pad (not shown). The first virtual pad 60 is located on the first surface 101 of the integrated circuit and between the input pad 21 and the output pad 22. The second virtual pad is located on the side of the array substrate 30 facing the integrated circuit layer 10 and is aligned with the first virtual pad 60.
[0059] It should be noted that the first virtual pad 60 and the second virtual pad are connected, but not connected to any other circuits. They only play a supporting role in the bonding of the integrated circuit layer 10 and the array substrate 30, reducing the collapse of the middle position of the bonding structure.
[0060] The display panel 100 may further include a conductive layer 40, which is located between the integrated circuit layer 10 and the array substrate 30 and electrically connects the first pad 20 and the second pad.
[0061] "Indentation depth" can be understood as the depth to which the first pad 20 is pressed into the conductive layer 40. The greater the indentation depth of the second pad, the deeper the indentation in the conductive layer 40; the smaller the indentation depth of the second pad, the shallower the indentation in the conductive layer 40. A deeper indentation means a more stable electrical connection and better conductivity between the first pad 20 and the second pad. Therefore, it is necessary to improve the thickness of the output pad 22 at the warped location of the integrated circuit layer 10.
[0062] In some embodiments, the conductive layer 40 is an anisotropic conductive film containing conductive particles.
[0063] Since the edge of the integrated circuit layer 10 has the highest ground clearance, the pad group 220 that is farthest from the input pad 21 has the largest thickness along the first direction Z, and the pad group 220 that is closest to the input pad 21 has the smallest thickness along the first direction Z.
[0064] In some embodiments, the maximum thickness is less than the diameter of the conductive particle, so the thickness of other pad groups 220 is also less than the diameter of the conductive particle, which is beneficial for the conductive particle to achieve a good electrical connection between the first pad 20 and the second pad.
[0065] In some embodiments, the diameter of the conductive particles is 2.5 μm to 3.5 μm.
[0066] In some embodiments, the cross-sectional area of a single input pad 21 in the plane formed by the second direction Y and the third direction X is larger than the cross-sectional area of a single output pad 22 in the same plane, which results in... Figure 3 The warping of the integrated circuit layer 10 on the input pad 21 side is relatively small.
[0067] In some embodiments, the thickness of the input pad 21 along the first direction Z is greater than or equal to the minimum thickness, and the thickness of the input pad 21 along the first direction Z is less than the maximum thickness.
[0068] In other words, the thickness of the input pad 21 can be set to be equal to the minimum thickness of the output pad 22. Alternatively, the thickness of the input pad 21 can be set to be greater than the minimum thickness of the output pad 22 to improve the problem of insufficient pressure reduction caused by the warpage of the integrated circuit on the input pad 21 side. However, since the warpage degree on the input pad 21 side is less than that on the output pad 22 side, the thickness of the input pad 21 along the first direction Z is set to be less than the maximum thickness, so that the pressure reduction of the input pad 21 is consistent with the pressure reduction of the output pad 22.
[0069] In the display panel provided in this application embodiment, the thickness of the second pad group 222, which is farther away from the input pad 21, is set to be greater than the thickness of the first pad group 221, which is closer to the input pad 21. The larger thickness of the second pad group 222 can compensate for the problem of smaller indentation caused by warping, thereby reducing the difference in the amount of pressure between the first pad group 221 and the second pad group 222, and reducing the phenomenon that the integrated circuit layer 10 and the array substrate 30 cannot conduct.
[0070] This application also provides a display device; please refer to [link / reference]. Figure 6 , Figure 6 This is a schematic diagram of the structure of a display device provided in some embodiments of this application.
[0071] The display device 200 includes a device body and a display panel 201, which can be the display panel in any of the above embodiments. Furthermore, the device body may include a frame, driving components, a power supply, etc., and the display device can be a mobile phone, tablet, television, or other display terminal, without limitation.
[0072] The above description of the embodiments is only for the purpose of helping to understand the technical solutions and core ideas of this application; those skilled in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or make equivalent substitutions for some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.
Claims
1. A display panel, characterized in that, include: An integrated circuit layer includes a first surface and a second surface disposed opposite to each other along a first direction, wherein the first direction is the thickness direction of the integrated circuit layer; A plurality of first pads are disposed on a first surface of the integrated circuit layer, the plurality of first pads including a plurality of input pads and a plurality of output pads disposed opposite to each other along a second direction, the second direction being parallel to the first surface; The plurality of output pads include a plurality of pad groups arranged along the second direction, each pad group including at least one output pad arranged along a third direction, the third direction being parallel to the first surface and perpendicular to the second direction; the plurality of pad groups include a first pad group and a second pad group arranged adjacent to each other along the second direction, the second pad group being disposed away from the input pads relative to the first pad group, and the thickness of the second pad group being greater than the thickness of the first pad group.
2. The display panel according to claim 1, characterized in that, In the second direction, along the direction away from the input pad, the thickness of the plurality of pad groups gradually increases.
3. The display panel according to claim 2, characterized in that, The thickness difference between any two adjacent pad groups along the first direction is the same.
4. The display panel according to claim 2, characterized in that, There is a thickness difference between each pair of adjacent pad groups along the first direction, and the thickness difference gradually increases in the second direction away from the input pad.
5. The display panel according to claim 1, characterized in that, The display panel also includes: An array substrate is disposed opposite to a first surface of the integrated circuit layer, wherein the first surface is disposed on the side of the second surface closer to the array substrate; Multiple second pads are located on the side of the array substrate facing the first surface and are electrically connected to the first pads.
6. The display panel according to claim 5, characterized in that, The first pad and the second pad are aligned, and the display panel further includes: A conductive layer is located between the integrated circuit layer and the array substrate, and electrically connects the first pad and the second pad.
7. The display panel according to claim 6, characterized in that, The conductive layer is an anisotropic conductive film, and the anisotropic conductive film contains conductive particles; The pad group furthest from the input pad has the maximum thickness along the first direction, the maximum thickness being less than the diameter of the conductive particle.
8. The display panel according to claim 7, characterized in that, The pad group closest to the input pad has a minimum thickness along the first direction, the thickness of the input pad is greater than or equal to the minimum thickness, and the thickness of the input pad is less than the maximum thickness.
9. The display panel according to claim 1, characterized in that, The input pads are arranged at equal intervals along the third direction, and the thickness of the input pads is equal. The multiple output pads are arranged at equal distances along the second direction and the third direction, and within the same pad group, the multiple output pads have the same thickness.
10. A display device, characterized in that, Includes the display panel as described in any one of claims 1 to 9.