Chip resistor based on copper sputtering process

Abstract

The utility model discloses a chip resistor based on a sputtering copper process, and particularly relates to the technical field of chip resistors, which comprises a ceramic substrate, a second sputtering copper layer is arranged on the top of the ceramic substrate, and first sputtering copper layers are symmetrically arranged on two sides of the bottom of the ceramic substrate. According to the utility model, the copper layers are sputtered on the whole front surface and the local back surface of the ceramic substrate, so that the conductive layer on the upper surface and the resistive layer form an integral structure and are synchronously operated with the conductive layer on the back surface, the vacuum coating is more suitable for batch production, the surface uniformity of the vacuum coating layer formed by sputtering is good, and the film structure is compact; the quality performance is stable, silver paste is replaced by the copper target material, the manufacturing cost can be reduced, the production efficiency is effectively improved, the manufacturing cost is remarkably reduced, the second sputtering copper layer is protected from being corroded by the external environment through the protective layer, the copper layer is prevented from being oxidized, and meanwhile the mechanical strength and the insulating property of the chip resistor are enhanced; and identification, tracing and quality control of the product are facilitated through the identification layer.

Description

TECHNICAL FIELD

[0001] The utility model relates to patch resistor technical field more specifically, the utility model relates to patch resistor based on sputtering copper technology. BACKGROUND

[0002] At the moment of electronic industry's rapid development, patch resistor as the key element of realizing circuit function in the circuit is widely used in various electronic products, and its performance directly influences the overall quality, stability and reliability of electronic products, with the development of electronic products to miniaturization, integration and high performance, higher requirements are put forward for the precision, reliability, consistency and production efficiency of patch resistor;

[0003] The existing 0R thick film patch resistor adopts ceramic substrate as carrier, forms circuit through silver paste with specific pattern of silk screen printing, and prints resistive ink (silver paste) on the upper surface of the ceramic substrate as resistor, and connects the two ends with conductor, and prints a protective layer (glass) on the resistor layer, and prints a protective layer (epoxy resin) on the protective layer again;

[0004] But the existing patch resistor uses silver paste as resistor, which meets the production demand, but silver as a kind of expensive metal, its large use in silver paste makes the raw material cost high, and secondly, since the resistor layer is formed by printing silver paste, the thickness uniformity is difficult to control absolutely accurately, which leads to large resistor value dispersion, and in the precision electronic equipment with strict requirement on resistor precision, the instability of the resistor value may affect the performance and reliability of the whole circuit system. UTILITY MODEL CONTENTS

[0005] In order to overcome the above-mentioned defects of prior art, the utility model provides patch resistor based on sputtering copper technology to solve the problems in the above background.

[0006] In order to realize the above-mentioned purpose, the utility model provides the following technical scheme: the sputtering copper process based chip resistor, including ceramic substrate, the top of ceramic substrate is provided with second sputtering copper layer, the bottom of ceramic substrate both sides symmetry is provided with first sputtering copper layer, can be used as the conductive main body of chip resistor through first sputtering copper layer and second sputtering copper layer, provides the conduction path for current, and its good conductivity and stability are the key to guarantee the electrical performance of chip resistor The top central position of second sputtering copper layer is provided with a protective layer, and the top of the protective layer is provided with a mark layer, which provides a stable support platform for other functional layers through the ceramic substrate, ensures the structural stability and electrical insulation of the chip resistor under various environmental conditions, and the protective layer is selected from materials with excellent insulation performance, wear resistance and chemical stability, such as epoxy resin or polyimide, which can protect the second sputtering copper layer from the erosion of the external environment, prevent the oxidation of the copper layer, and at the same time enhance the mechanical strength and insulation performance of the chip resistor, and the mark layer is printed with special ink that is resistant to high temperature and wear, which contains important information such as resistance value, model, production batch, etc., facilitating product identification, traceability and quality control.

[0007] The two sides of the ceramic substrate are symmetrically provided with a conductive layer, one side of the conductive layer, the first sputtering copper layer and the two end positions of the second sputtering copper layer are provided with a nickel plating layer, and the outside of the nickel plating layer is provided with a tin plating layer. The conductive layer can effectively reduce the contact resistance and ensure smooth transmission of current, and at the same time improve the reliability of the chip resistor during welding. By setting the nickel plating layer, the nickel layer has good corrosion resistance and weldability, which can effectively protect the internal copper layer from oxidation, and at the same time provide a good adhesion base for the tin plating layer. By setting the tin plating layer, the tin layer has a low melting point and good wettability, which facilitates the welding of the chip resistor and the circuit board during the assembly of electronic products, and improves the welding quality and reliability.

[0008] Preferably, the first sputtering copper layer and the second sputtering copper layer are plated on the upper and lower sides of the ceramic substrate by vacuum sputtering. The vacuum sputtering process can make copper atoms uniformly and densely deposit on the surface of the ceramic substrate under high vacuum environment through ion bombardment, forming a copper layer with uniform thickness and strong adhesion.

[0009] Preferably, the protective layer is fixed on the top central position of the second sputtering copper layer by drying after printing, and the mark layer is fixed on the protective layer by sintering after printing. The protective layer protects the second sputtering copper layer from the erosion of the external environment, prevents the oxidation of the copper layer, and at the same time enhances the mechanical strength and insulation performance of the chip resistor. The mark layer facilitates product identification, traceability and quality control.

[0010] Preferably, two ends of the conductive layer are located on one side of the first sputtered copper layer and the second sputtered copper layer, the conductive layer is sputtered on both sides of the ceramic substrate by a vacuum sputtering machine, and the conductive layer formed by the vacuum sputtering process is tightly combined with the sputtered copper layer, so that the contact resistance can be effectively reduced.

[0011] Preferably, the nickel plating layer is sputtered on the top of the two ends of the second sputtered copper layer, one side of the conductive layer and the bottom of the first sputtered copper layer by means of barrel plating, and the tin plating layer is sputtered on the outside of the nickel plating layer by means of barrel plating, so that the copper layer inside can be effectively protected from being oxidized by the nickel plating layer, and the tin plating layer facilitates the soldering of the chip resistor and the circuit board, thereby improving the soldering quality and reliability.

[0012] Preferably, the ceramic substrate is provided with a back mask paste printed on the bottom of the ceramic substrate at the central position before sputtering the first sputtered copper layer, and the back mask paste and the first sputtered copper layer attached to one side of the back mask paste are removed by ultrasonic cleaning agent before printing the protective layer, so that the area of the back surface of the ceramic substrate which does not need to be plated with copper can be effectively protected in the subsequent process, copper deposition in this area during vacuum sputtering is avoided, a specific conductive structure is laid for subsequent formation, and the high-frequency vibration and cavitation effect generated by ultrasonic waves are used to quickly and efficiently dissolve the mask paste and strip the unnecessary copper layer, so that the surface of the cleaned ceramic substrate is clean, the second sputtered copper layer on the front surface and the ceramic substrate body are not damaged, and the subsequent process is ensured to proceed smoothly.

[0013] Preferably, the ceramic substrate is provided with a first score line and a second score line in the longitudinal and transverse directions respectively, the ceramic substrate is broken into strips by the first score line before sputtering the conductive layer, and the ceramic substrate is broken into a plurality of single finished product sizes by the second score line before sputtering the nickel plating layer, so that the ceramic substrate is broken into strips by the first score line before sputtering the conductive layer, which facilitates subsequent side sputtering and processing; the ceramic substrate is broken into a plurality of single finished product sizes by the second score line before sputtering the nickel plating layer, which forms independent chip resistor semi-finished products, improves production efficiency and product consistency.

[0014] The technical effects and advantages of the utility model are as follows:

[0015] 1. The utility model discloses a ceramic substrate is first through the process of sputtering copper layer in the whole piece of front surface and local back surface, make its upper surface conductive layer and resistance layer become integral structure, and the back surface conductive layer synchronous operation, more suitable for batch production, the surface uniformity of vacuum plating film layer formed by sputtering is good, and the film layer structure is dense, and its quality performance is relatively stable, and through copper target material replaces silver paste, can reduce manufacturing cost, effectively improve production efficiency and significantly reduce manufacturing cost, through the protection of second sputtering copper layer from the erosion of external environment by the protection layer, prevent copper layer oxidation, simultaneously strengthen the mechanical strength and insulating property of chip resistor, through the identification layer, the identification, traceability and quality control of product are convenient,

[0016] 2. The utility model discloses still through the setting of nickel plating layer, can according to nickel layer has good corrosion resistance and weldability, can effectively protect the copper layer in, prevent its oxidation, simultaneously provides good adhesion foundation for tin plating layer, through the setting of tin plating layer, tin layer has lower melting point and good wettability, in the electronic product assembly process, it is convenient for chip resistor and circuit board to carry out welding, improves the welding quality and reliability, through the setting of first score line and second score line, can in the making process, assist breaking into separate resistance chip, improve production efficiency and product consistency,

[0017] Summarizing, through the mutual influence of above-mentioned multiple actions, can reduce cost while convenient batch production, and the surface uniformity of vacuum plating film layer formed by sputtering is good, and the film layer structure is dense, and its quality performance is relatively stable. BRIEF DESCRIPTION OF DRAWINGS

[0018] Figure 1 It is whole structure schematic diagram of the utility model.

[0019] Figure 2 It is plate material structure schematic diagram of the utility model ceramic substrate.

[0020] Figure 3 It is cross section structure schematic diagram of the utility model sputtering copper state.

[0021] Figure 4 It is overhead structure schematic diagram of the utility model strip substrate.

[0022] The sign is: 1, ceramic substrate, 2, first sputtering copper layer, 3, second sputtering copper layer, 4, conductive layer, 5, protection layer, 6, identification layer, 7, nickel plating layer, 8, tin plating layer, 9, back surface mask paste, 10, first score line, 11, second score line. DETAILED DESCRIPTION

[0023] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0024] As attached Figures 1-3 The chip resistor shown is based on copper sputtering technology and includes a ceramic substrate 1. A second sputtered copper layer 3 is disposed on the top of the ceramic substrate 1, and a first sputtered copper layer 2 is symmetrically disposed on both sides of the bottom of the ceramic substrate 1. The first sputtered copper layer 2 and the second sputtered copper layer 3 can serve as the conductive body of the chip resistor, providing a conduction path for current. Their good conductivity and stability are key to ensuring the electrical performance of the chip resistor. A protective layer 5 is disposed at the top center of the second sputtered copper layer 3, and an identification layer 6 is disposed on the top of the protective layer 5. The ceramic substrate 1 provides a stable support platform for other functional layers, ensuring the structural stability and electrical insulation of the chip resistor under various environmental conditions. The protective layer 5 is made of materials with excellent insulation, wear resistance and chemical stability, such as epoxy resin or polyimide. Its function is to protect the second sputtered copper layer 3 from external environmental corrosion, prevent copper layer oxidation, and enhance the mechanical strength and insulation performance of the chip resistor. The identification layer 6 is printed with special ink that is resistant to high temperature and wear, containing important information such as resistance value, model, and production batch, which facilitates product identification, traceability and quality control.

[0025] A conductive layer 4 is symmetrically disposed on both sides of the ceramic substrate 1. A nickel plating layer 7 is disposed on one side of the conductive layer 4, the first sputtered copper layer 2, and both ends of the second sputtered copper layer 3. A tin plating layer 8 is disposed on the outside of the nickel plating layer 7. The conductive layer 4 can effectively reduce the contact resistance, ensure smooth current transmission, and improve the reliability of the chip resistor during the soldering process. The nickel plating layer 7 can effectively protect the internal copper layer from oxidation due to the good corrosion resistance and solderability of the nickel layer. At the same time, it provides a good adhesion base for the tin plating layer 8. The tin plating layer 8 has a low melting point and good wettability, which facilitates the soldering of the chip resistor to the circuit board during the assembly of electronic products, improving the soldering quality and reliability.

[0026] As attached Figures 1-4As shown, the first sputtered copper layer 2 and the second sputtered copper layer 3 are both plated on the upper and lower sides of the ceramic substrate 1 by vacuum sputtering. The vacuum sputtering process can make copper atoms uniformly and densely deposit on the surface of the ceramic substrate in a high vacuum environment through ion bombardment, forming a copper layer with uniform thickness and strong adhesion. The protective layer 5 is fixed at the top center position of the second sputtered copper layer 3 by drying after printing. The identification layer 6 is fixed on the protective layer 5 by sintering after printing. The second sputtered copper layer 3 is protected by the protective layer 5 from the erosion of the external environment, preventing the copper layer from oxidizing, while enhancing the mechanical strength and insulation performance of the chip resistor. The identification layer 6 facilitates product identification, traceability, and quality control. The two ends of the conductive layer 4 are located on one side of the second sputtered copper layer 3 and the first sputtered copper layer 2. The conductive layer 4 is sputtered on both sides of the ceramic substrate 1 by a vacuum sputtering machine. The conductive layer 4 formed by the vacuum sputtering process is tightly combined with the sputtered copper layer, which can effectively reduce the contact resistance. The nickel plating layer 7 is sputtered on the top of the two ends of the second sputtered copper layer 3, one side of the conductive layer 4, and the bottom of the first sputtered copper layer 2 by roll plating. The tin plating layer 8 is sputtered on the outside of the nickel plating layer 7 by roll plating. The nickel plating layer 7 can effectively protect the internal copper layer from oxidation. The tin plating layer 8 facilitates the soldering of the chip resistor with the circuit board, improving the soldering quality and reliability. The ceramic substrate 1 is printed with a back mask paste 9 at the bottom center position of the ceramic substrate 1 when sputtering the first sputtered copper layer 2. The ceramic substrate 1 is cleaned by ultrasonic cleaning agent to remove the back mask paste 9 and the first sputtered copper layer 2 attached to one side of the back mask paste 9 before printing the protective layer 5. The setting of the back mask paste 9 can effectively protect the area of the ceramic substrate 1 back that does not need to be plated with copper in subsequent processes, avoiding the deposition of copper layer in this area during vacuum sputtering, laying the foundation for the formation of specific conductive structures. The high-frequency vibration and cavitation effect generated by ultrasonic waves quickly and efficiently dissolve the mask paste and strip the unwanted copper layer, ensuring that the surface of the cleaned ceramic substrate 1 is clean and that the second sputtered copper layer 3 and the ceramic substrate 1 body on the front are not damaged, ensuring the smooth progress of subsequent processes. The ceramic substrate 1 is provided with a first score line 10 and a second score line 11 in the longitudinal and transverse directions, respectively. The ceramic substrate 1 is broken into strips by the first score line 10 before sputtering the conductive layer 4. The ceramic substrate 1 is broken into multiple individual finished product sizes by the second score line 11 before sputtering the nickel plating layer 7. Before sputtering the conductive layer 4, the ceramic substrate 1 is broken into strips by the first score line 10, facilitating subsequent side sputtering and processing. Before sputtering the nickel plating layer 7, the ceramic substrate 1 is broken into multiple individual finished product sizes by the second score line 11, forming independent chip resistor semi-finished products, improving production efficiency and product consistency.

[0027] The utility model discloses a work principle: when making, first print back mask paste 9 in the middle part of one side of ceramic substrate 1, then vacuum sputtering first sputtering copper layer 2 and second sputtering copper layer 3 on both sides of ceramic substrate 1, then clean and remove back mask paste 9 and first sputtering copper layer 2 on the side of back mask paste 9 through ultrasonic cleaning agent,

[0028] Then print protection layer 5 in the middle part of one side of second sputtering copper layer 3 and through dry fixing, then print identification layer 6 on the surface of protection layer 5 and carry out sintering fixing, then break ceramic substrate 1 into multiple strip-shaped substrates through first score line 10, then stack in fixture, sputter conductive layer 4 on both sides of strip-shaped substrate,

[0029] Then break strip-shaped substrate into independent OR resistance semi-finished product through second score line 11, then form nickel plating layer 7 through electroplating, again form tin plating layer 8 through electroplating, complete the making of OR resistance finished product, more suitable for batch production, and the film layer structure formed by sputtering is compact, uniformity is good, quality performance is relatively stable, and reduces manufacturing cost, improves production efficiency.

[0030] The above only is preferred embodiment of the utility model and does not use for limiting the utility model, and any modification, equivalent replacement, improvement etc. that are made in the spirit and principle of the utility model should include in the protection scope of the utility model.

Claims

1. Chip resistor based on sputtered copper process, comprising a ceramic substrate (1), characterized in that: The top of the ceramic substrate (1) is provided with a second sputtered copper layer (3), the bottom of the ceramic substrate (1) is symmetrically provided with a first sputtered copper layer (2), the top of the second sputtered copper layer (3) is provided with a protective layer (5), and the top of the protective layer (5) is provided with an identification layer (6). The two sides of the ceramic substrate (1) are symmetrically provided with a conductive layer (4), one side of the first sputtered copper layer (2) and both ends of the second sputtered copper layer (3) are provided with a nickel plating layer (7), and the outside of the nickel plating layer (7) is provided with a tin plating layer (8).

2. The chip resistor based on sputtered copper process according to claim 1, wherein: The first sputtered copper layer (2) and the second sputtered copper layer (3) are plated on the upper and lower sides of the ceramic substrate (1) by vacuum sputtering.

3. The sputtered copper process based chip resistor of claim 1, wherein: The protective layer (5) is fixed on the top of the second sputtered copper layer (3) by drying after printing, and the identification layer (6) is fixed on the protective layer (5) by sintering after printing.

4. The sputtered copper process based chip resistor of claim 1, wherein: The two ends of the conductive layer (4) are located on one side of the first sputtered copper layer (2) and the second sputtered copper layer (3), and the conductive layer (4) is sputtered on both sides of the ceramic substrate (1) by a vacuum sputtering machine.

5. The sputtered copper process based chip resistor of claim 1, wherein: The nickel plating layer (7) is sputtered on the top of both ends of the second sputtered copper layer (3), one side of the conductive layer (4), and the bottom of the first sputtered copper layer (2) by barrel plating, and the tin plating layer (8) is sputtered on the outside of the nickel plating layer (7) by barrel plating.

6. The sputtered copper process based chip resistor of claim 1, wherein: When sputtering the first sputtered copper layer (2), the ceramic substrate (1) is printed with a back mask paste (9) at the middle position of the bottom of the ceramic substrate (1), and the back mask paste (9) and the first sputtered copper layer (2) attached to one side of the back mask paste (9) are removed by ultrasonic cleaning agent before printing the protective layer (5), and the back mask paste (9) is made of water-soluble material.

7. The sputtered copper process based chip resistor of claim 1, wherein: The ceramic substrate (1) is provided with a first score line (10) and a second score line (11) in the longitudinal and transverse directions respectively, the ceramic substrate (1) is broken into strips by the first score line (10) before sputtering the conductive layer (4), and the ceramic substrate (1) is broken into multiple individual finished product sizes by the second score line (11) before sputtering the nickel plating layer (7).

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