Peak value detection circuit and ultrasonic instrument
By designing a peak detection circuit, including a first amplification module, a first switching module, and a charging and discharging module, the problem of amplitude attenuation caused by transducer aging in ultrasonic metering devices is solved, realizing simple peak detection and improving the accuracy and ease of detection.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- ZHEJIANG WEIXING INTELLIGENT METER STOCK
- Filing Date
- 2025-03-31
- Publication Date
- 2026-04-17
AI Technical Summary
In existing ultrasonic metering devices, transducer aging leads to amplitude attenuation, affecting measurement accuracy and repeatability, and the detection method is complex to operate.
A peak detection circuit was designed, including a first amplification module, a first switching module, and a charging and discharging module. By controlling the threshold voltage of the control signal to turn on or off, the peak value of the signal to be detected is realized, simplifying the detection process.
It enables intuitive and simple detection of amplitude changes, solves the problem of complex operation in existing detection methods, and improves the intuitiveness and simplicity of detection.
Smart Images

Figure CN224136694U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of electronic circuit technology, and in particular to a peak detection circuit and an ultrasonic instrument. Background Technology
[0002] In the field of ultrasonic water meter applications, as ultrasonic metering continues to operate, the transducer, a component of the meter, gradually ages, causing the amplitude emitted by the transducer to gradually decrease. This will lead to problems with the accuracy and repeatability of ultrasonic metering.
[0003] To prevent amplitude decay due to aging of the transducer over a long period of operation, testing devices such as oscilloscopes are generally used to detect the amplitude signal output by the transducer. However, the existing detection methods are relatively complicated to operate. Utility Model Content
[0004] This invention provides a peak detection circuit and an ultrasonic instrument to solve the problem of complex operation in existing detection methods.
[0005] According to one aspect of the present invention, a peak detection circuit is provided, comprising a first amplification module, a first switching module, and a charging / discharging module;
[0006] The non-inverting input terminal of the first amplification module is connected to the signal to be detected, the inverting input terminal of the first amplification module is connected to the output terminal of the first switching module, and the output terminal of the first amplification module is connected to the control terminal of the first switching module; the first switching module is used to turn on when the control signal is greater than the threshold voltage and turn off when the control signal is less than or equal to the threshold voltage.
[0007] The input terminal of the first switch module is connected to a first power signal, and the output terminal of the first switch module is connected to the output terminal of the peak detection circuit and the charging and discharging module. The charging and discharging module is used to charge when the first switch module is turned on and to discharge when the first switch module is turned off.
[0008] Optionally, the charging and discharging module includes a charge storage unit and a discharge regulation unit; the first end of the charge storage unit is connected to the output end of the first switching module, and the charge storage unit is used to charge when the first switching module is turned on and to discharge when the first switching module is turned off; the discharge regulation unit is connected in parallel with the charge storage unit, and the discharge regulation unit is used to adjust the discharge parameters of the charge storage unit.
[0009] Optionally, the charge storage unit includes a first capacitor, with a first terminal of the first capacitor serving as the first terminal of the charge storage unit and a second terminal of the first capacitor serving as the second terminal of the charge storage unit; the discharge regulation unit includes a first resistor, which is connected in parallel with the first capacitor.
[0010] Optionally, the peak detection circuit further includes a second amplification module, wherein the non-inverting input terminal of the second amplification module is connected to the charging and discharging module, the inverting input terminal of the second amplification module is connected to the output terminal of the second amplification module, and the output terminal of the second amplification module is connected to the output terminal of the peak detection circuit.
[0011] Optionally, the first amplification module includes a first operational amplifier, the non-inverting input of the first operational amplifier being connected to the non-inverting input of the first amplification module, the inverting input of the first operational amplifier being connected to the inverting input of the first amplification module, and the output of the first operational amplifier being connected to the output of the first amplification module; the second amplification module includes a second operational amplifier, the non-inverting input of the second operational amplifier being connected to the non-inverting input of the second amplification module, the inverting input of the second operational amplifier being connected to the inverting input of the second amplification module, and the output of the second operational amplifier being connected to the output of the second amplification module.
[0012] Optionally, the peak detection circuit further includes an operational amplifier chip, wherein the first operational amplifier and the second operational amplifier are integrated on the operational amplifier chip, and the operational amplifier chip further includes an enable pin.
[0013] Optionally, the first switching module includes a first transistor, a second resistor, and a third resistor. The first end of the second resistor is connected to the output terminal of the first amplification module, the second end of the second resistor is connected to the control terminal of the first transistor, the first end of the first transistor is connected to the inverting input terminal of the first amplification module, the second end of the first transistor is connected to the first end of the third resistor, and the second end of the third resistor is connected to the input terminal of the first switching module.
[0014] Optionally, the detection circuit further includes a second switch module and a processor. The first terminal of the second switch module is connected to the first terminal of the charge-discharge module, the second terminal of the second switch module is connected to the second terminal of the charge-discharge module, and the control terminal of the second switch module is connected to the processor. The processor is also connected to the output terminal of the peak detection circuit.
[0015] Optionally, the second switching module includes a second transistor and a fourth resistor. The first terminal of the second transistor is connected to the first terminal of the first capacitor, the second terminal of the second transistor is connected to the second terminal of the first capacitor, the control terminal of the second transistor is connected to the first terminal of the fourth resistor, and the second terminal of the fourth resistor is connected to the processor.
[0016] According to another aspect of the present invention, an ultrasonic instrument is provided, including a transducer and a peak detection circuit, wherein the peak detection circuit is connected to the transducer, the transducer is used to output the signal to be detected, and the peak detection circuit is used to detect the signal to be detected.
[0017] The technical solution of this utility model embodiment includes a peak detection circuit comprising a first amplification module, a first switching module, and a charging / discharging module. The non-inverting input terminal of the first amplification module is connected to the signal to be detected, the inverting input terminal of the first amplification module is connected to the output terminal of the first switching module, and the output terminal of the first amplification module is connected to the control terminal of the first switching module. The first switching module is used to turn on when the control signal is greater than a threshold voltage and to turn off when the control signal is less than or equal to the threshold voltage. The input terminal of the first switching module is connected to a first power supply signal, and the output terminal of the first switching module is connected to the output terminal of the peak detection circuit and the charging / discharging module. The charging / discharging module is used to charge when the first switching module is on and to discharge when the first switching module is off. The peak detection circuit provided by this utility model can detect amplitude changes through peak value changes, has the advantages of being intuitive and simple, and solves the problem of complex operation in existing detection methods.
[0018] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of this utility model, nor is it intended to limit the scope of this utility model. Other features of this utility model will become readily apparent from the following description. Attached Figure Description
[0019] To more clearly illustrate the technical solutions in the embodiments of this utility model, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0020] Figure 1 This is a schematic diagram of a peak detection circuit provided in an embodiment of the present invention;
[0021] Figure 2 This is a circuit diagram of a peak detection circuit provided in an embodiment of the present invention;
[0022] Figure 3 This is a circuit diagram of another peak detection circuit provided in an embodiment of the present invention;
[0023] Figure 4 This is a schematic diagram of the structure of an ultrasonic instrument provided in an embodiment of the present invention. Detailed Implementation
[0024] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the protection scope of the present invention.
[0025] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this utility model are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the utility model described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.
[0026] This utility model embodiment provides a peak detection circuit. Figure 1 This is a schematic diagram of a peak detection circuit provided in an embodiment of the present invention, as shown below. Figure 1 As shown, the peak detection circuit 100 includes a first amplification module 110, a first switching module 120, and a charge / discharge module 130. The non-inverting input terminal of the first amplification module 110 is connected to the signal to be detected, a, and the inverting input terminal of the first amplification module 110 is connected to the output terminal of the first switching module 120. The output terminal of the first amplification module 110 is connected to the control terminal of the first switching module 120. The first switching module 120 is used to turn on when the control signal is greater than the threshold voltage and to turn off when the control signal is less than or equal to the threshold voltage. The input terminal of the first switching module 120 is connected to a first power supply signal V1. The output terminal of the first switching module 120 is connected to the output terminal OUT of the peak detection circuit 100 and the charge / discharge module 130. The charge / discharge module 130 is used to charge when the first switching module 120 is turned on and to discharge when the first switching module 120 is turned off.
[0027] In this embodiment of the invention, the peak detection circuit 100 is a circuit that extracts the peak value of the signal to be detected and detects the peak value. The first amplification module 110 is a module that amplifies the signal to be detected. The first switching module 120 is a module that controls the operating state of the charging and discharging module 130; for example, the first switching module 120 includes a switching element. The charging and discharging module 130 is a module that realizes charging or discharging based on the on or off state of the first switching module 120.
[0028] In this embodiment of the invention, the first amplification module 110 amplifies the input signal to be detected and outputs a control signal. The first switching module 120 is turned on when the control signal is greater than a threshold voltage and turned off when the control signal is less than or equal to the threshold voltage. The signal to be detected, 'a', is a sine wave signal, and the control signal is also a sine wave signal. The first switching module 120 periodically turns on and off. When the first switching module 120 is on, the charging / discharging module 130 charges; when the first switching module 120 is off, the charging / discharging module 130 discharges. The output terminal OUT of the peak detection circuit 100 outputs the peak value of the signal to be detected based on the superposition of the voltage at the inverting input terminal of the first amplification module 110 and the discharge voltage of the charging / discharging module 130.
[0029] The technical solution of this utility model embodiment includes a peak detection circuit comprising a first amplification module, a first switching module, and a charging / discharging module. The non-inverting input terminal of the first amplification module is connected to the signal to be detected, the inverting input terminal of the first amplification module is connected to the output terminal of the first switching module, and the output terminal of the first amplification module is connected to the control terminal of the first switching module. The first switching module is used to turn on when the control signal is greater than a threshold voltage and to turn off when the control signal is less than or equal to the threshold voltage. The input terminal of the first switching module is connected to a first power supply signal, and the output terminal of the first switching module is connected to the output terminal of the peak detection circuit and the charging / discharging module. The charging / discharging module is used to charge when the first switching module is on and to discharge when the first switching module is off. The peak detection circuit provided by this utility model can detect amplitude changes through peak value changes, has the advantages of being intuitive and simple, and solves the problem of complex operation in existing detection methods.
[0030] Figure 2 This is a circuit diagram of a peak detection circuit provided in an embodiment of the present invention, as shown below. Figure 2 As shown, the charge / discharge module 130 includes a charge storage unit 131 and a discharge regulation unit 132. The first end of the charge storage unit 131 is connected to the output end of the first switch module 120. The charge storage unit 131 is used to charge when the first switch module 120 is turned on and to discharge when the first switch module 120 is turned off. The discharge regulation unit 132 is connected in parallel with the charge storage unit 131 and is used to adjust the discharge parameters of the charge storage unit 131.
[0031] In this embodiment of the invention, the charge storage unit 131 is a unit for storing charge, including electronic components for storing charge, such as capacitors. The discharge adjustment unit 132 is a unit for adjusting the discharge process of the charge storage unit 131; for example, the discharge adjustment unit 132 can adjust the discharge duration of the charge storage unit 131. Referring to the above embodiment, when the first switch module 120 is turned on, the charge storage unit 131 stores charge; when the first switch module 120 is turned off, the charge storage unit 131 discharges. The discharge duration of the charge storage unit 131 is adjusted by the discharge adjustment unit 132. For example, when the discharge adjustment unit extends the discharge duration of the charge storage unit 131, the holding time of the peak value of the signal to be detected output by the peak detection circuit 100 output terminal OUT increases.
[0032] Specifically, the charge storage unit 131 includes a first capacitor C1, with the first end of the first capacitor C1 serving as the first end of the charge storage unit 131 and the second end of the first capacitor C1 serving as the second end of the charge storage unit 131; the discharge regulation unit 132 includes a first resistor R1, which is connected in parallel with the first capacitor C1.
[0033] In this embodiment of the invention, the first capacitor C1 can be a variable capacitor, and the first resistor R1 can be a variable resistor. Referring to the above embodiment, when the first switch module 120 is turned on, the first capacitor C1 stores charge; when the first switch module 120 is turned off, the first capacitor C1 discharges. By adjusting the capacitance value of the first capacitor C1 and the resistance value of the first resistor R1, the discharge duration of the first capacitor C1 can be adjusted. For example, by increasing the resistance value of the first resistor R1, the discharge process of the first capacitor C1 is prevented, and the discharge duration of the first capacitor C1 is increased, thereby increasing the holding time of the peak value of the signal to be detected output by the peak detection circuit 100 at the output terminal OUT.
[0034] Continue to refer to Figure 2 The peak detection circuit also includes a second amplification module 210. The non-inverting input terminal of the second amplification module 210 is connected to the charge / discharge module 130 through the ninth resistor R9. The inverting input terminal of the second amplification module 210 is connected to the output terminal of the second amplification module 210. The output terminal of the second amplification module 210 is connected to the output terminal of the peak detection circuit through the eighth resistor R8.
[0035] In this embodiment of the invention, the second amplification module 210 is connected between the output terminal of the first switching module 120 and the output terminal of the peak detection circuit to amplify the signal at the output terminal of the first switching module 120. When the amplification factor of the second amplification module 210 is 1, the second amplification module 210 acts as a buffer, providing isolation and improving the stability of the output peak signal.
[0036] Based on the above embodiments, the first amplification module 110 includes a first operational amplifier U1, the non-inverting input terminal IN1+ of the first operational amplifier U1 is connected to the non-inverting input terminal of the first amplification module 110, the inverting input terminal IN1- of the first operational amplifier U1 is connected to the inverting input terminal of the first amplification module 110, and the output terminal OUT1 of the first operational amplifier U1 is connected to the output terminal of the first amplification module 110; the second amplification module 210 includes a second operational amplifier U2, the non-inverting input terminal IN2+ of the second operational amplifier U2 is connected to the non-inverting input terminal of the second amplification module 210, the inverting input terminal IN2- of the second operational amplifier U2 is connected to the inverting input terminal of the second amplification module 210, and the output terminal OUT2 of the second operational amplifier U2 is connected to the output terminal of the second amplification module 210.
[0037] In this embodiment of the invention, the non-inverting input terminal IN1+ of the first operational amplifier U1 receives the signal to be detected, and the output terminal OUT1 of the first operational amplifier U1 outputs a control signal. The first switching module 120 periodically turns on and off according to the control signal. When the first switching module 120 is on, the first power signal V1 charges the charging / discharging module 130 through the first switching module 120. When the first switching module 120 is off, the charging / discharging module 130 discharges. Since the charging / discharging module 130 is connected to the output terminal of the first switching module 120, the output terminal of the peak detection circuit, and the inverting input terminal IN1- of the first operational amplifier U1, according to the "virtual short" characteristic of the first operational amplifier U1, the electrical signals of the inverting input terminal IN1- of the first operational amplifier U1 and the non-inverting input terminal IN1+ of the first operational amplifier U1 are the same. That is, the inverting input terminal IN1- of the first operational amplifier U1 outputs the amplitude signal of the signal to be detected. The electrical signal of the charging / discharging module 130 during discharge is superimposed with the amplitude signal of the signal to be detected to obtain the peak signal of the amplitude of the signal to be detected. The second operational amplifier U2 acts as a buffer. After the peak signal is connected to the non-inverting input terminal IN2+ of the second operational amplifier U2, the peak signal is processed by isolation interference, voltage adjustment and other signal processing. The output terminal OUT2 of the second operational amplifier U2 outputs the processed peak signal.
[0038] Continue to refer to Figure 2 The peak detection circuit also includes an operational amplifier chip U, with the first operational amplifier U1 and the second operational amplifier U2 integrated on the operational amplifier chip U. The operational amplifier chip U also includes enable pins PD1 and PD2.
[0039] In this embodiment of the invention, the operational amplifier chip U is a low-power operational amplifier, such as the MS86235, which has the advantages of low power consumption and fast response, and also operates in a wide temperature range, making it less susceptible to external environmental influences. The operational amplifier chip U also includes pins VS- and VS+, where pin VS- is grounded, pin VS+ is connected to a first power supply signal, pin VS+ is connected to the first terminal of the second capacitor C2, and the second terminal of the second capacitor C2 is grounded. Enable pin PD1 serves as the enable pin for the first operational amplifier U1, and enable pin PD2 serves as the enable pin for the second operational amplifier U2. For example, when the enable signal EN received by enable pins PD1 and PD2 of the operational amplifier chip U is a high-level signal, the first operational amplifier U1 and the second operational amplifier U2 are turned on. When the enable signal EN received by enable pins PD1 and PD2 of the operational amplifier chip U is a low-level signal, the first operational amplifier U1 and the second operational amplifier U2 are turned off, and the peak detection circuit enters a low-power mode, meeting the low-power requirement.
[0040] Continue to refer to Figure 2 The first switching module 120 includes a first transistor Q1, a second resistor R2, and a third resistor R3. The first end of the second resistor R2 is connected to the output terminal of the first amplification module 110, the second end of the second resistor R2 is connected to the control terminal of the first transistor Q1, the first end of the first transistor Q1 is connected to the inverting input terminal of the first amplification module 110, the second end of the first transistor Q1 is connected to the first end of the third resistor R3, and the second end of the third resistor R3 is connected to the input terminal of the first switching module 120.
[0041] In this embodiment of the invention, the signal to be detected is divided by the fifth resistor R5 and the sixth resistor R6, and then input to the non-inverting input terminal of the first amplification module 110 through the current-limiting resistor R7. The output terminal of the first amplification module 110 outputs a control signal, which is transmitted to the control terminal of the first transistor Q1 through the second resistor R2. The first transistor Q1 periodically turns on and off according to the control signal. When the first transistor Q1 is on, the first power supply signal V1 charges the charging and discharging module 130 through the third resistor R3 and the first transistor Q1. When the first transistor Q1 is off, the charging and discharging module 130 discharges.
[0042] Figure 3 This is a circuit diagram of another peak detection circuit provided in an embodiment of the present invention, as shown below. Figure 3 As shown, the peak detection circuit also includes a second switch module 310 and a processor 320. The first end of the second switch module 310 is connected to the first end of the charge-discharge module 130, the second end of the second switch module 310 is connected to the second end of the charge-discharge module 130, and the control end of the second switch module 310 is connected to the processor 320. The processor 320 is also connected to the output end of the peak detection circuit.
[0043] In this embodiment of the invention, the second switch module 310 controls the discharge of the charging and discharging module 130, and the processor 320 is an electronic device that performs data processing such as data transmission, storage, and computation, and is capable of controlling the operation of the system. The processor 320 is connected to the output terminal of the peak detection circuit to detect the peak signal. The processor 320 controls the operational amplifier chip U to turn on or off by outputting an enable signal. Based on the above embodiment, when it is necessary to turn off the peak detection circuit, the processor 320 can output a high-level signal, which is transmitted to the control terminal of the second switch module 310, and the second switch module 310 controls the charging and discharging module 130 to achieve rapid discharge.
[0044] Specifically, the second switch module 310 includes a second transistor Q2 and a fourth resistor R4. The first terminal of the second transistor Q2 is connected to the first terminal of the first capacitor C1, the second terminal of the second transistor Q2 is connected to the second terminal of the first capacitor C1, the control terminal of the second transistor Q2 is connected to the first terminal of the fourth resistor R4, and the second terminal of the fourth resistor R4 is connected to the processor 320.
[0045] In this embodiment of the present invention, when the second switch module 310 is turned on, the second transistor Q2 is turned on, and the second transistor Q2 short-circuits the first capacitor C1 and the first resistor R1 connected in parallel. The first capacitor C1 is rapidly discharged through the second transistor Q2, which meets the low power consumption requirement when the peak detection circuit is turned off.
[0046] In this embodiment of the invention, the non-inverting input terminal of the first amplification module 110 receives the signal to be detected, and the output terminal of the first amplification module 110 outputs a control signal. The first switching module 120 periodically turns on and off according to the control signal. When the first switching module 120 is on, the first capacitor C1 stores charge; when the first switching module 120 is off, the first capacitor C1 discharges. By adjusting the capacitance value of the first capacitor C1 and the resistance value of the first resistor R1, the discharge duration of the first capacitor C1 can be adjusted. The electrical signal during the discharge of the first capacitor C1 is superimposed with the amplitude signal of the signal to be detected to obtain the peak signal of the amplitude of the signal to be detected. For example, by increasing the resistance value of the first resistor R1, the discharge process of the first capacitor C1 is prevented, and the discharge duration of the first capacitor C1 is increased. The second amplification module 210 acts as a buffer. Because the holding time of the input peak signal increases, the holding time of the peak signal finally output by the peak detection circuit increases. By adjusting the holding time of the peak signal, processors with different sampling frequencies can be matched. Simultaneously, the processor sends enable signals at regular intervals, causing the first and second amplification modules to turn on periodically, enabling timed detection of the signal to be detected. The aforementioned peak detection circuit is applicable to various circuits that detect amplitude.
[0047] This utility model embodiment also provides an ultrasonic instrument. Figure 4 This is a schematic diagram of the structure of an ultrasonic instrument provided in an embodiment of the present invention, as shown below. Figure 4 As shown, the ultrasonic instrument 10 includes a transducer 410 and a peak detection circuit 100 as described in any of the above embodiments. The peak detection circuit 100 is connected to the transducer 410. The transducer 410 is used to output a signal to be detected, and the peak detection circuit 100 is used to detect the signal to be detected. For example, the peak detection circuit 100 detects whether the signal to be detected output by the transducer 410 is attenuated. The ultrasonic instrument provided by this embodiment has the beneficial effects of the peak detection circuit provided in any of the above embodiments, which will not be elaborated further here.
[0048] It should be understood that the various forms of the process shown above can be used to rearrange, add, or delete steps. For example, the steps described in this utility model can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this utility model can be achieved, and this is not limited herein.
[0049] The specific embodiments described above do not constitute a limitation on the scope of protection of this utility model. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this utility model should be included within the scope of protection of this utility model.
Claims
1. A peak detection circuit, characterized by, It includes a first amplification module, a first switching module, and a charging / discharging module; The non-inverting input terminal of the first amplification module is connected to the signal to be detected, the inverting input terminal of the first amplification module is connected to the output terminal of the first switching module, and the output terminal of the first amplification module is connected to the control terminal of the first switching module; the first switching module is used to turn on when the control signal is greater than the threshold voltage and turn off when the control signal is less than or equal to the threshold voltage. The input terminal of the first switch module is connected to a first power signal, and the output terminal of the first switch module is connected to the output terminal of the peak detection circuit and the charging and discharging module. The charging and discharging module is used to charge when the first switch module is turned on and to discharge when the first switch module is turned off.
2. The peak detection circuit of claim 1, wherein, The charging and discharging module includes a charge storage unit and a discharge regulation unit; the first end of the charge storage unit is connected to the output end of the first switching module, and the charge storage unit is used to charge when the first switching module is turned on and to discharge when the first switching module is turned off; the discharge regulation unit is connected in parallel with the charge storage unit, and the discharge regulation unit is used to adjust the discharge parameters of the charge storage unit.
3. The peak detection circuit of claim 2, wherein, The charge storage unit includes a first capacitor, with a first terminal of the first capacitor serving as the first terminal of the charge storage unit and a second terminal of the first capacitor serving as the second terminal of the charge storage unit. The discharge regulation unit includes a first resistor, which is connected in parallel with the first capacitor.
4. The peak detection circuit of claim 1, wherein, The peak detection circuit further includes a second amplification module. The non-inverting input terminal of the second amplification module is connected to the charging and discharging module, the inverting input terminal of the second amplification module is connected to the output terminal of the second amplification module, and the output terminal of the second amplification module is connected to the output terminal of the peak detection circuit.
5. The peak detection circuit according to claim 4, characterized in that, The first amplification module includes a first operational amplifier, the non-inverting input terminal of the first operational amplifier is connected to the non-inverting input terminal of the first amplification module, the inverting input terminal of the first operational amplifier is connected to the inverting input terminal of the first amplification module, and the output terminal of the first operational amplifier is connected to the output terminal of the first amplification module. The second amplification module includes a second operational amplifier, the non-inverting input of the second operational amplifier is connected to the non-inverting input of the second amplification module, the inverting input of the second operational amplifier is connected to the inverting input of the second amplification module, and the output of the second operational amplifier is connected to the output of the second amplification module.
6. The peak detection circuit of claim 5, wherein, The peak detection circuit also includes an operational amplifier chip, on which the first operational amplifier and the second operational amplifier are integrated. The operational amplifier chip also includes an enable pin.
7. The peak detection circuit of claim 1, wherein, The first switching module includes a first transistor, a second resistor, and a third resistor. The first end of the second resistor is connected to the output terminal of the first amplification module, the second end of the second resistor is connected to the control terminal of the first transistor, the first end of the first transistor is connected to the inverting input terminal of the first amplification module, the second end of the first transistor is connected to the first end of the third resistor, and the second end of the third resistor is connected to the input terminal of the first switching module.
8. The peak detection circuit of claim 3, wherein, The detection circuit further includes a second switch module and a processor. The first end of the second switch module is connected to the first end of the charge-discharge module, the second end of the second switch module is connected to the second end of the charge-discharge module, and the control end of the second switch module is connected to the processor. The processor is also connected to the output end of the peak detection circuit.
9. The peak detection circuit of claim 8, wherein, The second switching module includes a second transistor and a fourth resistor. The first terminal of the second transistor is connected to the first terminal of the first capacitor, the second terminal of the second transistor is connected to the second terminal of the first capacitor, the control terminal of the second transistor is connected to the first terminal of the fourth resistor, and the second terminal of the fourth resistor is connected to the processor.
10. An ultrasonic meter comprising a transducer and the peak detection circuit of any one of claims 1-9, characterized in that, The peak detection circuit is connected to the transducer, the transducer is used to output the signal to be detected, and the peak detection circuit is used to detect the signal to be detected.