Pixel circuit and display panel

Abstract

The embodiment of the utility model provides a pixel circuit and a display panel, relates to the technical field of display, and is used for improving the brightness uniformity of a light-emitting device. The pixel circuit comprises a driving sub-circuit and a storage sub-circuit. The driving sub-circuit comprises a first transistor, and the first transistor is a double-gate transistor. The first electrode of the first transistor is electrically connected with a first voltage end, the second electrode is electrically connected with the first electrode of the light-emitting device, and the first control electrode is electrically connected with a first light-emitting control signal end. The storage sub-circuit is electrically connected with the second control electrode and the first voltage end. The common connection end of the storage sub-circuit and the second control electrode of the first transistor is a first node. Under the condition that the target gray scale of the light-emitting device is smaller than or equal to a gray scale threshold value, the first transistor is switched between an on state and an off state under the control of a first light-emitting control signal provided by a first light-emitting control signal end and the potential of the first node. Comprising the pixel circuit is used for displaying images.

Description

Technical Field

[0001] This disclosure relates to the field of display technology, and more particularly to a pixel circuit and a display panel. Background Technology

[0002] With the continuous development of display technology, display devices have gradually become ubiquitous in people's lives. Among them, micro light-emitting diode (Micro LED) display panels and mini light-emitting diode (Mini LED) display panels are widely used in display devices such as mobile phones, televisions, and laptops due to their advantages such as high contrast and wide color gamut. Utility Model Content

[0003] The purpose of the embodiments of this disclosure is to provide a pixel circuit and a display panel for improving the brightness uniformity of light-emitting devices.

[0004] To achieve the above objectives, the embodiments of this disclosure provide the following technical solutions:

[0005] On one hand, a pixel circuit is provided. The pixel circuit includes a driving sub-circuit and a storage sub-circuit. The driving sub-circuit includes a first transistor, which is a dual-gate transistor. The first terminal of the first transistor is electrically connected to a first voltage terminal, the second terminal of the first transistor is electrically connected to the first terminal of a light-emitting device, and the first control terminal of the first transistor is electrically connected to a first light-emitting control signal terminal. The storage sub-circuit is electrically connected to the second control terminal and the first voltage terminal of the first transistor, respectively. The common terminal of the storage sub-circuit and the second control terminal of the first transistor is a first node. Wherein, when the target grayscale of the light-emitting device is less than or equal to a grayscale threshold, the first transistor switches between an on state and an off state under the control of the first light-emitting control signal provided by the first light-emitting control signal terminal and the potential of the first node.

[0006] In the aforementioned pixel circuit, when the target grayscale of the light-emitting device within the sub-pixel is less than or equal to the grayscale threshold, the first transistor within the driving sub-circuit can switch between an on and off state under the control of the first light-emitting control signal provided by the first light-emitting control signal terminal and the potential of the first node. In other words, when the target grayscale of the light-emitting device is small, the first transistor can switch between an on and off state under the control of the first light-emitting control signal provided by the first light-emitting control signal terminal and the potential of the first node. Since the first electrode of the first transistor is electrically connected to the first voltage terminal, and the second electrode of the first transistor is electrically connected to the first electrode of the light-emitting device, when the first transistor is in the on state, the current path between the first voltage terminal and the light-emitting device can be conducted, thereby enabling the light-emitting device to emit light. When the first transistor is in the off state, the current path between the first voltage terminal and the light-emitting device can be turned off, thereby enabling the light-emitting device to not emit light. Furthermore, since the first transistor switches between an on state and an off state under the control of the first light-emitting control signal provided at the first light-emitting control signal terminal and the potential of the first node, the light-emitting device switches between a light-emitting state and a non-light-emitting state. This allows the light-emitting duration of the light-emitting device to be adjusted, so that when the target gray level of the light-emitting device is small, a current with a higher current density can be used to drive the light-emitting device to emit light. This solves the problem of poor brightness uniformity of the light-emitting device under low current density, which is beneficial to improving the brightness uniformity of the light-emitting device. In turn, it is beneficial to improve the driving effect of the pixel circuit, thereby improving the display effect of the display panel including the above-mentioned pixel circuit.

[0007] In some embodiments, the duty cycle of the first light emission control signal is greater than or equal to 2% and less than or equal to 20%.

[0008] In some embodiments, when the target gray level of the light-emitting device is greater than the gray level threshold, during the light-emitting stage, the first transistor is continuously turned on under the control of the first light-emitting control signal provided at the first light-emitting control signal terminal and the potential of the first node.

[0009] In some embodiments, when the target grayscale of the light-emitting device is greater than a grayscale threshold, during the light-emitting phase, the current flowing through the first transistor switches between a first current and a second current. The value of the first current is greater than the value of the second current.

[0010] In some embodiments, the pixel circuit further includes a gating control sub-circuit. The gating control sub-circuit is electrically connected to the first control electrode of the first transistor, the first light-emitting control signal terminal, and the first data signal terminal, respectively. When the target grayscale of the light-emitting device is less than or equal to a grayscale threshold, the gating control sub-circuit, under the control of the first data signal provided by the first data signal terminal, conducts the current path between the first transistor and the first light-emitting control signal terminal.

[0011] In some embodiments, when the target gray level of the light-emitting device is greater than the gray level threshold, the gating control sub-circuit, under the control of the first data signal provided by the first data signal terminal, shuts off the current path between the first transistor and the first light-emitting control signal terminal.

[0012] In some embodiments, the gating control subcircuit includes a data writing unit and a switch control unit. The data writing unit is electrically connected to a first data signal terminal, a first scan signal terminal, and a gating control terminal, respectively. The switch control unit is electrically connected to a first control electrode of a first transistor, a first light emission control signal terminal, and a gating control terminal, respectively. Wherein, when the target grayscale of the light-emitting device is less than or equal to a grayscale threshold, the data writing unit, under the control of a first scan signal provided by the first scan signal terminal, writes the first data signal provided by the first data signal terminal to the gating control terminal. Under the control of the potential of the gating control terminal, the switch control unit conducts the current path between the first light emission control signal terminal and the first transistor.

[0013] In some embodiments, during the light-emitting stage, when the target grayscale of the light-emitting device is greater than a grayscale threshold, the data writing unit, under the control of the first scan signal provided by the first scan signal terminal, writes the first data signal provided by the first data signal terminal into the gating control terminal. The switch control unit, under the control of the potential of the gating control terminal, shuts off the current path between the first light-emitting control signal terminal and the first transistor.

[0014] In some embodiments, the data writing unit includes a second transistor. The control electrode of the second transistor is electrically connected to the first scan signal terminal, the first electrode of the second transistor is electrically connected to the first data signal terminal, and the second electrode of the second transistor is electrically connected to the gating control terminal.

[0015] In some embodiments, the switch control unit includes a third transistor. The control electrode of the third transistor is electrically connected to the gating control terminal, the first electrode of the third transistor is electrically connected to the first light-emitting control signal terminal, and the second electrode of the third transistor is electrically connected to the first control electrode of the first transistor.

[0016] In some embodiments, the gating control subcircuit further includes a storage unit. The storage unit is electrically connected to both the gating control terminal and the third voltage terminal. The storage unit is used to maintain the potential of the gating control terminal.

[0017] In some embodiments, the storage unit includes a first capacitor. A first plate of the first capacitor is electrically connected to a third voltage terminal, and a second plate of the first capacitor is electrically connected to a gating control terminal.

[0018] In some embodiments, the grayscale threshold is greater than or equal to 10 and less than or equal to 80.

[0019] On the other hand, a display panel is provided. The display panel includes a plurality of sub-pixels. Each sub-pixel includes a pixel circuit and a light-emitting device as described in any of the above embodiments, wherein the pixel circuit and the light-emitting device are electrically connected.

[0020] The above-described display panel has the same structure and beneficial technical effects as the pixel circuits provided in some of the above embodiments, and will not be described again here. Attached Figure Description

[0021] To more clearly illustrate the technical solutions in this disclosure, the accompanying drawings used in some embodiments of this disclosure will be briefly described below. Obviously, the drawings described below are only drawings of some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings. In addition, the drawings described below can be regarded as schematic diagrams and are not intended to limit the actual size of the product, the actual flow of the method, the actual timing of the signals, etc. involved in the embodiments of this disclosure.

[0022] Figure 1 This is a structural diagram of a display device according to some embodiments;

[0023] Figure 2 A plan view of a display panel according to some embodiments;

[0024] Figure 3 Equivalent circuit of pixel circuit within a sub-pixel according to some embodiments Figure 1 ;

[0025] Figure 4 Equivalent circuit of pixel circuit within a sub-pixel according to some embodiments Figure 2 ;

[0026] Figure 5 Driving timing of pixel circuits within sub-pixels according to some embodiments Figure 1 ;

[0027] Figure 6 A graph showing the relationship between the threshold voltage of the first transistor in the driver sub-circuit and the voltage applied to the first control electrode of the first transistor according to some embodiments;

[0028] Figure 7 A transfer characteristic curve of the first transistor in the driver sub-circuit according to some embodiments;

[0029] Figure 8 Equivalent circuit of pixel circuit within a sub-pixel according to some embodiments Figure 3 ;

[0030] Figure 9 Equivalent circuit of pixel circuit within a sub-pixel according to some embodiments Figure 4 ;

[0031] Figure 10 Driving timing of pixel circuits within sub-pixels according to some embodiments Figure 2 ;

[0032] Figure 11 Equivalent circuit of pixel circuit within a sub-pixel according to some embodiments Figure 5 ;

[0033] Figure 12 Equivalent circuit of pixel circuit within a sub-pixel according to some embodiments Figure 6 ;

[0034] Figure 13 Driving timing of pixel circuits within sub-pixels according to some embodiments Figure 3 . Detailed Implementation

[0035] The technical solutions in some embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments provided in this disclosure are within the scope of protection of this disclosure.

[0036] Unless the context otherwise requires, throughout the specification and claims, the term "comprising" is interpreted as open-ended and encompassing, meaning "including, but not limited to." In the description of the specification, terms such as "one embodiment," "some embodiments," "exemplary embodiment," "example," or "some examples" are intended to indicate that a particular feature, structure, material, or characteristic associated with that embodiment or example is included in at least one embodiment or example of this disclosure. The illustrative representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics mentioned may be included in any suitable manner in any one or more embodiments or examples.

[0037] Hereinafter, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of embodiments of this disclosure, unless otherwise stated, "a plurality of" means two or more.

[0038] In describing some embodiments, the terms "coupled" and "connected," and their derivative expressions, may be used. The term "connected" should be interpreted broadly; for example, a "connection" can be a fixed connection, a detachable connection, or an integral part; it can be a direct connection or an indirect connection via an intermediate medium. The term "coupled," for example, indicates that two or more components have direct physical or electrical contact. The term "coupled" or "communicatively coupled" may also refer to two or more components that do not have direct contact with each other but still cooperate or interact with each other. The embodiments disclosed herein are not necessarily limited to the content of this document.

[0039] "At least one of A, B and C" has the same meaning as "at least one of A, B or C", both including the following combinations of A, B and C: only A, only B, only C, combinations of A and B, combinations of A and C, combinations of B and C, and combinations of A, B and C.

[0040] "A and / or B" includes the following three combinations: A only, B only, and a combination of A and B.

[0041] The use of “applies to” or “configured to” in this article implies an open and inclusive language that does not preclude applicability to or configuration to devices that perform additional tasks or steps.

[0042] As used herein, “about,” “approximately,” or “approximately” includes the stated value and the average value within an acceptable range of deviation from the given value, wherein the acceptable range of deviation is determined by a person skilled in the art taking into account the measurement under discussion and the error associated with the measurement of the given quantity (i.e., the limitations of the measurement system).

[0043] As used herein, “parallel,” “perpendicular,” and “equal” include the described situation and situations that are similar to the described situation, within an acceptable range of deviation, which is determined by those skilled in the art taking into account the measurement under discussion and the error associated with the measurement of a particular quantity (i.e., the limitations of the measurement system). For example, “parallel” includes absolute parallelism and approximate parallelism, where an acceptable range of deviation for approximate parallelism may be, for example, within 5°; “perpendicular” includes absolute perpendicularity and approximate perpendicularity, where an acceptable range of deviation for approximate perpendicularity may also be, for example, within 5°; “equal” includes absolute equality and approximate equality, where an acceptable range of deviation for approximate equality may be, for example, a difference between the two equals being less than or equal to 5% of either one.

[0044] This document describes exemplary embodiments with reference to cross-sectional views and / or plan views, which are idealized exemplary drawings. In the drawings, the thickness of layers and the area of ​​regions are enlarged for clarity. Therefore, variations in shape relative to the drawings are contemplated due to, for example, manufacturing techniques and / or tolerances. Thus, exemplary embodiments should not be construed as being limited to the shapes of the regions shown herein, but rather include shape deviations due to, for example, manufacturing processes. For example, etched areas shown as rectangular would typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to show the actual shapes of the areas of the device, nor are they intended to limit the scope of the exemplary embodiments.

[0045] For ease of description below, an XYZ coordinate system is established. The third direction Z represents the thickness direction of the display panel. The XY plane is perpendicular to the third direction Z, and the first direction X intersects the second direction Y. For example, the first direction X can be perpendicular to the second direction Y.

[0046] like Figure 1 As shown, some embodiments of this disclosure provide a display device 100.

[0047] Exemplarily, the display device 100 can be any device that displays text or images, whether in motion (e.g., video) or stationary (e.g., still images). More specifically, the embodiments described are contemplated to be implemented in or associated with a variety of electronic devices, such as (but not limited to) mobile phones, wireless devices, personal digital assistants (PDAs), handheld or portable computers, Global Positioning System (GPS) receivers / navigators, cameras, MP4 video players, camcorders, game consoles, watches, clocks, calculators, television monitors, flat panel displays, computer monitors, automotive displays (e.g., odometer displays, etc.), navigators, cockpit controllers and / or displays, displays of camera views (e.g., displays of rearview cameras in vehicles), electronic photographs, electronic billboards or signs, projectors, architectural structures, packaging and aesthetic structures (e.g., displays of images of a piece of jewelry), etc. Figure 1 The following is an illustration using a mobile phone as an example of a display device 100.

[0048] For example, the display device 100 may be a micro light-emitting diode (Micro LED) display device.

[0049] Alternatively, the display device 100 may be a mini light-emitting diode (MiniLED) display device.

[0050] Alternatively, the display device 100 may be an electroluminescent display device. In the case that the display device 100 is an electroluminescent display device, the electroluminescent display device may be an organic light-emitting diode (OLED) display device or a quantum dot light-emitting diode (QLED) display device.

[0051] Alternatively, the display device 100 may be a photoluminescent display device. In the case where the display device 100 is a photoluminescent display device, the photoluminescent display device may be a quantum dot photoluminescent display device.

[0052] In some embodiments, please continue reading Figure 1 The display device 100 may include a display panel 10 and a circuit board (not shown). The circuit board and the display panel 10 are electrically connected, and the circuit board may be configured to drive the display panel 10 to display an image.

[0053] For example, the circuit boards in the display device 100 include, but are not limited to, printed circuit boards (PCBs) and flexible printed circuit boards (FPCs).

[0054] For example, please continue reading Figure 1 When the display device 100 is a micro-light-emitting diode display device, the display panel 10 inside the display device 100 can be a micro-light-emitting diode display panel.

[0055] When the display device 100 is a sub-millimeter light-emitting diode display device, the display panel 10 inside the display device 100 can be a sub-millimeter light-emitting diode display panel.

[0056] When the display device 100 is an electroluminescent display device, the display panel 10 inside the display device 100 can be an electroluminescent display panel.

[0057] When the display device 100 is a photoluminescent display device, the display panel 10 inside the display device 100 can be a photoluminescent display panel.

[0058] The structure of the above-mentioned display panel 10 will be described in detail below.

[0059] In some embodiments, such as Figure 2 As shown, Figure 2 This is a plan view of a display panel 10 according to some embodiments. The display panel 10 may be a rectangular structure.

[0060] It should be noted that the aforementioned "rectangular structure" refers to the fact that the overall shape of the boundary of the display panel 10 is rectangular, but it is not limited to a standard rectangle. That is, "rectangle" here includes not only the shape of a standard rectangle, but also, considering manufacturing processes, shapes similar to rectangles. For example, please refer to [further details omitted]. Figure 2 The long and short sides of the rectangle are curved at each intersection (i.e., at the corner G), meaning the corner G is smooth, so that the boundary of the display panel 10 is a rounded rectangle in the plan view.

[0061] In other embodiments, the display panel 10 may be a circular structure or other shapes with corners.

[0062] The following uses a rectangular structure for the display panel 10 as an example to illustrate some embodiments of the present disclosure. However, the implementation of the present disclosure includes, but is not limited to, this, and the shape of the display panel 10 can also be any other shape.

[0063] In some embodiments, please continue reading Figure 2 The display panel 10 has a display area AA for displaying images and a peripheral area AN located on at least one side of the display area AA.

[0064] For example, the peripheral area AN of the display panel 10 may be located on one side of the display area AA.

[0065] Alternatively, the peripheral area AN of the display panel 10 can be located on opposite sides of the display area AA.

[0066] Alternatively, please continue reading Figure 2 The peripheral area AN of the display panel 10 can surround the display area AA.

[0067] It should be noted that the specific setting of the peripheral area AN of the display panel 10 is related to the specific design of the display panel 10 and can be set according to actual needs. This is only an example and is not intended to limit this disclosure.

[0068] For example, please continue reading Figure 2 The peripheral area AN of the display panel 10 may be provided with a gate driver on array (GOA) and control signal lines (e.g., clock signal lines, power supply voltage signal lines, etc.), but the function of the peripheral area AN of the display panel 10 includes, but is not limited to, these.

[0069] In some embodiments, please continue reading Figure 2The display panel 10 may include multiple sub-pixels S.

[0070] For example, please continue reading Figure 2 Multiple sub-pixels S within the display panel 10 can be set within the display area AA of the display panel 10, and the sub-pixel S is the smallest light-emitting unit within the display area AA.

[0071] For example, multiple sub-pixels S within the display panel 10 can emit light of the same color.

[0072] When multiple sub-pixels S within the display panel 10 emit light of the same color, the display panel 10 may further include a color filter layer (not shown) disposed on the light-emitting side of the multiple sub-pixels S. For example, the multiple sub-pixels S within the display panel 10 may all emit light of colors such as white, red, green, or blue. In this case, the colored light emitted by the sub-pixels S is emitted as the same color light after passing through the color filter layer, or is converted into other colored light light and emitted. Thus, when multiple sub-pixels S emit light of the same color, the display panel 10 can achieve multi-color light emission.

[0073] Alternatively, multiple sub-pixels S within the display panel 10 can emit light of different colors.

[0074] For example, the multiple sub-pixels S in the display panel 10 may include a red sub-pixel that emits red light, a green sub-pixel that emits green light, and a blue sub-pixel that emits blue light, thereby realizing multi-color light emission of the display panel 10.

[0075] For example, please continue reading Figure 2 Multiple sub-pixels S within the display panel 10 can be arranged in an array.

[0076] For example, please continue reading Figure 2 Multiple sub-pixels S within the display panel 10 can be arranged at intervals along the first direction X and the second direction Y, respectively.

[0077] For example, please continue reading Figure 2 The sub-pixels S within the display panel 10 may include light-emitting devices S1.

[0078] For example, if the display panel 10 is a micro LED display panel, the light-emitting device S1 in the sub-pixel S may include a Micro LED light-emitting chip.

[0079] For example, in the case where the display panel 10 is a sub-millimeter light-emitting diode display panel, the light-emitting device S1 in the sub-pixel S may include a Mini LED light-emitting chip.

[0080] For example, if the display panel 10 is an electroluminescent display panel or a photoluminescent display panel, the light-emitting device S1 in the sub-pixel S may include a light-emitting layer.

[0081] For example, please continue reading Figure 2 The sub-pixels S within the display panel 10 may include pixel circuits S2.

[0082] When a sub-pixel S includes a light-emitting device S1, the pixel circuit S2 within the sub-pixel S can be electrically connected to the light-emitting device S1. The pixel circuit S2 can generate a driving signal (e.g., a driving current), and the light-emitting device S1 can emit light under the driving action of the driving signal generated by the pixel circuit S2.

[0083] The structure of the pixel circuit S2 described above will be explained in detail below.

[0084] In some embodiments, such as Figure 3 As shown, Figure 3 This is an equivalent circuit diagram of pixel circuit S2 within sub-pixel S according to some embodiments. Pixel circuit S2 may include driving sub-circuit 1. Driving sub-circuit 1 is electrically connected to a first voltage terminal V1, a first light emission control signal terminal HF, and the first electrode of light-emitting device S1 within sub-pixel S.

[0085] For example, such as Figure 4 As shown, Figure 4 This is an equivalent circuit diagram of pixel circuit S2 within sub-pixel S according to some embodiments. The driving sub-circuit 1 within pixel circuit S2 may include a first transistor T1.

[0086] Please continue reading. Figure 4 The first terminal of the first transistor T1 can be electrically connected to the first voltage terminal V1, the second terminal of the first transistor T1 can be electrically connected to the first terminal of the light-emitting device S1, and the first control terminal of the first transistor T1 can be electrically connected to the first light-emitting control signal terminal HF.

[0087] For example, please continue reading Figure 4 The first transistor T1 in the driving sub-circuit 1 can be a bipolar junction transistor (BJT), a thin-film transistor (TFT), or a field-effect transistor (FET).

[0088] When the first transistor T1 in the driver sub-circuit 1 is a bipolar transistor, the control electrode of the first transistor T1 can be the base, the first electrode of the first transistor T1 can be the collector, and the second electrode of the first transistor T1 can be the emitter. Alternatively, the control electrode of the first transistor T1 can be the base, the first electrode of the first transistor T1 can be the emitter, and the second electrode of the first transistor T1 can be the collector.

[0089] When the first transistor T1 in the driving sub-circuit 1 is a thin-film transistor or a field-effect transistor, the control electrode of the first transistor T1 can be the gate, the first electrode of the first transistor T1 can be the source, and the second electrode of the first transistor T1 can be the drain. Alternatively, the control electrode of the first transistor T1 can be the gate, the first electrode of the first transistor T1 can be the drain, and the second electrode of the first transistor T1 can be the source.

[0090] For example, please continue reading Figure 4 The first transistor T1 in the driving sub-circuit 1 can be a P-type transistor. Alternatively, the first transistor T1 in the driving sub-circuit 1 can be an N-type transistor.

[0091] The following uses a P-type transistor as an example of the first transistor T1 in the driver sub-circuit 1 to illustrate some embodiments of the present disclosure. However, the implementation of the present disclosure includes, but is not limited to, this, and the first transistor T1 can also be other suitable types of transistors.

[0092] For example, such as Figure 5 As shown, Figure 5 This is a timing diagram for driving the pixel circuit S2 within a sub-pixel S according to some embodiments. The duty cycle of the first light emission control signal provided by the first light emission control signal terminal HF can be greater than or equal to 2% and less than or equal to 20%.

[0093] For example, the duty cycle of the first light emission control signal provided by the first light emission control signal terminal HF can be 2%, 3%, 5%, 8%, 10%, 12%, 15%, 18%, or 20%, etc.

[0094] It should be noted that the "duty cycle of the first light-emitting control signal provided by the first light-emitting control signal terminal HF" refers to the proportion of the effective level duration of the first light-emitting control signal to the entire signal cycle in a periodic signal.

[0095] For example, please continue reading Figure 5 The first light emission control signal provided by the first light emission control signal terminal HF can be a high-frequency signal.

[0096] For example, please continue reading Figure 3 and Figure 4The second electrode of the light-emitting device S1 in the sub-pixel S can be electrically connected to the second voltage terminal V2.

[0097] One of the first voltage terminal V1 and the second voltage terminal V2 can be a high voltage terminal, and the other can be a low voltage terminal.

[0098] For example, please continue reading Figure 5 The first voltage terminal V1 can be a high voltage terminal, and the second voltage terminal V2 can be a low voltage terminal.

[0099] In some embodiments, please continue reading Figure 3 The pixel circuit S2 may include the storage sub-circuit 2.

[0100] When the pixel circuit S2 includes a driving sub-circuit 1, and the driving sub-circuit 1 is electrically connected to the first voltage terminal V1, the first light emission control signal terminal HF, and the first electrode of the light emission device S1 in the sub-pixel S, the storage sub-circuit 2 can be electrically connected to the driving sub-circuit 1 and the first voltage terminal V1. The common terminal of the storage sub-circuit 2 and the driving sub-circuit 1 is the first node N1.

[0101] Please continue reading. Figure 4 In a driving sub-circuit 1, a first transistor T1 is included, with its first terminal electrically connected to a first voltage terminal V1, its second terminal electrically connected to the first terminal of the light-emitting device S1, and its first control terminal electrically connected to the first light-emitting control signal terminal HF. In this configuration, the first transistor T1 can be a dual-gate transistor, and the storage sub-circuit 2 can be electrically connected to the second control terminal of the first transistor T1. The first node N1 can be a common terminal for both the storage sub-circuit 2 and the second control terminal of the first transistor T1.

[0102] When the target gray level of the light-emitting device S1 in the sub-pixel S is less than or equal to the gray level threshold, the first transistor T1 in the driving sub-circuit 1 can switch between the on state and the off state under the control of the first light-emitting control signal provided by the first light-emitting control signal terminal HF and the potential of the first node N1.

[0103] In other words, when the target grayscale of the light-emitting device S1 is small, the first transistor T1 can switch between an on and off state under the control of the first light-emitting control signal provided by the first light-emitting control signal terminal HF and the potential of the first node N1. Since the first terminal of the first transistor T1 is electrically connected to the first voltage terminal V1 and the second terminal of the first transistor T1 is electrically connected to the first terminal of the light-emitting device S1, when the first transistor T1 is in the on state, the current path between the first voltage terminal V1 and the light-emitting device S1 can be conducted, thereby enabling the light-emitting device S1 to emit light. When the first transistor T1 is in the off state, the current path between the first voltage terminal V1 and the light-emitting device S1 can be turned off, thereby enabling the light-emitting device S1 to not emit light. Furthermore, since the first transistor T1 switches between the on and off states under the control of the first light emission control signal provided by the first light emission control signal terminal HF and the potential of the first node N1, the light emission device S1 switches between the light emission state and the non-light emission state. This allows the light emission duration of the light emission device S1 to be adjusted (i.e., pulse width modulation (PWM) dimming mode). This enables the light emission device S1 to be driven to emit light with a higher current density when the target gray level of the light emission device S1 is small. This solves the problem of poor brightness uniformity of the light emission device S1 under low current density, which is beneficial to improving the brightness uniformity of the light emission device S1. This, in turn, is beneficial to improving the driving effect of the pixel circuit S2, thereby improving the display effect of the display panel 10 including the aforementioned pixel circuit S2.

[0104] For example, such as Figure 6 As shown, and in combination Figure 4 and Figure 5 , Figure 6 This is a graph showing the relationship between the threshold voltage of the first transistor T1 in the driving sub-circuit 1 according to some embodiments and the voltage applied to the first control electrode of the first transistor T1. When the first transistor T1 in the driving sub-circuit 1 is a dual-gate transistor, and the first control electrode of the first transistor T1 is electrically connected to the first light-emitting control signal terminal HF, and the second control electrode of the first transistor T1 is electrically connected to the storage sub-circuit 2, when the potential of the first node N1 (i.e., the common terminal of the storage sub-circuit 2 and the second control electrode of the first transistor T1) does not change, as the voltage of the first light-emitting control signal provided by the first light-emitting control signal terminal HF changes, the voltage applied to the first control electrode of the first transistor T1 also changes, thereby causing the threshold voltage of the first transistor T1 to change (for example, as the voltage applied to the first control electrode of the first transistor T1 changes, the threshold voltage of the first transistor T1 can change linearly).

[0105] Please continue reading. Figure 6 and combined Figure 4Taking the first transistor T1 in the driving sub-circuit 1 as a P-type transistor as an example, as the voltage of the first light-emitting control signal provided by the first light-emitting control signal terminal HF increases, the voltage applied to the first control electrode of the first transistor T1 increases. As the voltage applied to the first control electrode of the first transistor T1 increases, the threshold voltage of the first transistor T1 decreases.

[0106] In other words, when the first transistor T1 in the driving sub-circuit 1 is a P-type transistor, when the voltage of the first light-emitting control signal provided by the first light-emitting control signal terminal HF is a positive voltage, the voltage applied to the first control electrode of the first transistor T1 is also a positive voltage, and the threshold voltage of the first transistor T1 is relatively small. When the voltage of the first light-emitting control signal provided by the first light-emitting control signal terminal HF is a negative voltage, the voltage applied to the first control electrode of the first transistor T1 is also a negative voltage, and the threshold voltage of the first transistor T1 is relatively large.

[0107] For example, please continue reading Figure 4 , Figure 5 and Figure 6 When the first transistor T1 in the driving sub-circuit 1 is a P-type transistor, when the first light-emitting control signal provided by the first light-emitting control signal terminal HF is a high-level signal, the voltage applied to the first control electrode of the first transistor T1 is a high voltage, and the threshold voltage of the first transistor T1 shifts negatively (for example, the threshold voltage of the first transistor T1 can be less than 0V). When the first light-emitting control signal provided by the first light-emitting control signal terminal HF is a low-level signal, the voltage applied to the first control electrode of the first transistor T1 is a low voltage, and the threshold voltage of the first transistor T1 shifts positively.

[0108] like Figure 7 As shown, Figure 7This is a transfer characteristic curve of the first transistor T1 in the drive sub-circuit 1 according to some embodiments. When the first transistor T1 in the drive sub-circuit 1 is a P-type transistor and includes a gate, source, and drain, the turn-off condition of the first transistor T1 is Vgs (i.e., the voltage difference between the gate and source of the first transistor T1) - Vth (i.e., the threshold voltage of the first transistor T1) = 0. When the first transistor T1 is in the off state, the output current of the first transistor T1 is 0. When the first light-emitting control signal provided by the first light-emitting control signal terminal HF is a high-level signal, the voltage applied to the first control electrode of the first transistor T1 is a high voltage, and the threshold voltage of the first transistor T1 shifts negatively. When the first light-emitting control signal provided by the first light-emitting control signal terminal HF is a low-level signal, the voltage applied to the first control electrode of the first transistor T1 is a low voltage, and the threshold voltage of the first transistor T1 shifts positively. This allows the first light-emitting control signal provided by the first light-emitting control signal terminal HF to adjust the threshold voltage of the first transistor T1. Consequently, the first light-emitting control signal provided by the first light-emitting control signal terminal HF and the potential of the first node N1 can jointly control the first transistor T1 to switch between the on and off states, thereby controlling the light-emitting device S1 to switch between the light-emitting state and the non-light-emitting state.

[0109] Please continue reading. Figure 4 and Figure 5 and combined Figure 6 When the duty cycle of the first light-emitting control signal provided by the first light-emitting control signal terminal HF is greater than or equal to 2% and less than or equal to 20%, and the target gray level of the light-emitting device S1 within the sub-pixel S is less than or equal to the gray level threshold, a current with a higher current density can be used to drive the light-emitting device S1 to emit light. The threshold voltage of the first transistor T1 can be adjusted by the first light-emitting control signal provided by the first light-emitting control signal terminal HF with a duty cycle greater than or equal to 2% and less than or equal to 20%, so that the first light-emitting control signal provided by the first light-emitting control signal terminal HF and the potential of the first node N1 can jointly control the first transistor T1 in... Switching between an on / off state controls the light-emitting device S1 to switch between an emitting state and a non-emitting state, thereby adjusting the emitting duration of the light-emitting device S1. This reduces the emitting duration of the light-emitting device S1, resulting in a grayscale value of the light-emitting device S1 that is less than or equal to the grayscale threshold. This allows the light-emitting device S1 to achieve low grayscale display at high current density, solving the problem of poor brightness uniformity of the light-emitting device S1 at low current density. This improves the brightness uniformity of the light-emitting device S1, which in turn improves the driving effect of the pixel circuit S2, and ultimately improves the display effect of the display panel 10 including the aforementioned pixel circuit S2.

[0110] For example, please continue reading Figure 4 and Figure 5 When the duty cycle of the first light-emitting control signal provided by the first light-emitting control signal terminal HF is greater than or equal to 2% and less than or equal to 20%, and the first light-emitting control signal is a high-frequency signal, the first light-emitting control signal provided by the first light-emitting control signal terminal HF and the potential of the first node N1 can jointly control the first transistor T1 to turn on for short periods of time multiple times, thereby controlling the light-emitting device S1 to emit light for short periods of time multiple times. This can reduce the probability of the light-emitting device S1 flickering as observed by the human eye, which is beneficial to further improve the display effect of the display panel 10.

[0111] For example, the grayscale threshold can be greater than or equal to 10 and less than or equal to 80.

[0112] For example, the grayscale threshold can be 10, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 65, 70, 75 or 80, etc.

[0113] Please continue reading. Figure 4 When the grayscale threshold is 10, if the target grayscale of the light-emitting device S1 in the sub-pixel S is less than or equal to 10, the first transistor T1 in the driving sub-circuit 1 can switch between the on state and the off state under the control of the first light-emitting control signal provided by the first light-emitting control signal terminal HF and the potential of the first node N1.

[0114] When the grayscale threshold is 30, if the target grayscale of the light-emitting device S1 in the sub-pixel S is less than or equal to 30, the first transistor T1 in the driving sub-circuit 1 can switch between the on and off states under the control of the first light-emitting control signal provided by the first light-emitting control signal terminal HF and the potential of the first node N1.

[0115] When the grayscale threshold is 50, if the target grayscale of the light-emitting device S1 in the sub-pixel S is less than or equal to 50, the first transistor T1 in the driving sub-circuit 1 can switch between the on and off states under the control of the first light-emitting control signal provided by the first light-emitting control signal terminal HF and the potential of the first node N1.

[0116] When the grayscale threshold is 80, if the target grayscale of the light-emitting device S1 in the sub-pixel S is less than or equal to 80, the first transistor T1 in the driving sub-circuit 1 can switch between the on state and the off state under the control of the first light-emitting control signal provided by the first light-emitting control signal terminal HF and the potential of the first node N1.

[0117] For example, please continue reading Figure 4Taking a grayscale threshold of 30 as an example, when the grayscale threshold is 30, if the target grayscale of the light-emitting device S1 in the sub-pixel S is 5, 10, 15, 20, 25 or 28, the first transistor T1 in the driving sub-circuit 1 can switch between the on state and the off state under the control of the first light-emitting control signal provided by the first light-emitting control signal terminal HF and the potential of the first node N1.

[0118] Please continue reading. Figure 4 and Figure 5 Taking a grayscale threshold of 30 as an example, when the grayscale threshold is 30, if the target grayscale of the light-emitting device S1 in the sub-pixel S is less than or equal to 30, the light-emitting duration of the light-emitting device S1 can be adjusted by pulse width modulation dimming, and a current with a higher current density can be used to drive the light-emitting device S1 to emit light.

[0119] For example, if the target gray level of the light-emitting device S1 in the sub-pixel S is 30, the light-emitting device S1 can be driven to emit light using a current with a high current density (e.g., a current of about 0.17uA).

[0120] For example, please continue reading Figure 4 The storage sub-circuit 2 within the pixel circuit S2 may include a second capacitor C2.

[0121] When the storage sub-circuit 2 is electrically connected to the driving sub-circuit 1 and the first voltage terminal V1 respectively, the first plate of the second capacitor C2 can be electrically connected to the first voltage terminal V1, and the second plate of the second capacitor C2 can be electrically connected to the driving sub-circuit 1.

[0122] Please continue reading. Figure 4 When the driving sub-circuit 1 includes a first transistor T1, and the first transistor T1 is a dual-gate transistor, and the storage sub-circuit 2 is electrically connected to the second control electrode of the first transistor T1, the second plate of the second capacitor C2 can be electrically connected to the second control electrode of the first transistor T1.

[0123] In some embodiments, such as Figure 8 As shown, Figure 8 This is an equivalent circuit diagram of pixel circuit S2 within sub-pixel S according to some embodiments. Pixel circuit S2 may also include gating control sub-circuit 3.

[0124] When the pixel circuit S2 includes a driving sub-circuit 1 and a storage sub-circuit 2, and the driving sub-circuit 1 is electrically connected to the first voltage terminal V1, the first light emission control signal terminal HF, the first pole of the light emission device S1 in the sub-pixel S, and the storage sub-circuit 2 respectively, the gating control sub-circuit 3 can be electrically connected to the driving sub-circuit 1, the first light emission control signal terminal HF, and the first data signal terminal Data1 respectively.

[0125] like Figure 9 As shown, Figure 9 This is an equivalent circuit diagram of the pixel circuit S2 within a sub-pixel S according to some embodiments. When the driving sub-circuit 1 includes a first transistor T1, and the first transistor T1 is a dual-gate transistor, with its first terminal electrically connected to a first voltage terminal V1, its second terminal electrically connected to the first terminal of the light-emitting device S1, its first control terminal electrically connected to a first light-emitting control signal terminal HF, and its second control terminal electrically connected to the storage sub-circuit 2, the gating control sub-circuit 3 can be electrically connected to the first control terminal of the first transistor T1, the first light-emitting control signal terminal HF, and the first data signal terminal Data1, respectively.

[0126] When the target gray level of the light-emitting device S1 in the sub-pixel S is less than or equal to the gray level threshold, the gating control sub-circuit 3 can, under the control of the first data signal provided by the first data signal terminal Data1, conduct the current path between the first transistor T1 and the first light-emitting control signal terminal HF.

[0127] In the pixel circuit S2 described above, when the target gray level of the light-emitting device S1 within the sub-pixel S is less than or equal to the gray level threshold, the selection control sub-circuit 3, under the control of the first data signal provided by the first data signal terminal Data1, conducts the current path between the first transistor T1 and the first light-emitting control signal terminal HF. This allows the first transistor T1 to switch between an on state and an off state under the control of the first light-emitting control signal provided by the first light-emitting control signal terminal HF and the potential of the first node N1. Consequently, the light-emitting device S1 can switch between a light-emitting state and a non-light-emitting state, and the light-emitting duration of the light-emitting device S1 can be adjusted. This allows the light-emitting device S1 to be driven to emit light using a current with a higher current density when the target gray level of the light-emitting device S1 is small. This solves the problem of poor brightness uniformity of the light-emitting device S1 under low current density, which is beneficial to improving the brightness uniformity of the light-emitting device S1. This, in turn, is beneficial to improving the driving effect of the pixel circuit S2, and thus beneficial to improving the display effect of the display panel 10 including the pixel circuit S2 described above.

[0128] like Figure 10 As shown, Figure 10This is a timing diagram of the driving of pixel circuit S2 within sub-pixel S according to some embodiments. When the duty cycle of the first light-emitting control signal provided by the first light-emitting control signal terminal HF is greater than or equal to 2% and less than or equal to 20%, and the target grayscale of the light-emitting device S1 within sub-pixel S is less than or equal to the grayscale threshold, the selection control sub-circuit 3, under the control of the first data signal provided by the first data signal terminal Data1, conducts the current path between the first transistor T1 and the first light-emitting control signal terminal HF. This allows the voltage of the first light-emitting control signal provided by the first light-emitting control signal terminal HF to be applied to the first control electrode of the first transistor T1. Consequently, the first light-emitting control signal provided by the first light-emitting control signal terminal HF, with a duty cycle greater than or equal to 2% and less than or equal to 20%, can adjust the threshold voltage of the first transistor T1, thereby enabling the first... The first light-emitting control signal provided by the light-emitting control signal terminal HF and the potential of the first node N1 can jointly control the first transistor T1 to switch between the on and off states, thereby controlling the light-emitting device S1 to switch between the light-emitting state and the non-light-emitting state, so as to adjust the light-emitting duration of the light-emitting device S1, so that the light-emitting duration of the light-emitting device S1 is reduced, thereby making the gray level of the light-emitting device S1 less than or equal to the gray level threshold, so that the light-emitting device S1 can achieve low gray level display under high current density, thus solving the problem of poor brightness uniformity of the light-emitting device S1 under low current density, which is beneficial to improving the brightness uniformity of the light-emitting device S1, which in turn is beneficial to improving the driving effect of the pixel circuit S2, and thus is beneficial to improving the display effect of the display panel 10 including the above-mentioned pixel circuit S2.

[0129] For example, such as Figure 11 As shown, Figure 11 This is an equivalent circuit diagram of the pixel circuit S2 within a sub-pixel S according to some embodiments. The gating control sub-circuit 3 within the pixel circuit S2 may include a data writing unit 31 and a switch control unit 32. The data writing unit 31 may be electrically connected to a first data signal terminal Data1, a first scan signal terminal Gate1, and a gating control terminal CH, respectively. The switch control unit 32 may be electrically connected to a driving sub-circuit 1, a first light emission control signal terminal HF, and a gating control terminal CH, respectively.

[0130] Specifically, when the target gray level of the light-emitting device S1 within the sub-pixel S is less than or equal to the gray level threshold, the data writing unit 31 can write the first data signal provided by the first data signal terminal Data1 to the gate control terminal CH under the control of the first scan signal provided by the first scan signal terminal Gate1. The switch control unit 32 can conduct the current path between the first light-emitting control signal terminal HF and the first transistor T1 under the control of the potential of the gate control terminal CH.

[0131] For example, such as Figure 12 As shown, Figure 12 This is an equivalent circuit diagram of the pixel circuit S2 within a sub-pixel S according to some embodiments. When the gating control sub-circuit 3 within the pixel circuit S2 includes a data writing unit 31, the data writing unit 31 may include a second transistor T2. The control terminal of the second transistor T2 may be electrically connected to the first scan signal terminal Gate1, the first terminal of the second transistor T2 may be electrically connected to the first data signal terminal Data1, and the second terminal of the second transistor T2 may be electrically connected to the gating control terminal CH.

[0132] For example, please continue reading Figure 12 The second transistor T2 in the data writing unit 31 can be a transistor, thin film transistor or field effect transistor, etc.

[0133] When the second transistor T2 is a bipolar junction transistor (BJT), its control electrode can be the base, its first electrode can be the collector, and its second electrode can be the emitter. Alternatively, the control electrode of the second transistor T2 can be the base, its first electrode can be the emitter, and its second electrode can be the collector.

[0134] When the second transistor T2 is a thin-film transistor or a field-effect transistor, the control electrode of the second transistor T2 can be the gate, the first electrode of the second transistor T2 can be the source, and the second electrode of the second transistor T2 can be the drain. Alternatively, the control electrode of the second transistor T2 can be the gate, the first electrode of the second transistor T2 can be the drain, and the second electrode of the second transistor T2 can be the source.

[0135] For example, please continue reading Figure 12 The second transistor T2 in the data writing unit 31 can be an N-type transistor. Alternatively, the second transistor T2 in the data writing unit 31 can be a P-type transistor.

[0136] The following describes some embodiments of the present disclosure using the example of an N-type transistor as the second transistor T2 in the data writing unit 31. However, the implementation of the present disclosure includes, but is not limited to, this, and the second transistor T2 may also be other suitable types of transistors.

[0137] For example, please continue reading Figure 12 The second transistor T2 in the data writing unit 31 can be a single-gate transistor. Alternatively, the second transistor T2 in the data writing unit 31 can be a dual-gate transistor.

[0138] For example, please continue reading Figure 12In the case where the gating control sub-circuit 3 within the pixel circuit S2 includes a switch control unit 32, the switch control unit 32 may include a third transistor T3. The control electrode of the third transistor T3 may be electrically connected to the gating control terminal CH, the first electrode of the third transistor T3 may be electrically connected to the first light emission control signal terminal HF, and the second electrode of the third transistor T3 may be electrically connected to the first control electrode of the first transistor T1.

[0139] For example, please continue reading Figure 12 The third transistor T3 in the switch control unit 32 can be a transistor, thin film transistor or field effect transistor, etc.

[0140] When the third transistor T3 is a bipolar junction transistor (BJT), its control electrode can be the base, its first electrode can be the collector, and its second electrode can be the emitter. Alternatively, the control electrode of the third transistor T3 can be the base, its first electrode can be the emitter, and its second electrode can be the collector.

[0141] When the third transistor T3 is a thin-film transistor or a field-effect transistor, the control electrode of the third transistor T3 can be the gate, the first electrode of the third transistor T3 can be the source, and the second electrode of the third transistor T3 can be the drain. Alternatively, the control electrode of the third transistor T3 can be the gate, the first electrode of the third transistor T3 can be the drain, and the second electrode of the third transistor T3 can be the source.

[0142] For example, please continue reading Figure 12 The third transistor T3 in the switch control unit 32 can be a P-type transistor. Alternatively, the third transistor T3 in the switch control unit 32 can be an N-type transistor.

[0143] The following uses a P-type transistor as an example of the third transistor T3 in the switch control unit 32 to illustrate some embodiments of the present disclosure. However, the implementation of the present disclosure includes, but is not limited to, this, and the third transistor T3 can also be other suitable types of transistors.

[0144] For example, please continue reading Figure 12 The third transistor T3 within the switch control unit 32 can be a single-gate transistor. Alternatively, the third transistor T3 within the switch control unit 32 can be a dual-gate transistor.

[0145] For example, please continue reading Figure 12The gating control sub-circuit 3 within the pixel circuit S2 includes a data writing unit 31 and a switch control unit 32. The data writing unit 31 includes a second transistor T2, and the switch control unit 32 includes a third transistor T3. The control electrode of the second transistor T2 is electrically connected to the first scan signal terminal Gate1, the first electrode of the second transistor T2 is electrically connected to the first data signal terminal Data1, and the second electrode of the second transistor T2 is electrically connected to the gating control terminal CH. The control electrode of the third transistor T3 is electrically connected to the gating control terminal CH, the first electrode of the third transistor T3 is electrically connected to the first light emission control signal terminal HF, and the second electrode of the third transistor T3 is electrically connected to the first control electrode of the first transistor T1. When the target gray level of the light emission device S1 within the sub-pixel S is less than or equal to the gray level threshold, the second transistor T2, under the control of the first scan signal provided by the first scan signal terminal Gate1, can write the first data signal provided by the first data signal terminal Data1 to the gating control terminal CH. The third transistor T3, under the control of the potential of the gating control terminal CH, can conduct the current path between the first light emission control signal terminal HF and the first transistor T1.

[0146] For example, please continue reading Figure 11 In the case where the gating control subcircuit 3 within the pixel circuit S2 includes a data writing unit 31 and a switch control unit 32, the gating control subcircuit 3 may also include a storage unit 33. The storage unit 33 may be electrically connected to the gating control terminal CH and the third voltage terminal Vcom, respectively.

[0147] Storage unit 33 can be used to maintain the potential of the gating control terminal CH.

[0148] For example, please continue reading Figure 12 The storage unit 33 may include a first capacitor C1. The first plate of the first capacitor C1 may be electrically connected to the third voltage terminal Vcom, and the second plate of the first capacitor C1 may be electrically connected to the gating control terminal CH.

[0149] In some embodiments, please continue reading Figure 4 and Figure 5In the pixel circuit S2, which includes a driving sub-circuit 1 and a storage sub-circuit 2, and the driving sub-circuit 1 includes a first transistor T1, which is a dual-gate transistor, with its first terminal electrically connected to a first voltage terminal V1, its second terminal electrically connected to the first terminal of the light-emitting device S1, its first control terminal electrically connected to a first light-emitting control signal terminal HF, and its second control terminal electrically connected to the storage sub-circuit 2, if the target gray level of the light-emitting device S1 in the sub-pixel S is greater than the gray level threshold, then in the light-emitting stage M3, the first transistor T1 can be continuously turned on under the control of the first light-emitting control signal provided by the first light-emitting control signal terminal HF and the potential of the first node N1.

[0150] In other words, during the light-emitting stage M3, when the target grayscale of the light-emitting device S1 is relatively large, the first transistor T1 can be continuously turned on under the control of the first light-emitting control signal provided by the first light-emitting control signal terminal HF and the potential of the first node N1. Since the first terminal of the first transistor T1 is electrically connected to the first voltage terminal V1, and the second terminal of the first transistor T1 is electrically connected to the first terminal of the light-emitting device S1, when the first transistor T1 is in the turned-on state, the current path between the first voltage terminal V1 and the light-emitting device S1 can be conducted, thereby enabling the light-emitting device S1 to emit light. Furthermore, since the first transistor T1 is continuously turned on under the control of the first light-emitting control signal provided by the first light-emitting control signal terminal HF and the potential of the first node N1 during the light-emitting stage M3, the light-emitting device S1 can continuously emit light during the light-emitting stage M3 to achieve a high grayscale.

[0151] For example, please continue reading Figure 4 and Figure 5 and combined Figure 6 When the duty cycle of the first light-emitting control signal provided by the first light-emitting control signal terminal HF is greater than or equal to 2% and less than or equal to 20%, and the target gray level of the light-emitting device S1 within the sub-pixel S is greater than the gray level threshold, in the light-emitting stage M3, the first transistor T1 can be continuously turned on under the control of the first light-emitting control signal provided by the first light-emitting control signal terminal HF and the potential of the first node N1. Since the first light-emitting control signal provided by the first light-emitting control signal terminal HF with a duty cycle greater than or equal to 2% and less than or equal to 20% can adjust the threshold voltage of the first transistor T1, in the light-emitting stage M3, the current flowing through the first transistor T1 changes with the change of the first light-emitting control signal provided by the first light-emitting control signal terminal HF, thereby allowing the current flowing through the first transistor T1 to switch between the first current G1 and the second current G2.

[0152] For example, please continue reading Figure 4 and Figure 5When the target gray level of the light-emitting device S1 in the sub-pixel S is less than or equal to the gray level threshold, the first transistor T1 in the driving sub-circuit 1 switches between the on and off states under the control of the first light-emitting control signal provided by the first light-emitting control signal terminal HF and the potential of the first node N1. When the target gray level of the light-emitting device S1 in the sub-pixel S is greater than the gray level threshold, during the light-emitting stage M3, when the first transistor T1 is continuously turned on under the control of the first light-emitting control signal provided by the first light-emitting control signal terminal HF and the potential of the first node N1, the first control electrode of the first transistor T1 can be directly electrically connected to the first light-emitting control signal terminal HF. That is, no other sub-circuit is set between the first control electrode of the first transistor T1 and the first light-emitting control signal terminal HF. This is beneficial to reduce the number of transistors and capacitors in the pixel circuit S2, thereby reducing the planar area of ​​the pixel circuit S2 and thus improving the pixel density (Pixels Per Inch, PPI) of the display panel 10 including the above-mentioned pixel circuit S2.

[0153] Furthermore, without any other sub-circuits between the first control electrode and the first light emission control signal terminal HF of the first transistor T1, the number of signal lines connected to the pixel circuit S2 within the display panel 10 can be reduced. This is beneficial for further increasing the pixel density of the display panel 10, including the aforementioned pixel circuit S2, and also for reducing the power consumption of the display panel 10.

[0154] In other embodiments, please continue to refer to Figure 8 and Figure 9 In a pixel circuit S2, which includes a driving sub-circuit 1, a storage sub-circuit 2, and a gating control sub-circuit 3, and where the driving sub-circuit 1 includes a first transistor T1, which is a dual-gate transistor, with its first terminal electrically connected to a first voltage terminal V1, its second terminal electrically connected to the first terminal of the light-emitting device S1, its first control terminal electrically connected to the gating control sub-circuit 3, its second control terminal electrically connected to the storage sub-circuit 2, and the gating control sub-circuit 3 electrically connected to the first control terminal of the first transistor T1, the first light-emitting control signal terminal HF, and the first data signal terminal Data1 respectively, when the target gray level of the light-emitting device S1 in the sub-pixel S is greater than the gray level threshold, the gating control sub-circuit 3 can, under the control of the first data signal provided by the first data signal terminal Data1, turn off the current path between the first transistor T1 and the first light-emitting control signal terminal HF.

[0155] In the pixel circuit S2 described above, when the target gray level of the light-emitting device S1 in the sub-pixel S is greater than the gray level threshold, the gating control sub-circuit 3, under the control of the first data signal provided by the first data signal terminal Data1, turns off the current path between the first transistor T1 and the first light-emitting control signal terminal HF, so that when the target gray level of the light-emitting device S1 in the sub-pixel S is greater than the gray level threshold, the threshold voltage of the first transistor T1 in the driving sub-circuit 1 is not affected by the first light-emitting control signal provided by the first light-emitting control signal terminal HF.

[0156] For example, please continue reading Figure 11 The gating control sub-circuit 3 within the pixel circuit S2 includes a data writing unit 31 and a switch control unit 32. The data writing unit 31 is electrically connected to the first data signal terminal Data1, the first scan signal terminal Gate1, and the gating control terminal CH. The switch control unit 32 is electrically connected to the driving sub-circuit 1, the first light emission control signal terminal HF, and the gating control terminal CH. When the target grayscale of the light-emitting device S1 within the sub-pixel S is greater than the grayscale threshold, the data writing unit 31 can write the first data signal provided by the first data signal terminal Data1 to the gating control terminal CH under the control of the first scan signal provided by the first scan signal terminal Gate1. The switch control unit 32 can turn off the current path between the first light emission control signal terminal HF and the first transistor T1 under the control of the potential of the gating control terminal CH.

[0157] For example, please continue reading Figure 12 The gating control sub-circuit 3 within the pixel circuit S2 includes a data writing unit 31 and a switch control unit 32. The data writing unit 31 includes a second transistor T2, and the switch control unit 32 includes a third transistor T3. The control electrode of the second transistor T2 is electrically connected to the first scan signal terminal Gate1, and its first electrode is electrically connected to the first data signal terminal Data1. The second electrode of the second transistor T2 is also electrically connected to the gating control terminal CH. The control electrode of the third transistor T3 is also electrically connected to the gating control terminal CH, and its first electrode is electrically connected to the first light emission control signal terminal HF. When the second electrode of the third transistor T3 is electrically connected to the first control electrode of the first transistor T1, if the target grayscale of the light-emitting device S1 within the sub-pixel S is greater than the grayscale threshold, the second transistor T2, under the control of the first scan signal provided by the first scan signal terminal Gate1, can write the first data signal provided by the first data signal terminal Data1 to the gating control terminal CH. The third transistor T3, under the control of the potential of the gating control terminal CH, can turn off the current path between the first light emission control signal terminal HF and the first transistor T1.

[0158] In some embodiments, please continue reading Figure 3 and Figure 8 The pixel circuit S2 may include a data writing sub-circuit 4.

[0159] When the pixel circuit S2 includes the driving sub-circuit 1, the data writing sub-circuit 4 can be electrically connected to the second data signal terminal Data2, the second scan signal terminal Gate2, and the driving sub-circuit 1, respectively. The data writing sub-circuit 4 can be used to write the second data signal provided by the second data signal terminal Data2 into the driving sub-circuit 1 under the control of the second scan signal provided by the second scan signal terminal Gate2.

[0160] For example, please continue reading Figure 4 , Figure 9 , Figure 11 and Figure 12 The data writing sub-circuit 4 may include an eighth transistor T8. The first terminal of the eighth transistor T8 may be electrically connected to the second data signal terminal Data2, the second terminal of the eighth transistor T8 may be electrically connected to the driving sub-circuit 1, and the control terminal of the eighth transistor T8 may be electrically connected to the second scan signal terminal Gate2.

[0161] Please continue reading. Figure 4 , Figure 9 , Figure 11 and Figure 12 In the case that the driving sub-circuit 1 includes a first transistor T1, and the first transistor T1 is a dual-gate transistor, the first terminal of the first transistor T1 is electrically connected to the first voltage terminal V1, the second terminal of the first transistor T1 is electrically connected to the first terminal of the light-emitting device S1, the first control terminal of the first transistor T1 is electrically connected to the first light-emitting control signal terminal HF, and the second control terminal of the first transistor T1 is electrically connected to the storage sub-circuit 2, the second terminal of the eighth transistor T8 can be electrically connected to the first terminal of the first transistor T1.

[0162] In some embodiments, please continue reading Figure 3 and Figure 8 The pixel circuit S2 may include a compensation control sub-circuit 5.

[0163] Please continue reading. Figure 4 , Figure 9 , Figure 11 and Figure 12In the case that the driving sub-circuit 1 includes a first transistor T1, and the first transistor T1 is a dual-gate transistor, the first terminal of the first transistor T1 is electrically connected to the first voltage terminal V1, the second terminal of the first transistor T1 is electrically connected to the first terminal of the light-emitting device S1, the first control terminal of the first transistor T1 is electrically connected to the first light-emitting control signal terminal HF, and the second control terminal of the first transistor T1 is electrically connected to the storage sub-circuit 2, the compensation control sub-circuit 5 can be electrically connected to the second terminal of the first transistor T1, the second control terminal of the first transistor T1, and the third scan signal terminal Gate3, respectively.

[0164] The compensation control sub-circuit 5 can be used to control the conduction between the second electrode of the first transistor T1 and the second control electrode of the first transistor T1 under the control of the third scan signal provided by the third scan signal terminal Gate3, so as to compensate for the threshold voltage of the first transistor T1.

[0165] For example, please continue reading Figure 4 , Figure 9 , Figure 11 and Figure 12 The compensation control sub-circuit 5 may include a ninth transistor T9. The first terminal of the ninth transistor T9 may be electrically connected to the second terminal of the first transistor T1, the second terminal of the ninth transistor T9 may be electrically connected to the second control terminal of the first transistor T1, and the control terminal of the ninth transistor T9 may be electrically connected to the third scan signal terminal Gate3.

[0166] In some embodiments, please continue reading Figure 3 and Figure 8 The pixel circuit S2 may include a first light-emitting control sub-circuit 6.

[0167] When the pixel circuit S2 includes the driving sub-circuit 1, the first light emission control sub-circuit 6 can be electrically connected to the driving sub-circuit 1, the first voltage terminal V1, and the second light emission control signal terminal EM, respectively.

[0168] During the light-emitting stage, the first light-emitting control sub-circuit 6 can conduct the current path between the first voltage terminal V1 and the driving sub-circuit 1 under the control of the second light-emitting control signal provided by the second light-emitting control signal terminal EM.

[0169] For example, please continue reading Figure 4 , Figure 9 , Figure 11 and Figure 12 The first light-emitting control sub-circuit 6 may include a fifth transistor T5. The first terminal of the fifth transistor T5 may be electrically connected to the first voltage terminal V1, the second terminal of the fifth transistor T5 may be electrically connected to the driving sub-circuit 1, and the control terminal of the fifth transistor T5 may be electrically connected to the second light-emitting control signal terminal EM.

[0170] Please continue reading. Figure 4 , Figure 9 , Figure 11 and Figure 12 In the case that the driving sub-circuit 1 includes a first transistor T1, and the first transistor T1 is a dual-gate transistor, the first terminal of the first transistor T1 is electrically connected to the first voltage terminal V1, the second terminal of the first transistor T1 is electrically connected to the first terminal of the light-emitting device S1, the first control terminal of the first transistor T1 is electrically connected to the first light-emitting control signal terminal HF, and the second control terminal of the first transistor T1 is electrically connected to the storage sub-circuit 2, the second terminal of the fifth transistor T5 can be electrically connected to the first terminal of the first transistor T1.

[0171] In some embodiments, please continue reading Figure 3 and Figure 8 The pixel circuit S2 may include a second light-emitting control sub-circuit 7.

[0172] When the pixel circuit S2 includes the driving sub-circuit 1, the second light-emitting control sub-circuit 7 can be electrically connected to the driving sub-circuit 1, the light-emitting device S1, and the second light-emitting control signal terminal EM, respectively.

[0173] During the light-emitting stage, the second light-emitting control sub-circuit 7 can conduct the current path between the driving sub-circuit 1 and the light-emitting device S1 under the control of the second light-emitting control signal provided by the second light-emitting control signal terminal EM.

[0174] For example, please continue reading Figure 4 , Figure 9 , Figure 11 and Figure 12 The second light-emitting control sub-circuit 7 may include a sixth transistor T6. The first terminal of the sixth transistor T6 may be electrically connected to the driving sub-circuit 1, the second terminal of the sixth transistor T6 may be electrically connected to the first terminal of the light-emitting device S1, and the control terminal of the sixth transistor T6 may be electrically connected to the second light-emitting control signal terminal EM.

[0175] Please continue reading. Figure 4 , Figure 9 , Figure 11 and Figure 12 In the case that the driving sub-circuit 1 includes a first transistor T1, and the first transistor T1 is a dual-gate transistor, the first terminal of the first transistor T1 is electrically connected to the first voltage terminal V1, the second terminal of the first transistor T1 is electrically connected to the first terminal of the light-emitting device S1, the first control terminal of the first transistor T1 is electrically connected to the first light-emitting control signal terminal HF, and the second control terminal of the first transistor T1 is electrically connected to the storage sub-circuit 2, the first terminal of the sixth transistor T6 can be electrically connected to the second terminal of the first transistor T1.

[0176] In some embodiments, please continue reading Figure 3and Figure 8 The pixel circuit S2 may include a first initialization sub-circuit 8.

[0177] When the pixel circuit S2 includes the driving sub-circuit 1, the first initialization sub-circuit 8 can be electrically connected to the control terminal, the first initialization signal terminal Vin1 and the first reset control signal terminal R1 of the driving sub-circuit 1, respectively.

[0178] The first initialization sub-circuit 8 can be used to write the first initialization signal provided by the first initialization signal terminal Vin1 into the control terminal of the drive sub-circuit 1 under the control of the first reset control signal provided by the first reset control signal terminal R1, so as to initialize the potential of the control terminal of the drive sub-circuit 1.

[0179] For example, please continue reading Figure 4 , Figure 9 , Figure 11 and Figure 12 The first initialization sub-circuit 8 may include a fourth transistor T4. The first terminal of the fourth transistor T4 may be electrically connected to the first initialization signal terminal Vin1, the second terminal of the fourth transistor T4 may be electrically connected to the control terminal of the drive sub-circuit 1, and the control terminal of the fourth transistor T4 may be electrically connected to the first reset control signal terminal R1.

[0180] Please continue reading. Figure 4 , Figure 9 , Figure 11 and Figure 12 In the case that the driving sub-circuit 1 includes a first transistor T1, and the first transistor T1 is a dual-gate transistor, the first terminal of the first transistor T1 is electrically connected to the first voltage terminal V1, the second terminal of the first transistor T1 is electrically connected to the first terminal of the light-emitting device S1, the first control terminal of the first transistor T1 is electrically connected to the first light-emitting control signal terminal HF, and the second control terminal of the first transistor T1 is electrically connected to the storage sub-circuit 2, the second terminal of the fourth transistor T4 can be electrically connected to the second control terminal of the first transistor T1.

[0181] In some embodiments, please continue reading Figure 3 and Figure 8 The pixel circuit S2 may include a second initialization sub-circuit 9.

[0182] The second initialization sub-circuit 9 can be electrically connected to the first pole of the light-emitting device S1, the first initialization signal terminal Vin1, and the first reset control signal terminal R1, respectively.

[0183] The second initialization sub-circuit 9 can be used to write the first initialization signal provided by the first initialization signal terminal Vin1 into the first pole of the light-emitting device S1 under the control of the first reset control signal provided by the first reset control signal terminal R1, so as to initialize the first pole of the light-emitting device S1.

[0184] For example, please continue reading Figure 4 , Figure 9 , Figure 11 and Figure 12 The second initialization sub-circuit 9 may include a seventh transistor T7. The first terminal of the seventh transistor T7 may be electrically connected to the first initialization signal terminal Vin1, the second terminal of the seventh transistor T7 may be electrically connected to the first terminal of the light-emitting device S1, and the control terminal of the seventh transistor T7 may be electrically connected to the first reset control signal terminal R1.

[0185] In some embodiments, please continue reading Figure 4 , Figure 9 , Figure 11 and Figure 12 In the case where the pixel circuit S2 includes one or more of the following: data writing sub-circuit 4, compensation control sub-circuit 5, first light emission control sub-circuit 6, second light emission control sub-circuit 7, first initialization sub-circuit 8, and second initialization sub-circuit 9, and the data writing sub-circuit 4 includes an eighth transistor T8, the compensation control sub-circuit 5 includes a ninth transistor T9, the first light emission control sub-circuit 6 includes a fifth transistor T5, the second light emission control sub-circuit 7 includes a sixth transistor T6, the first initialization sub-circuit 8 includes a fourth transistor T4, and the second initialization sub-circuit 9 includes a seventh transistor T7, the aforementioned transistors (i.e., the eighth transistor T8, the ninth transistor T9, the fifth transistor T5, the sixth transistor T6, the fourth transistor T4, and the seventh transistor T7) can be devices such as transistors, thin-film transistors, or field-effect transistors.

[0186] When the aforementioned transistors (i.e., transistor T8, transistor T9, transistor T5, transistor T6, transistor T4, and transistor T7) are bipolar junction transistors (BJTs), the control electrode of the transistor can be the base, the first electrode can be the collector, and the second electrode can be the emitter. Alternatively, the control electrode can be the base, the first electrode can be the emitter, and the second electrode can be the collector.

[0187] When the aforementioned transistors (i.e., transistor T8, transistor T9, transistor T5, transistor T6, transistor T4, and transistor T7) are thin-film transistors or field-effect transistors, the control electrode of the transistor can be the gate, the first electrode of the transistor can be the source, and the second electrode of the transistor can be the drain. Alternatively, the control electrode of the transistor can be the gate, the first electrode of the transistor can be the drain, and the second electrode of the transistor can be the source.

[0188] In some embodiments, please continue reading Figure 4 , Figure 9 , Figure 11 and Figure 12 In the case where the pixel circuit S2 includes one or more of the following: data writing sub-circuit 4, compensation control sub-circuit 5, first light emission control sub-circuit 6, second light emission control sub-circuit 7, first initialization sub-circuit 8, and second initialization sub-circuit 9, and the data writing sub-circuit 4 includes an eighth transistor T8, the compensation control sub-circuit 5 includes a ninth transistor T9, the first light emission control sub-circuit 6 includes a fifth transistor T5, the second light emission control sub-circuit 7 includes a sixth transistor T6, the first initialization sub-circuit 8 includes a fourth transistor T4, and the second initialization sub-circuit 9 includes a seventh transistor T7, the aforementioned transistors (i.e., the eighth transistor T8, the ninth transistor T9, the fifth transistor T5, the sixth transistor T6, the fourth transistor T4, and the seventh transistor T7) can be N-type transistors or P-type transistors.

[0189] For example, please continue reading Figure 4 , Figure 9 , Figure 11 and Figure 12 The eighth transistor T8 in the data writing sub-circuit 4 can be a P-type transistor. The ninth transistor T9 in the compensation control sub-circuit 5 can be an N-type transistor. The fifth transistor T5 in the first light-emitting control sub-circuit 6 can be a P-type transistor. The sixth transistor T6 in the second light-emitting control sub-circuit 7 can be a P-type transistor. The fourth transistor T4 in the first initialization sub-circuit 8 can be an N-type transistor. The seventh transistor T7 in the second initialization sub-circuit 9 can be an N-type transistor.

[0190] In some embodiments, please continue reading Figure 4 , Figure 9 , Figure 11 and Figure 12 In the pixel circuit S2, which includes one or more of the following: data writing sub-circuit 4, compensation control sub-circuit 5, first light emission control sub-circuit 6, second light emission control sub-circuit 7, first initialization sub-circuit 8, and second initialization sub-circuit 9, and where the data writing sub-circuit 4 includes an eighth transistor T8, the compensation control sub-circuit 5 includes a ninth transistor T9, the first light emission control sub-circuit 6 includes a fifth transistor T5, the second light emission control sub-circuit 7 includes a sixth transistor T6, the first initialization sub-circuit 8 includes a fourth transistor T4, and the second initialization sub-circuit 9 includes a seventh transistor T7, the aforementioned transistors (i.e., the eighth transistor T8, the ninth transistor T9, the fifth transistor T5, the sixth transistor T6, the fourth transistor T4, and the seventh transistor T7) can be single-gate transistors. Alternatively, the aforementioned transistors can be dual-gate transistors.

[0191] The driving method of the pixel circuit S2 described above will be explained in detail below.

[0192] In some embodiments, please continue reading Figure 5and Figure 10 The driving cycle of the pixel circuit S2 driving the light-emitting device S1 to emit light may include the light-emitting stage M3.

[0193] Please continue reading. Figure 4 , Figure 5 , Figure 9 and Figure 10 In a pixel circuit S2 comprising a driving sub-circuit 1 and a storage sub-circuit 2, wherein the driving sub-circuit 1 comprises a first transistor T1, the first transistor T1 being a dual-gate transistor, the first electrode of the first transistor T1 being electrically connected to a first voltage terminal V1, the second electrode of the first transistor T1 being electrically connected to the first electrode of the light-emitting device S1, the first control electrode of the first transistor T1 being electrically connected to a first light-emitting control signal terminal HF, and the second control electrode of the first transistor T1 being electrically connected to the storage sub-circuit 2, the driving method of the pixel circuit S2 may include: in the light-emitting stage M3, when the target gray level of the light-emitting device S1 within the sub-pixel S is less than or equal to the gray level threshold, the first transistor T1, under the control of the first light-emitting control signal provided by the first light-emitting control signal terminal HF and the potential of the first node N1 (i.e., the common terminal of the storage sub-circuit 2 and the second control electrode of the first transistor T1), switches between an on state and an off state.

[0194] In other words, during the light-emitting stage M3, when the target grayscale of the light-emitting device S1 is relatively small, the first transistor T1 can switch between an on and off state under the control of the first light-emitting control signal provided by the first light-emitting control signal terminal HF and the potential of the first node N1. Since the first terminal of the first transistor T1 is electrically connected to the first voltage terminal V1 and the second terminal of the first transistor T1 is electrically connected to the first terminal of the light-emitting device S1, when the first transistor T1 is in the on state, the current path between the first voltage terminal V1 and the light-emitting device S1 can be conducted, thereby enabling the light-emitting device S1 to emit light. When the first transistor T1 is in the off state, the current path between the first voltage terminal V1 and the light-emitting device S1 can be turned off, thereby enabling the light-emitting device S1 to not emit light. Furthermore, since the first transistor T1 switches between an on state and an off state under the control of the first light emission control signal provided by the first light emission control signal terminal HF and the potential of the first node N1, the light emission device S1 switches between a light emission state and a non-light emission state. This allows the light emission duration of the light emission device S1 to be adjusted, so that when the target gray level of the light emission device S1 is small, a current with a higher current density can be used to drive the light emission device S1 to emit light. This solves the problem of poor brightness uniformity of the light emission device S1 under low current density, which is beneficial to improving the brightness uniformity of the light emission device S1. This, in turn, is beneficial to improving the driving effect of the pixel circuit S2, thereby improving the display effect of the display panel 10 including the aforementioned pixel circuit S2.

[0195] For example, please continue reading Figure 4 , Figure 5 , Figure 9 and Figure 10 and combined Figure 6 The duty cycle of the first light emission control signal provided by the first light emission control signal terminal HF can be greater than or equal to 2% and less than or equal to 20%. When the target grayscale of the light-emitting device S1 within the sub-pixel S is less than or equal to the grayscale threshold, a current with a higher current density can be used to drive the light-emitting device S1 to emit light. The threshold voltage of the first transistor T1 is adjusted by a first light-emitting control signal provided by the first light-emitting control signal terminal HF, with a duty cycle greater than or equal to 2% and less than or equal to 20%. This allows the first light-emitting control signal provided by the first light-emitting control signal terminal HF and the potential of the first node N1 to jointly control the first transistor T1 to switch between an on and off state, thereby controlling the light-emitting device S1 to switch between an emitting state and a non-emitting state. This adjusts the emitting duration of the light-emitting device S1, reducing its emitting duration and thus making the grayscale of the light-emitting device S1 less than or equal to the grayscale threshold. This allows the light-emitting device S1 to achieve low grayscale display under high current density, solving the problem of poor brightness uniformity of the light-emitting device S1 under low current density. This improves the brightness uniformity of the light-emitting device S1, which in turn improves the driving effect of the pixel circuit S2, thereby improving the display effect of the display panel 10 including the aforementioned pixel circuit S2.

[0196] For example, please continue reading Figure 4 , Figure 5 , Figure 9 and Figure 10 During the light emission stage M3, when the target gray level of the light emission device S1 in the sub-pixel S is less than or equal to the gray level threshold, the first transistor T1 can periodically switch between the on state and the off state under the control of the first light emission control signal provided by the first light emission control signal terminal HF and the potential of the first node N1.

[0197] In some embodiments, please continue reading Figure 4 and Figure 5 The driving cycle of the pixel circuit S2 driving the light-emitting device S1 to emit light may include the light-emitting stage M3.

[0198] In the pixel circuit S2, which includes a driving sub-circuit 1 and a storage sub-circuit 2, and the driving sub-circuit 1 includes a first transistor T1, which is a dual-gate transistor, with its first terminal electrically connected to a first voltage terminal V1, its second terminal electrically connected to the first terminal of the light-emitting device S1, its first control terminal electrically connected to a first light-emitting control signal terminal HF, and its second control terminal electrically connected to the storage sub-circuit 2, the driving method of the pixel circuit S2 may include: during the light-emitting stage M3, when the target gray level of the light-emitting device S1 in the sub-pixel S is greater than the gray level threshold, the first transistor T1 is continuously turned on under the control of the first light-emitting control signal provided by the first light-emitting control signal terminal HF and the potential of the first node N1.

[0199] In other words, during the light-emitting stage M3, when the target grayscale of the light-emitting device S1 is relatively large, the first transistor T1 can be continuously turned on under the control of the first light-emitting control signal provided by the first light-emitting control signal terminal HF and the potential of the first node N1. Since the first terminal of the first transistor T1 is electrically connected to the first voltage terminal V1, and the second terminal of the first transistor T1 is electrically connected to the first terminal of the light-emitting device S1, when the first transistor T1 is in the turned-on state, the current path between the first voltage terminal V1 and the light-emitting device S1 can be conducted, thereby enabling the light-emitting device S1 to emit light. Furthermore, since the first transistor T1 is continuously turned on under the control of the first light-emitting control signal provided by the first light-emitting control signal terminal HF and the potential of the first node N1 during the light-emitting stage M3, the light-emitting device S1 continuously emits light during the light-emitting stage M3 to achieve a high grayscale.

[0200] For example, please continue reading Figure 4 and Figure 5 and combined Figure 6 When the duty cycle of the first light-emitting control signal provided by the first light-emitting control signal terminal HF is greater than or equal to 2% and less than or equal to 20%, during the light-emitting stage M3, when the target gray level of the light-emitting device S1 in the sub-pixel S is greater than the gray level threshold, the first transistor T1 can be continuously turned on under the control of the first light-emitting control signal provided by the first light-emitting control signal terminal HF and the potential of the first node N1. Since the first light-emitting control signal provided by the first light-emitting control signal terminal HF with a duty cycle greater than or equal to 2% and less than or equal to 20% can adjust the threshold voltage of the first transistor T1, during the light-emitting stage M3, the current flowing through the first transistor T1 changes with the change of the first light-emitting control signal provided by the first light-emitting control signal terminal HF, thereby allowing the current flowing through the first transistor T1 to switch between the first current G1 and the second current G2.

[0201] For example, please continue reading Figure 5 ,exist Figure 5In the diagram, I1 and I2 represent the current flowing through the first transistor T1 when the target gray level of the light-emitting device S1 within the sub-pixel S is greater than the gray level threshold. I3 represents the current flowing through the first transistor T1 when the target gray level of the light-emitting device S1 within the sub-pixel S is less than or equal to the gray level threshold.

[0202] Specifically, taking a grayscale threshold of 30 as an example, I1 can represent the current flowing through the first transistor T1 when the target grayscale of the light-emitting device S1 in sub-pixel S is 255. I2 can represent the current flowing through the first transistor T1 when the target grayscale of the light-emitting device S1 in sub-pixel S is 50. I3 can represent the current flowing through the first transistor T1 when the target grayscale of the light-emitting device S1 in sub-pixel S is 30.

[0203] For example, please continue reading Figure 5 and combined Figure 4 During the light-emitting stage M3, when the target gray level of the light-emitting device S1 in the sub-pixel S is greater than the gray level threshold, the current flowing through the first transistor T1 can periodically switch between the first current G1 and the second current G2.

[0204] For example, please continue reading Figure 4 and Figure 5 The driving method of the pixel circuit S2 includes a light-emitting stage M3. When the target gray level of the light-emitting device S1 in the sub-pixel S is less than or equal to the gray level threshold, the first transistor T1 in the driving sub-circuit 1 switches between an on state and an off state under the control of the first light-emitting control signal provided by the first light-emitting control signal terminal HF and the potential of the first node N1. When the target gray level of the light-emitting device S1 in the sub-pixel S is greater than the gray level threshold, the first transistor T1 is continuously turned on under the control of the first light-emitting control signal provided by the first light-emitting control signal terminal HF and the potential of the first node N1. In this case, the first control electrode of the first transistor T1 can be directly electrically connected to the first light-emitting control signal terminal HF. That is, no other sub-circuits are set between the first control electrode of the first transistor T1 and the first light-emitting control signal terminal HF. This is beneficial to reduce the number of transistors and capacitors in the pixel circuit S2, thereby reducing the planar area of ​​the pixel circuit S2 and thus improving the pixel density of the display panel 10 including the above-mentioned pixel circuit S2.

[0205] Furthermore, without any other sub-circuits between the first control electrode and the first light emission control signal terminal HF of the first transistor T1, the number of signal lines connected to the pixel circuit S2 within the display panel 10 can be reduced. This is beneficial for further increasing the pixel density of the display panel 10, including the aforementioned pixel circuit S2, and also for reducing the power consumption of the display panel 10.

[0206] In some embodiments, please continue reading Figure 9 and Figure 10 The driving cycle of the pixel circuit S2 driving the light-emitting device S1 to emit light may include a first data writing stage M21.

[0207] Please continue reading. Figure 9 and Figure 10 In a pixel circuit S2 comprising a driving sub-circuit 1, a storage sub-circuit 2, and a gating control sub-circuit 3, wherein the driving sub-circuit 1 includes a first transistor T1, which is a dual-gate transistor, with its first terminal electrically connected to a first voltage terminal V1, its second terminal electrically connected to the first terminal of the light-emitting device S1, its first control terminal electrically connected to the gating control sub-circuit 3, its second control terminal electrically connected to the storage sub-circuit 2, and the gating control sub-circuit 3 electrically connected to the first control terminal of the first transistor T1, the first light-emitting control signal terminal HF, and the first data signal terminal Data1 respectively, the driving method of the pixel circuit S2 may include: in the first data writing stage M21, when the target gray level of the light-emitting device S1 in the sub-pixel S is less than or equal to the gray level threshold, the gating control sub-circuit 3 may, under the control of the first data signal provided by the first data signal terminal Data1, conduct the current path between the first transistor T1 and the first light-emitting control signal terminal HF.

[0208] For example, please continue reading Figure 11 and combined Figure 10 In the pixel circuit S2, the gating control sub-circuit 3 includes a data writing unit 31 and a switch control unit 32. The data writing unit 31 is electrically connected to the first data signal terminal Data1, the first scan signal terminal Gate1, and the gating control terminal CH. The switch control unit 32 is electrically connected to the driving sub-circuit 1, the first light emission control signal terminal HF, and the gating control terminal CH. In the driving method of the pixel circuit S2, "in the first data writing stage M21, when the target gray level of the light emission device S1 in the sub-pixel S is less than or equal to the gray level threshold, the gating control sub-circuit 3 can..." Under the control of the first data signal provided by a1, the current path between the first transistor T1 and the first light-emitting control signal terminal HF is turned on. This may include: in the first data writing stage M21, when the target gray level of the light-emitting device S1 in the sub-pixel S is less than or equal to the gray level threshold, the data writing unit 31, under the control of the first scan signal provided by the first scan signal terminal Gate1, writes the first data signal provided by the first data signal terminal Data1 into the gate control terminal CH. The switch control unit 32, under the control of the potential of the gate control terminal CH, turns on the current path between the first light-emitting control signal terminal HF and the first transistor T1.

[0209] For example, please continue reading Figure 12 and combined Figure 10 In the pixel circuit S2, the gating control sub-circuit 3 includes a data writing unit 31 and a switch control unit 32. The data writing unit 31 includes a second transistor T2, and the switch control unit 32 includes a third transistor T3. The control electrode of the second transistor T2 is electrically connected to the first scan signal terminal Gate1, the first electrode of the second transistor T2 is electrically connected to the first data signal terminal Data1, the second electrode of the second transistor T2 is electrically connected to the gating control terminal CH, the control electrode of the third transistor T3 is electrically connected to the gating control terminal CH, the first electrode of the third transistor T3 is electrically connected to the first light emission control signal terminal HF, and the second electrode of the third transistor T3 is electrically connected to the first control electrode of the first transistor T1. In the case that the driving method of the pixel circuit S2 can be: in the first data writing stage M21, when the target gray level of the light emission device S1 in the sub-pixel S is less than or equal to the gray level threshold, the second transistor T2, under the control of the first scan signal provided by the first scan signal terminal Gate1, writes the first data signal provided by the first data signal terminal Data1 to the gating control terminal CH. Under the control of the potential of the gating control terminal CH, the third transistor T3 conducts the current path between the first light-emitting control signal terminal HF and the first transistor T1.

[0210] In some embodiments, such as Figure 13 As shown, and in combination Figure 9 , Figure 13 This is a timing diagram of the driving of pixel circuit S2 within sub-pixel S according to some embodiments. The driving cycle of pixel circuit S2 driving light-emitting device S1 to emit light may include a first data writing phase M21.

[0211] Please continue reading. Figure 9 and Figure 13 In a pixel circuit S2 comprising a driving sub-circuit 1, a storage sub-circuit 2, and a gating control sub-circuit 3, wherein the driving sub-circuit 1 includes a first transistor T1, which is a dual-gate transistor, with its first terminal electrically connected to a first voltage terminal V1, its second terminal electrically connected to the first terminal of the light-emitting device S1, its first control terminal electrically connected to the gating control sub-circuit 3, its second control terminal electrically connected to the storage sub-circuit 2, and the gating control sub-circuit 3 electrically connected to the first control terminal of the first transistor T1, the first light-emitting control signal terminal HF, and the first data signal terminal Data1, the driving method of the pixel circuit S2 may include: in the first data writing stage M21, when the target gray level of the light-emitting device S1 within the sub-pixel S is greater than the gray level threshold, the gating control sub-circuit 3 may, under the control of the first data signal provided by the first data signal terminal Data1, turn off the current path between the first transistor T1 and the first light-emitting control signal terminal HF.

[0212] In the pixel circuit S2 described above, when the target gray level of the light-emitting device S1 in the sub-pixel S is greater than the gray level threshold, the gating control sub-circuit 3, under the control of the first data signal provided by the first data signal terminal Data1, turns off the current path between the first transistor T1 and the first light-emitting control signal terminal HF, so that when the target gray level of the light-emitting device S1 in the sub-pixel S is greater than the gray level threshold, the threshold voltage of the first transistor T1 in the driving sub-circuit 1 is not affected by the first light-emitting control signal provided by the first light-emitting control signal terminal HF.

[0213] For example, please continue reading Figure 11 and combined Figure 13 In the pixel circuit S2, the gating control sub-circuit 3 includes a data writing unit 31 and a switch control unit 32. The data writing unit 31 is electrically connected to the first data signal terminal Data1, the first scan signal terminal Gate1, and the gating control terminal CH. The switch control unit 32 is electrically connected to the driving sub-circuit 1, the first light emission control signal terminal HF, and the gating control terminal CH. In the driving method of the pixel circuit S2, "in the first data writing stage M21, when the target gray level of the light emission device S1 in the sub-pixel S is greater than the gray level threshold, the gating control sub-circuit 3 can..." "Under the control of the first data signal provided by a1, the current path between the first transistor T1 and the first light-emitting control signal terminal HF is turned off" may include: In the first data writing stage M21, when the target gray level of the light-emitting device S1 in the sub-pixel S is greater than the gray level threshold, the data writing unit 31, under the control of the first scan signal provided by the first scan signal terminal Gate1, writes the first data signal provided by the first data signal terminal Data1 into the gate control terminal CH, and the switch control unit 32, under the control of the potential of the gate control terminal CH, turns off the current path between the first light-emitting control signal terminal HF and the first transistor T1.

[0214] For example, please continue reading Figure 12 and combined Figure 13In the pixel circuit S2, the gating control sub-circuit 3 includes a data writing unit 31 and a switch control unit 32. The data writing unit 31 includes a second transistor T2, and the switch control unit 32 includes a third transistor T3. The control electrode of the second transistor T2 is electrically connected to the first scan signal terminal Gate1, the first electrode of the second transistor T2 is electrically connected to the first data signal terminal Data1, the second electrode of the second transistor T2 is electrically connected to the gating control terminal CH, the control electrode of the third transistor T3 is electrically connected to the gating control terminal CH, the first electrode of the third transistor T3 is electrically connected to the first light emission control signal terminal HF, and the second electrode of the third transistor T3 is electrically connected to the first control electrode of the first transistor T1. In the case that the driving method of the pixel circuit S2 can be: in the first data writing stage M21, when the target gray level of the light emission device S1 in the sub-pixel S is greater than the gray level threshold, the second transistor T2, under the control of the first scan signal provided by the first scan signal terminal Gate1, writes the first data signal provided by the first data signal terminal Data1 to the gating control terminal CH. Under the control of the potential of the gating control terminal CH, the third transistor T3 turns off the current path between the first light-emitting control signal terminal HF and the first transistor T1.

[0215] In some embodiments, please continue reading Figure 4 , Figure 5 , Figure 9 and Figure 10 The driving cycle of the pixel circuit S2 driving the light-emitting device S1 to emit light may include a reset phase M1.

[0216] Please continue reading. Figure 5 and Figure 10 In the case where the driving cycle of the pixel circuit S2 driving the light-emitting device S1 to emit light includes the light-emitting phase M3, the reset phase M1 can be before the light-emitting phase M3.

[0217] In a pixel circuit S2 comprising a first initialization sub-circuit 8 and a second initialization sub-circuit 9, the first initialization sub-circuit 8 comprising a fourth transistor T4, the second initialization sub-circuit 9 comprising a seventh transistor T7, the first terminal of the fourth transistor T4 being electrically connected to the first initialization signal terminal Vin1, the second terminal of the fourth transistor T4 being electrically connected to the control terminal of the driving sub-circuit 1, the control terminal of the fourth transistor T4 being electrically connected to the first reset control signal terminal R1, the first terminal of the seventh transistor T7 being electrically connected to the first initialization signal terminal Vin1, the second terminal of the seventh transistor T7 being electrically connected to the first terminal of the light-emitting device S1, and the control terminal of the seventh transistor T7 being electrically connected to the first reset control signal terminal R1, the driving method of the pixel circuit S2 may include: in the reset phase M1, the fourth transistor T4, under the control of the first reset control signal provided by the first reset control signal terminal R1, can conduct the current path between the first initialization signal terminal Vin1 and the first node N1 (i.e., the common terminal of the storage sub-circuit 2 and the second control terminal of the first transistor T1), so that the first initialization signal provided by the first initialization signal terminal Vin1 can reset the first node N1. The seventh transistor T7 can conduct the current path between the first initialization signal terminal Vin1 and the first electrode of the light-emitting device S1 under the control of the first reset control signal provided by the first reset control signal terminal R1, so that the first initialization signal provided by the first initialization signal terminal Vin1 can reset the first electrode of the light-emitting device S1.

[0218] In some embodiments, please continue reading Figure 4 , Figure 5 , Figure 9 and Figure 10 The driving cycle of the pixel circuit S2 driving the light-emitting device S1 to emit light may include a second data writing stage M22.

[0219] Please continue reading. Figure 5 and Figure 10 When the driving cycle of the pixel circuit S2 driving the light-emitting device S1 to emit light includes a reset phase M1 and an emission phase M3, the second data writing phase M22 can be between the reset phase M1 and the emission phase M3.

[0220] In the pixel circuit S2, which includes a data writing sub-circuit 4 and a compensation control sub-circuit 5, the data writing sub-circuit 4 includes an eighth transistor T8, the compensation control sub-circuit 5 includes a ninth transistor T9, and the first terminal of the eighth transistor T8 is electrically connected to the second data signal terminal Data2, the second terminal of the eighth transistor T8 is electrically connected to the driving sub-circuit 1, the control terminal of the eighth transistor T8 is electrically connected to the second scan signal terminal Gate2, the first terminal of the ninth transistor T9 is electrically connected to the second terminal of the first transistor T1, the second terminal of the ninth transistor T9 is electrically connected to the second control terminal of the first transistor T1, and the control terminal of the ninth transistor T9 is electrically connected to the third scan signal terminal Gate3, the driving method of the pixel circuit S2 may include: in the second data writing stage M22, the eighth transistor T8, under the control of the second scan signal provided by the second scan signal terminal Gate2, can conduct the current path between the second data signal terminal Data2 and the driving sub-circuit 1, so that the second data signal provided by the second data signal terminal Data2 can be written into the driving sub-circuit 1. The ninth transistor T9 can, under the control of the third scan signal provided by the third scan signal terminal Gate3, conduct the current path between the first transistor T1 and the first node N1 (i.e., the common terminal of the second control electrode of the storage sub-circuit 2 and the first transistor T1) in the driving sub-circuit 1 to compensate for the threshold voltage of the first transistor T1.

[0221] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.

Claims

1. A pixel circuit, characterized in that, include: Driver sub-circuit; The driving sub-circuit includes a first transistor, which is a dual-gate transistor; The first terminal of the first transistor is electrically connected to the first voltage terminal, the second terminal of the first transistor is electrically connected to the first terminal of the light-emitting device, and the first control terminal of the first transistor is electrically connected to the first light-emitting control signal terminal. The storage sub-circuit is electrically connected to the second control electrode and the first voltage terminal of the first transistor, respectively; the common terminal of the storage sub-circuit and the second control electrode of the first transistor is the first node; When the target gray level of the light-emitting device is less than or equal to the gray level threshold, the first transistor switches between an on state and an off state under the control of the first light-emitting control signal provided by the first light-emitting control signal terminal and the potential of the first node.

2. The pixel circuit according to claim 1, characterized in that, The duty cycle of the first light emission control signal is greater than or equal to 2% and less than or equal to 20%.

3. The pixel circuit according to claim 1, characterized in that, When the target gray level of the light-emitting device is greater than the gray level threshold, during the light-emitting stage, the first transistor is continuously turned on under the control of the first light-emitting control signal provided by the first light-emitting control signal terminal and the potential of the first node.

4. The pixel circuit according to claim 3, characterized in that, When the target gray level of the light-emitting device is greater than the gray level threshold, during the light-emitting stage, the current flowing through the first transistor switches between a first current and a second current. The value of the first current is greater than the value of the second current.

5. The pixel circuit according to claim 1, characterized in that, The pixel circuit further includes a gating control sub-circuit; the gating control sub-circuit is electrically connected to the first control electrode of the first transistor, the first light emission control signal terminal and the first data signal terminal, respectively. When the target gray level of the light-emitting device is less than or equal to the gray level threshold, the gating control sub-circuit, under the control of the first data signal provided by the first data signal terminal, conducts the current path between the first transistor and the first light-emitting control signal terminal.

6. The pixel circuit according to claim 5, characterized in that, When the target gray level of the light-emitting device is greater than the gray level threshold, the gating control sub-circuit, under the control of the first data signal provided by the first data signal terminal, shuts off the current path between the first transistor and the first light-emitting control signal terminal.

7. The pixel circuit according to claim 5, characterized in that, The gating control sub-circuit includes: The data writing unit is electrically connected to the first data signal terminal, the first scan signal terminal, and the gating control terminal, respectively. The switch control unit is electrically connected to the first control electrode of the first transistor, the first light-emitting control signal terminal, and the gating control terminal, respectively. Wherein, when the target gray level of the light-emitting device is less than or equal to the gray level threshold, the data writing unit writes the first data signal provided by the first data signal terminal to the gating control terminal under the control of the first scanning signal provided by the first scanning signal terminal. Under the control of the potential of the gating control terminal, the switch control unit conducts the current path between the first light-emitting control signal terminal and the first transistor.

8. The pixel circuit according to claim 7, characterized in that, During the light emission stage, when the target gray level of the light emission device is greater than the gray level threshold, the data writing unit writes the first data signal provided by the first data signal terminal to the gating control terminal under the control of the first scanning signal provided by the first scanning signal terminal. The switch control unit, under the control of the potential of the gating control terminal, shuts off the current path between the first light-emitting control signal terminal and the first transistor.

9. The pixel circuit according to claim 7, characterized in that, The data writing unit includes a second transistor; the control electrode of the second transistor is electrically connected to the first scan signal terminal, the first electrode of the second transistor is electrically connected to the first data signal terminal, and the second electrode of the second transistor is electrically connected to the gating control terminal.

10. The pixel circuit according to claim 7, characterized in that, The switch control unit includes a third transistor; the control electrode of the third transistor is electrically connected to the gating control terminal, the first electrode of the third transistor is electrically connected to the first light emission control signal terminal, and the second electrode of the third transistor is electrically connected to the first control electrode of the first transistor.

11. The pixel circuit according to any one of claims 7-10, characterized in that, The gating control subcircuit also includes a storage unit; The storage unit is electrically connected to the gating control terminal and the third voltage terminal respectively; the storage unit is used to maintain the potential of the gating control terminal.

12. The pixel circuit according to claim 11, characterized in that, The storage unit includes a first capacitor; the first plate of the first capacitor is electrically connected to the third voltage terminal, and the second plate of the first capacitor is electrically connected to the gating control terminal.

13. The pixel circuit according to any one of claims 1-10, characterized in that, The grayscale threshold is greater than or equal to 10 and less than or equal to 80.

14. A display panel, characterized in that, Includes multiple sub-pixels; The sub-pixel includes a pixel circuit and a light-emitting device as described in any one of claims 1-13, wherein the pixel circuit is electrically connected to the light-emitting device.

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