Electronic device and wafer carrier radiator
By combining an integrated heat sink with a chip carrier heat sink, the heat dissipation pathways of the chip are increased, solving the problem of limited heat transfer area of the integrated heat sink and achieving a more efficient heat dissipation effect.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- GIGA BYTE TECH CO LTD
- Filing Date
- 2025-05-20
- Publication Date
- 2026-04-28
AI Technical Summary
In existing technologies, the fixed size of integrated heat sinks limits the heat transfer area and thus the heat dissipation performance of the chip.
The chip carrier heat sink is adopted. By combining the integrated heat sink and the chip carrier heat sink, the heat dissipation path is increased. The heat is transferred through two channels, including the heat conduction component and the fin section, to improve the heat dissipation efficiency.
This achieves a dual heat dissipation path for the chip, improving overall heat dissipation efficiency, rapidly reducing chip temperature, and enhancing overall heat dissipation performance.
Smart Images
Figure CN224178363U_ABST
Abstract
Description
Technical Field
[0001] This invention relates to an electronic device and a heat sink, and more particularly to an electronic device and a heat sink for a chip carrier that can improve the heat dissipation performance of a chip. Background Technology
[0002] Typically, heat dissipation from a chip can only be transferred from the integrated heat sink (IHS) above it to the heat dissipation structure thermally coupled to the integrated heat sink. However, since the size of the integrated heat sink is fixed, its heat transfer area is limited by its size, thus limiting the chip's heat dissipation performance. Utility Model Content
[0003] This invention provides a chip carrier heat sink that can improve chip heat dissipation efficiency.
[0004] The present invention provides an electronic device having the above-described wafer carrier heat sink.
[0005] This novel electronic device includes a wafer carrier, a wafer, an integrated heat sink (IHS), and a wafer carrier heat sink. The wafer is disposed on the wafer carrier. The integrated heat sink is disposed on the wafer carrier, covers and is thermally coupled to the wafer. The wafer carrier heat sink is disposed around the integrated heat sink and includes a main body, wherein the main body includes an opening exposing the integrated heat sink. The wafer carrier heat sink overlaps with and is thermally coupled to the wafer carrier. A portion of the heat emitted by the wafer is dissipated through the integrated heat sink, and another portion of the heat emitted by the wafer is transferred to the wafer carrier heat sink through the wafer carrier.
[0006] In one embodiment of this novel invention, the aforementioned wafer carrier heat sink is separated from the integrated heat sink.
[0007] In one embodiment of the present invention, the main body includes a top plate and a plurality of walls erected on the top plate. The top plate and the walls together form a bottom cavity. The top plate includes an opening that communicates with the bottom cavity. The wafer carrier and the wafer are located in the bottom cavity.
[0008] In one embodiment of this novel invention, a first top surface of the integrated heat sink and a second top surface of the top plate are coplanar.
[0009] In one embodiment of this novel device, the aforementioned wafer carrier heat sink includes at least one fin portion extending from the main body portion.
[0010] In one embodiment of this invention, the aforementioned wafer carrier heat sink further includes a first heat-conducting element located between the top plate of the main body and the wafer carrier.
[0011] In one embodiment of this invention, the electronic device further includes a circuit board, wherein a chip carrier is disposed on the circuit board, and the walls of the main body are thermally coupled to the circuit board.
[0012] In one embodiment of this invention, the aforementioned wafer carrier heat sink further includes a second heat-conducting element located between the walls and the circuit board of the main body.
[0013] In one embodiment of the present invention, the integrated heat sink includes a plurality of recesses recessed into the edges, and the wafer carrier heat sink includes a plurality of protrusions extending toward the opening, the protrusions corresponding to the recesses.
[0014] The present invention discloses a wafer carrier heat sink, which is applicable to a wafer carrier, wherein a wafer and an integrated heat sink are disposed on the wafer carrier, the integrated heat sink covers and is thermally coupled to the wafer, the wafer carrier heat sink includes a main body including an opening, and when the wafer carrier heat sink is disposed on the wafer carrier, the wafer carrier heat sink is located on the periphery of the integrated heat sink, and the integrated heat sink is exposed outside the opening.
[0015] In one embodiment of this novel invention, the aforementioned wafer carrier heat sink is overlapped and thermally coupled to the wafer carrier, wherein a portion of the heat emitted by the wafer is adapted to be dissipated through the integrated heat sink, and another portion of the heat emitted by the wafer is adapted to be transferred to the wafer carrier heat sink through the wafer carrier.
[0016] In one embodiment of the present invention, the main body includes a top plate and a plurality of walls erected on the top plate, wherein the top plate and the walls together form a bottom cavity, and the top plate includes an opening communicating with the bottom cavity.
[0017] In one embodiment of this invention, the aforementioned wafer carrier heat sink further includes a first heat-conducting element located between the top plate of the main body and the wafer carrier.
[0018] In one embodiment of this invention, the aforementioned wafer carrier heat sink further includes at least one fin extending from the main body.
[0019] Based on the above, the integrated heat sink of this novel electronic device is disposed on a wafer carrier, covering and thermally coupled to the wafer. The wafer carrier heat sink is disposed around the integrated heat sink, with its main body opening exposing the integrated heat sink. The wafer carrier heat sink overlaps with and is thermally coupled to the wafer carrier. A portion of the heat emitted by the wafer is dissipated through the integrated heat sink, while another portion is transferred to the wafer carrier heat sink through the wafer carrier. Therefore, the wafer of this novel electronic device can dissipate heat through two channels, effectively improving the wafer's heat dissipation performance. Attached Figure Description
[0020] Figure 1This is a perspective view of an electronic device according to an embodiment of the present invention.
[0021] Figure 2 yes Figure 1 A three-dimensional schematic diagram of an integrated heat sink and a chip carrier heat sink.
[0022] Figure 3 and Figure 4 yes Figure 1 Three-dimensional schematic diagrams of the chip carrier heat sink from different perspectives.
[0023] Figure 5 yes Figure 4 A schematic diagram showing that the lower surface of the chip carrier heat sink has a first heat-conducting element and a second heat-conducting element.
[0024] Figure 6 yes Figure 1 A partial cross-sectional schematic diagram.
[0025] The annotations in the attached figures are explained as follows:
[0026] 100: Electronic devices
[0027] 110: Chip carrier board
[0028] 120: Chip
[0029] 130: Integrated Radiator
[0030] 132: First Top Surface
[0031] 134: Concave portion
[0032] 140: Chip Carrier Heatsink
[0033] 141: Main body
[0034] 142: Top plate
[0035] 143: Second Top Surface
[0036] 144: Opening
[0037] 145: Wall
[0038] 146: Bottom cavity
[0039] 147: Fin section
[0040] 148: Outer convex part
[0041] 150: First heat-conducting component
[0042] 152: Second heat-conducting component
[0043] 160: Circuit board
[0044] 162: Power conversion element
[0045] 170: Heat dissipation structure. Detailed Implementation
[0046] Figure 1 This is a perspective view of an electronic device according to an embodiment of the present invention. Figure 2 yes Figure 1 A three-dimensional schematic diagram of an integrated heat sink and a chip carrier heat sink. Figure 3 and Figure 4 yes Figure 1 Three-dimensional schematic diagrams of the chip carrier heat sink from different perspectives. Figure 5 yes Figure 4 A schematic diagram showing that the lower surface of the chip carrier heat sink has a first heat-conducting element and a second heat-conducting element. Figure 6 yes Figure 1 A partial cross-sectional schematic diagram.
[0047] Please see Figures 1 to 6 In this embodiment, the electronic device 100 may be, for example, a motherboard module or a graphics card module, but the type of electronic device 100 is not limited thereto. The electronic device 100 in this embodiment includes a chip carrier 110. Figure 6 ), one chip 120 ( Figure 6 ), an integrated heat sink 130 (IHS) and a chip carrier heat sink 140.
[0048] like Figure 6 As shown, the electronic device 100 also includes a circuit board 160, a chip carrier 110 disposed on the circuit board 160, and a chip 120 disposed on the chip carrier 110. The chip 120 is, for example, a central processing unit (CPU), but the type of chip 120 is not limited thereto. An integrated heat sink 130 is disposed on the chip carrier 110, covers and is thermally coupled to the chip 120.
[0049] The chip carrier heat sink 140 is disposed around the integrated heat sink 130. For example... Figure 2 As shown, in this embodiment, the integrated heat sink 130 includes a plurality of recesses 134 recessed into the edge, and the chip carrier heat sink 140 includes a plurality of protrusions 148 extending toward the opening 144. These protrusions 148 correspond to these recesses 134, so that the chip carrier heat sink 140 is embedded in the periphery of the integrated heat sink 130 through a concave-convex fit design.
[0050] Of course, in other embodiments, the shapes of the wafer carrier heat sink 140 and the integrated heat sink 130 are not limited thereto. Furthermore, the wafer carrier heat sink 140 may include highly thermally conductive materials, such as metals like copper, aluminum, and iron, but is not limited thereto.
[0051] The wafer carrier heat sink 140 includes a main body 141. The main body 141 includes an opening 144 exposing the integrated heat sink 130. The wafer carrier heat sink 140 is overlapped and thermally coupled to the wafer carrier 110. Specifically, as Figure 6 As shown, in this embodiment, the main body 141 includes a top plate 142 and a plurality of walls 145 erected on the top plate 142. The top plate 142 and these walls 145 together form a bottom cavity 146. The top plate 142 includes an opening 144 that communicates with the bottom cavity 146. The wafer carrier 110 and the wafer 120 are located in the bottom cavity 146.
[0052] In this embodiment, the wafer carrier heat sink 140 further includes a first thermal conductive element 150 located between the top plate 142 of the main body 141 and the wafer carrier 110. The first thermal conductive element 150 may include, for example, thermal paste or thermal adhesive strips, but is not limited thereto. The heat emitted by the wafer 120 can be transferred to the wafer carrier heat sink 140 through the wafer carrier 110 and the first thermal conductive element 150.
[0053] Therefore, a portion of the heat generated by the chip 120 is dissipated through the integrated heat sink 130, while another portion of the heat generated by the chip 120 is transferred to the chip carrier heat sink 140 through the chip carrier 110. The heat of the chip 120 can be dissipated simultaneously through the integrated heat sink 130 and the chip carrier heat sink 140, thereby reducing the temperature of the chip 120 more quickly and improving the overall heat dissipation efficiency.
[0054] In addition, such as Figure 6 As shown, a first top surface 132 of the integrated heat sink 130 and a second top surface 143 of the top plate 142 are coplanar. In this embodiment, the electronic device 100 further includes a heat dissipation structure 170 disposed on the first top surface 132 of the integrated heat sink 130 and the second top surface 143 of the top plate 142, for thermal coupling to the integrated heat sink 130 and the chip carrier heat sink 140. The heat dissipation structure 170 may include fins, a fan, and / or a water block, etc., for dissipating heat from the integrated heat sink 130 and the chip carrier heat sink 140.
[0055] It is worth mentioning that, such as Figure 6 As shown, in this embodiment, the wafer carrier heat sink 140 is spaced apart from the integrated heat sink 130. A gap exists between the wafer carrier heat sink 140 and the integrated heat sink 130, preventing direct contact. In this way, heat from the integrated heat sink 130 and the wafer carrier heat sink 140 can be directly conducted to the upper heat dissipation structure 170, without being directly conducted to each other.
[0056] In other words, the chip carrier heat sink 140 is not simply an enlargement of the integrated heat sink 130, but rather an addition of a different heat dissipation path than the integrated heat sink 130, in order to improve the overall heat dissipation performance. In this embodiment, compared to the integrated heat sink 130, which is in direct contact with the chip 120, the chip carrier heat sink 140 mainly conducts heat from the chip 120 to the chip carrier 110.
[0057] Furthermore, in this embodiment, the wafer carrier heat sink 140 includes at least one fin portion 147 extending from the main body portion 141. The at least one fin portion 147 is, for example, two fin portions 147, located on opposite sides of the main body portion 141. Heat energy can be conducted from the main body portion 141 of the wafer carrier heat sink 140 to the two fin portions 147, and dissipated through the large-area fin portions 147.
[0058] In addition, such as Figure 6 As shown, the walls 145 of the main body 141 of the wafer carrier heat sink 140 are thermally coupled to the circuit board 160, thereby dissipating heat from the circuit board 160. Specifically, the wafer carrier heat sink 140 further includes a second thermal conductive element 152 located between the walls 145 of the main body 141 and the circuit board 160. Heat from the circuit board 160 can be conducted to the wafer carrier heat sink 140 through the second thermal conductive element 152. The second thermal conductive element 152 may include, for example, thermal paste or thermal adhesive strips, but is not limited thereto.
[0059] To elaborate further, please return to Figure 1 In this embodiment, the circuit board 160 also includes two rows of power conversion elements 162 located on both sides of the wafer carrier heat sink 140. The power conversion elements 162 are connected to the wafer 120 through lines within the circuit board 160. Since the wafer carrier heat sink 140 is thermally coupled to the circuit board 160 through the second thermal conductive element 152, the wafer carrier heat sink 140 can also dissipate heat for the lines on the circuit board 160 connecting the power conversion elements 162 and the wafer 120, thereby improving the overall heat dissipation performance of the electronic device 100. Of course, the wafer carrier heat sink 140 can also dissipate heat for other lines on the circuit board 160, and is not limited thereto.
[0060] In summary, the integrated heat sink of this novel electronic device is disposed on a wafer carrier, covering and thermally coupled to the wafer. The wafer carrier heat sink is located around the integrated heat sink, with its main body opening exposed outside the integrated heat sink. The wafer carrier heat sink overlaps with and is thermally coupled to the wafer carrier. A portion of the heat generated by the wafer is dissipated through the integrated heat sink, while another portion is transferred to the wafer carrier heat sink via the wafer carrier. Therefore, the wafer of this novel electronic device can dissipate heat through two channels, effectively improving the wafer's heat dissipation performance.
Claims
1. An electronic device, characterized in that, include: One chip carrier board; A chip is disposed on the chip carrier. An integrated heat sink is disposed on the chip carrier, covers and thermally coupled to the chip; as well as A chip carrier heat sink is disposed on the periphery of an integrated heat sink and includes a main body, wherein the main body includes an opening exposing the integrated heat sink, and the chip carrier heat sink is overlapped and thermally coupled to the chip carrier. A portion of the heat generated by the chip is dissipated through the integrated heat sink, and another portion of the heat generated by the chip is transferred to the chip carrier heat sink through the chip carrier.
2. The electronic device as claimed in claim 1, characterized in that, The chip carrier heat sink is separated from the integrated heat sink.
3. The electronic device as claimed in claim 1, characterized in that, The main body includes a top plate and a plurality of walls erected on the top plate. The top plate and the plurality of walls together form a bottom cavity. The top plate includes an opening that communicates with the bottom cavity. The wafer carrier and the wafer are located in the bottom cavity.
4. The electronic device as claimed in claim 3, characterized in that, The first top surface of the integrated radiator and the second top surface of the top plate are coplanar.
5. The electronic device as claimed in claim 3, characterized in that, The chip carrier heat sink includes at least one fin extending from the main body.
6. The electronic device as claimed in claim 3, characterized in that, The wafer carrier heat sink also includes a first heat-conducting element located between the top plate of the main body and the wafer carrier.
7. The electronic device as claimed in claim 3, characterized in that, It also includes a circuit board, wherein the chip carrier is disposed on the circuit board, and the plurality of walls of the main body are thermally coupled to the circuit board.
8. The electronic device as claimed in claim 7, characterized in that, The chip carrier heat sink also includes a second heat-conducting component located between the multiple walls of the main body and the circuit board.
9. The electronic device as claimed in claim 1, characterized in that, The integrated heat sink includes multiple recesses recessed into the edge, and the chip carrier heat sink includes multiple protrusions extending toward the opening, with the multiple protrusions corresponding to the multiple recesses.
10. A heat sink for a wafer carrier, suitable for a wafer carrier, characterized in that, One of the chips and an integrated heat sink are disposed on the chip carrier board, the integrated heat sink covering and thermally coupled to the chip, and the chip carrier board heat sink comprising: A main body includes an opening, wherein when the chip carrier heat sink is disposed on the chip carrier, the chip carrier heat sink is located on the periphery of the integrated heat sink, and the opening exposes the integrated heat sink.
11. The wafer carrier heat sink as claimed in claim 10, characterized in that, The chip carrier heat sink is connected to and thermally coupled to the chip carrier, wherein a portion of the heat emitted by the chip is suitable for dissipation through the integrated heat sink, and another portion of the heat emitted by the chip is suitable for transfer to the chip carrier heat sink through the chip carrier.
12. The wafer carrier heat sink as described in claim 10, characterized in that, The main body includes a top plate and a plurality of walls erected on the top plate, wherein the top plate and the plurality of walls together form a bottom cavity, and the top plate includes an opening that communicates with the bottom cavity.
13. The wafer carrier heat sink as described in claim 12, characterized in that, It also includes a first heat-conducting element located between the top plate of the main body and the wafer carrier.
14. The wafer carrier heat sink as described in claim 10, characterized in that, It also includes at least one fin portion extending from the main body portion.