PD detection alarm protection circuit of laser

By optimizing the pre-amplifier architecture and post-reference design of the laser PD detection circuit, and combining it with high-speed FPGA processing, the problems of high cost, slow speed and low sensitivity in the existing technology are solved, realizing high reliability and fast response laser PD detection, which is suitable for the safety protection of industrial laser equipment.

CN224205073UActive Publication Date: 2026-05-05WUHAN STRONGEST LASER TECH CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
WUHAN STRONGEST LASER TECH CO LTD
Filing Date
2025-05-19
Publication Date
2026-05-05

AI Technical Summary

Technical Problem

Existing laser PD detection methods suffer from high cost, slow speed, noise superposition, and low sensitivity, making it difficult to meet the safety protection requirements of industrial laser equipment.

Method used

It employs a PD sensor, a resistor voltage divider circuit, a non-inverting amplifier circuit, a comparator circuit, and a voltage reference circuit. Through IV conversion and non-inverting amplification, combined with high-speed FPGA for signal processing, it optimizes the pre-amplifier architecture and the post-reference design, reduces the dependence on feedback resistor accuracy, and improves detection reliability and response rate.

Benefits of technology

It significantly improves the reliability and response rate of detection, reduces costs, and is suitable for safety protection systems of industrial laser equipment, enabling rapid signal processing and visual monitoring.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN224205073U_ABST
    Figure CN224205073U_ABST
Patent Text Reader

Abstract

The utility model relates to a PD detection alarm protection circuit of a laser. The PD detection alarm protection circuit comprises a PD sensor, a resistance voltage division circuit, an in-phase proportion amplification circuit, a comparator circuit and a voltage reference circuit, the PD sensor collects a PD photocurrent signal of the laser and then sends the PD photocurrent signal to the resistance voltage division circuit; the resistance voltage division circuit converts the PD photocurrent signal into a PD voltage signal and then sends the PD voltage signal to the in-phase proportion amplification circuit; the in-phase proportional amplification circuit amplifies the PD voltage signal and then transmits the PD voltage signal to one input end of the comparator circuit, the other input end of the comparator circuit is connected with the voltage reference circuit, and the output end of the comparator circuit outputs a processed PD signal; by optimizing a pre-stage amplification framework and a post-stage reference design, the detection reliability is remarkably improved while the cost is reduced, and the detection response speed is very high. And real-time monitoring can be realized through an upper computer. The system is especially suitable for a safety protection system of industrial laser equipment.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This utility model relates to the field of photoelectric detection laser technology, specifically to a PD detection alarm protection circuit for a laser. Background Technology

[0002] A photodiode (PD) receives a portion of the emitted light from inside a laser (usually through a beam splitter) and converts the light energy into an electrical signal (photocurrent) proportional to the light intensity. Currently, laser PD detection methods primarily employ hardware processing, where the PD signal is triggered by a monostable multivibrator and then processed by an MCU. Traditional methods have the following drawbacks:

[0003] 1. Transimpedance amplifiers require high-precision feedback components, are costly, and require waveform processing, making them suitable for medium- and low-speed detection.

[0004] 2. The MCU detects the PD signal and then controls the laser drive to enable it, which is slow and easily affected by interference.

[0005] 3. The series connection of multiple operational amplifiers leads to noise superposition and a decrease in signal-to-noise ratio.

[0006] 4. Traditional photosensitive surfaces (PDs) are too small, resulting in low sensitivity. Therefore, it is essential to provide a signal processing method for fiber laser PDs to address the aforementioned shortcomings of existing technologies. Utility Model Content

[0007] This utility model addresses the technical problems existing in the prior art by providing a PD detection alarm protection circuit for lasers.

[0008] The technical solution of this utility model to solve the above-mentioned technical problems is as follows: A PD detection alarm protection circuit for a laser includes: a PD sensor, a resistor voltage divider circuit, a non-inverting proportional amplifier circuit, a comparator circuit, and a voltage reference circuit;

[0009] The PD sensor acquires the PD photocurrent signal of the laser and sends it to the resistor divider circuit;

[0010] The resistor divider circuit converts the PD photocurrent signal into a PD voltage signal and then sends it to the in-phase amplifier circuit.

[0011] The non-inverting amplifier circuit amplifies the PD voltage signal and transmits it to one input terminal of the comparator circuit. The other input terminal of the comparator circuit is connected to the voltage reference circuit, and the output terminal of the comparator circuit outputs the processed PD signal.

[0012] The beneficial effects of this invention are: by optimizing the pre-amplifier architecture and the post-amplifier reference design, it significantly improves detection reliability while reducing costs, and the detection response rate is very fast. Furthermore, it can be monitored in real time via a host computer. It is particularly suitable for safety protection systems of industrial laser equipment.

[0013] Based on the above technical solution, the present invention can be further improved as follows.

[0014] Furthermore, the PD sensor is a planar silicon PN photodiode.

[0015] Furthermore, the resistor voltage divider circuit includes: resistor R1 and resistor R3;

[0016] One end of the resistor R1 is connected to the negative terminal of the PD photocurrent signal, and the other end is connected to the power supply VCC.

[0017] One end of the resistor R3 is grounded, and the other end is connected to the positive terminal of the PD photocurrent signal and the input terminal of the in-phase amplifier circuit.

[0018] Furthermore, the non-inverting amplifier includes: a first operational amplifier, resistor R4, and resistor R5;

[0019] The positive input terminal of the first operational amplifier is connected to the output terminal of the resistor divider circuit, and the negative input terminal of the first operational amplifier is grounded through the resistor R4; the resistor R5 is connected between the negative input terminal and the output terminal of the first operational amplifier.

[0020] Furthermore, the first operational amplifier is model SGM8965A-1;

[0021] A sliding adjustable resistor R2 is also connected between the negative input terminal of the first operational amplifier and the resistor R4;

[0022] The negative input terminal of the first operational amplifier is grounded, the positive input terminal of the first operational amplifier is connected to the power supply terminal and one end of capacitor C1, and the other end of capacitor C1 is grounded.

[0023] Furthermore, the comparator circuit includes: a second operational amplifier, an N-channel enhancement-mode field-effect transistor Q1, resistors R11 and R12;

[0024] The negative input terminal of the second operational amplifier receives the amplified PD voltage signal output by the non-inverting amplifier circuit;

[0025] The positive input terminal of the second operational amplifier is connected to the reference voltage Vref output by the voltage reference circuit;

[0026] The output terminal of the second operational amplifier is connected to the gate (G) of the field-effect transistor Q1;

[0027] The source (S) terminal of the field-effect transistor Q1 is grounded, and the drain (D) terminal of the field-effect transistor Q1 is connected to one end of the resistors R11 and R12. The other end of the resistor R11 is grounded, and the other end of the resistor R12 is connected to the power supply terminal. The drain terminal of the field-effect transistor Q1 serves as the port for outputting the processed PD signal.

[0028] Furthermore, the second operational amplifier is model SGM8965A-1; the field-effect transistor Q1 is model 2N7002;

[0029] The negative input terminal of the second operational amplifier is grounded, the positive input terminal of the second operational amplifier is connected to the power supply terminal and one end of capacitor C2, and the other end of capacitor C2 is grounded.

[0030] Furthermore, the voltage reference circuit includes: a voltage reference chip, a voltage divider circuit, and a resistor R13; the voltage divider circuit includes: a resistor R9 and a resistor R10;

[0031] One end of resistors R9 and R10 is connected to the positive input terminal of the second operational amplifier; the other end of resistor R9 is grounded, and the other end of resistor R10 is connected to the output terminal of the voltage reference chip.

[0032] The output terminal of the voltage reference chip is also connected to the power supply through the resistor R13.

[0033] Furthermore, the voltage reference chip is model LM4040AIM3X or LM4040-N.

[0034] Furthermore, the processed PD signal is input to a high-speed FPGA; the high-speed FPGA is model EP4CE10E22C8N.

[0035] The advantages of adopting the above-mentioned further solutions are: the combination of IV conversion and non-inverting amplifier reduces the dependence on the accuracy of the feedback resistor while ensuring gain, and optimizes the topology. Replacing the digital potentiometer with an industrial-grade voltage reference chip improves threshold stability by 80%, enabling a hard-core reference voltage.

[0036] The multi-stage filtering design from the PD probe to the comparator enables the system to reliably detect lasers even in low-light environments, achieving comprehensive noise management. The FPGA high-speed detection + comparator combination shortens the detection time and effectively protects the MOPA fiber laser by rapidly shutting down the driver enable before it is burned out, achieving a high-speed feedback loop. The system provides visual monitoring of the PD acquisition status. Attached Figure Description

[0037] Figure 1 A circuit diagram illustrating an embodiment of a laser PD detection alarm protection circuit provided by this utility model;

[0038] Figure 2 This is a schematic diagram of the host computer display interface of a PD detection alarm protection circuit provided by this utility model. Detailed Implementation

[0039] The principles and features of this utility model are described below with reference to the accompanying drawings. The examples given are only for explaining this utility model and are not intended to limit the scope of this utility model.

[0040] like Figure 1 The diagram shown is a circuit schematic of an embodiment of a PD detection alarm protection circuit for a laser provided by this utility model. Figure 1 It can be seen that the PD detection alarm protection circuit includes: PD sensor, resistor voltage divider circuit, non-inverting amplifier circuit, comparator circuit and voltage reference circuit.

[0041] The PD sensor collects the PD photocurrent signal from the laser and sends it to the resistor divider circuit.

[0042] The resistor divider circuit converts the PD photocurrent signal into a PD voltage signal and then sends it to the in-phase proportional amplifier circuit.

[0043] The non-inverting amplifier circuit amplifies the PD voltage signal and transmits it to one input terminal of the comparator circuit. The other input terminal of the comparator circuit is connected to the voltage reference circuit, and the output terminal of the comparator circuit outputs the processed PD signal.

[0044] This invention provides a PD detection alarm protection circuit for lasers. It employs a non-inverting proportional amplifier circuit and a voltage reference chip to process the PD signal, and a high-speed FPGA to capture the processed PD signal in a 1920nm laser detection system. This system is suitable for MOPA laser power monitoring and high-power laser optical path protection. By optimizing the pre-amplifier architecture and the post-reference design, it significantly improves detection reliability while reducing costs, and the detection response rate is extremely fast. Furthermore, it can be monitored in real-time via a host computer. It is particularly suitable for safety protection systems of industrial laser equipment.

[0045] Example 1

[0046] Embodiment 1 of this utility model is an embodiment of a PD detection alarm protection circuit for a laser provided by this utility model, combined with... Figure 1 It can be seen that the embodiment of the PD detection alarm protection circuit includes: a front-end signal processing module, a rear-end comparator module, and a high-speed FPGQ.

[0047] The pre-amplifier module includes a PD sensor, a resistor divider circuit, and a non-inverting amplifier circuit; the post-amplifier module includes a comparator circuit and a voltage reference circuit.

[0048] The PD sensor collects the PD photocurrent signal from the laser and sends it to the resistor divider circuit.

[0049] The resistor divider circuit converts the PD photocurrent signal into a PD voltage signal and then sends it to the in-phase proportional amplifier circuit.

[0050] The non-inverting amplifier circuit amplifies the PD voltage signal and transmits it to one input terminal of the comparator circuit. The other input terminal of the comparator circuit is connected to the voltage reference circuit, and the output terminal of the comparator circuit outputs the processed PD signal.

[0051] In one possible embodiment, the PD sensor is a planar silicon PN photodiode.

[0052] In practice, the PD sensor uses a high-sensitivity planar silicon PN photodiode with a large photosensitive surface, such as the BPW20RF model. It features a sealed short T0-5 housing, a large photosensitive surface, a planar glass window with a photosensitive area of ​​7.5mm², low dark current, and is designed specifically for high-precision linear applications.

[0053] In one possible embodiment, the resistor divider circuit includes resistors R1 and R3.

[0054] One end of resistor R1 is connected to the negative terminal of the PD photocurrent signal, and the other end is connected to the power supply VCC.

[0055] One end of resistor R3 is grounded, and the other end is connected to the positive terminal of the PD photocurrent signal and the input terminal of the in-phase amplifier circuit.

[0056] In a specific implementation, the parameters of each component in the resistor voltage divider circuit can be: resistor R1 = 1kΩ, R3 = 3.6kΩ, VCC = 5V.

[0057] In one possible embodiment, the non-inverting amplifier includes: a first operational amplifier, resistor R4, and resistor R5.

[0058] The positive input terminal of the first operational amplifier is connected to the output terminal of the resistor divider circuit, and the negative input terminal of the first operational amplifier is grounded through resistor R4; a resistor R5 is connected between the negative input terminal and the output terminal of the first operational amplifier.

[0059] In practice, the gain of the non-inverting amplifier is set by resistors R5 / R4. The specific parameters can be: R5=8.06kΩ, R4=5kΩ, and gain Av=1+R5 / R4 times.

[0060] In one possible embodiment, the first operational amplifier is model SGM8965A-1; SGM8965A-1 is a single-channel high-speed CMOS operational amplifier with high speed and low noise, supports rail-to-rail input and output operation, and features high input impedance, zero crossover and low distortion.

[0061] A sliding adjustable resistor R2 is also connected between the negative input terminal of the first operational amplifier and resistor R4, which can adjust the amplification factor.

[0062] The negative input terminal of the first operational amplifier is grounded, and the positive input terminal of the first operational amplifier is connected to the power supply terminal and one end of capacitor C1. The other end of capacitor C1 is grounded, and a filter capacitor (C1=100nF) is connected in parallel to the power supply terminal to suppress high-frequency noise interference.

[0063] In one possible embodiment, the gain of the non-inverting amplifier is 5 to 40 times, and the output is connected to a low-pass filter consisting of R6=1kΩ and C6=100nF.

[0064] In one possible embodiment, the comparator circuit includes: a second operational amplifier, an N-channel enhancement-mode field-effect transistor Q1, resistors R11 and R12.

[0065] The negative input terminal of the second operational amplifier receives the amplified PD voltage signal output from the non-inverting amplifier circuit.

[0066] The positive input terminal of the second operational amplifier is connected to the reference voltage Vref output by the voltage reference circuit.

[0067] The output of the second operational amplifier is connected to the gate (G) of the field-effect transistor Q1.

[0068] The source (S) terminal of the field-effect transistor Q1 is grounded, and the drain (D) terminal of the field-effect transistor Q1 is connected to one end of resistors R11 and R12. The other end of resistor R11 is grounded, and the other end of resistor R12 is connected to the power supply terminal. The drain terminal of the field-effect transistor Q1 serves as the port for outputting the processed PD signal.

[0069] In one possible embodiment, the second operational amplifier is model SGM8965A-1; the field-effect transistor Q1 is model 2N7002.

[0070] The negative input terminal of the second operational amplifier is grounded, and the positive input terminal of the second operational amplifier is connected to the power supply terminal and one end of capacitor C2. The other end of capacitor C2 is grounded, and a filter capacitor (C2=100nF) is connected in parallel to the power supply terminal to suppress high-frequency noise interference.

[0071] In one possible embodiment, the voltage reference circuit includes: a voltage reference chip, a voltage divider circuit, and a resistor R13; the voltage divider circuit includes: a resistor R9 and a resistor R10.

[0072] One end of resistors R9 and R10 is connected to the positive input terminal of the second operational amplifier; the other end of resistor R9 is grounded, and the other end of resistor R10 is connected to the output terminal of the voltage reference chip.

[0073] The output of the voltage reference chip is also connected to the power supply through resistor R13.

[0074] In practical implementation, the voltage divider circuit is designed with fixed resistors R9 = 4.7kΩ and R10 = 49.9kΩ, with a threshold voltage of 0.2152V. This voltage can also be adjusted by changing R9 and R10.

[0075] In one possible embodiment, the voltage reference chip is model LM4040AIM3X or LM4040-N.

[0076] In practice, the threshold stability enhancement voltage reference chip and the voltage divider resistor use components with the same temperature coefficient (such as ±25ppm / ℃) to enhance threshold stability and reduce the impact of temperature drift.

[0077] The voltage reference chip uses a high-precision reference source (such as LM4040AIM3X-2.5 / NOPB, LM4040-N 100ppm / °C precision low-power parallel voltage reference, output 2.5V±0.1%), which generates an adjustable threshold voltage Vref after being divided by resistors.

[0078] In practice, a 0.1μF decoupling capacitor is added to all operational amplifier power supply pins, and a 4.7μF ceramic capacitor is added to the precision voltage power supply.

[0079] In one possible embodiment, the processed PD signal is input to a high-speed FPGA; the high-speed FPGA is model EP4CE10E22C8N.

[0080] The EP4CE10E22C8N is a high-speed FPGA (Field Programmable Gate Array) with an external 50MHz crystal oscillator, providing an input capture capability of 25MHz even without frequency multiplication.

[0081] Clock frequency: Theoretically, the maximum clock frequency of Cyclone IV E series FPGAs can reach over 200MHz, but the actual input capture resolution depends on the design and actual performance.

[0082] Input logic delay: The input buffer (IO buffer) of the FPGA has a delay of about 1-2ns, and the setup time and hold time of the synchronous flip-flop are usually hundreds of picoseconds. The overall input capture delay can be controlled within 5ns.

[0083] In theory, the detection time of amplifier + comparator + FPGA can be reduced to less than 100ns.

[0084] In one possible embodiment, while the FPGA's acquisition signal enables the laser driver, it can communicate with a host computer via a serial port converter chip to display the PD signal status on a user interface, achieving a visual effect. For example... Figure 2 The diagram shown is a schematic of the host computer display interface of a PD detection alarm protection circuit provided by this utility model. Figure 2 As can be seen, after connecting via serial port, the PD signal is green when normal and red when an alarm occurs. This allows for real-time display.

[0085] This invention provides a 1920nm laser detection circuit, comprising: a planar silicon PN photodiode, a series structure of a pre-stage IV conversion circuit and a non-inverting proportional amplifier; a voltage divider threshold generation module based on a voltage reference chip; a voltage comparator composed of a high-precision high-speed operational amplifier; a high-speed FPGA detection comparator signal controlling the laser driver enable to achieve high-speed feedback control; and a precision voltage divider network composed of adjustable and fixed resistors connected to the output terminal of the voltage reference chip, with a voltage divider ratio error ≤0.5%.

[0086] During specific testing: When the 1920nm laser power is ≥500mW, the in-phase amplifier amplifies by 40 times, resulting in a voltage greater than 0.2V, thus outputting 5V. With Vref set to 0.2V, the comparator outputs a high level. After laser interruption, the output drops below 0.2V, triggering an FPGA alarm and disabling the laser drive signal, theoretically reaching the µS level. A host computer notification is also provided. The embedded + host computer system response time is <5ms, and the threshold temperature drift is <0.01V / ℃.

[0087] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0088] It is understood that spatial relation terms such as "below," "under," "below," "below," "above," "above," etc., can be used here to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms also include different orientations of the device in use and operation. For example, if the device in the figure is flipped, the element or feature described as "below" or "below" of the other element or feature will be oriented "above" the other element or feature. Therefore, the exemplary terms "below" and "below" can include both upper and lower orientations. Furthermore, the device may also include other orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptive terms used herein will be interpreted accordingly.

[0089] It should be noted that when one element is considered to be "connected" to another element, it can be directly connected to the other element or connected to the other element through an intermediary element. In the following embodiments, "connection" should be understood as "electrical connection," "communication connection," etc., if the connected circuits, modules, units, etc., have the transmission of electrical signals or data between them.

[0090] When used here, the singular forms of “a,” “an,” and “ / the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “including / contains” or “having” specify the presence of the stated feature, whole, step, operation, component, part, or combination thereof, but do not preclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof.

[0091] The above are merely preferred embodiments of the present utility model and are not intended to limit the present utility model. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present utility model shall be included within the protection scope of the present utility model.

Claims

1. A PD detection alarm protection circuit for a laser, characterized in that, The PD detection alarm protection circuit includes: a PD sensor, a resistor voltage divider circuit, a non-inverting amplifier circuit, a comparator circuit, and a voltage reference circuit; The PD sensor acquires the PD photocurrent signal of the laser and sends it to the resistor divider circuit; The resistor divider circuit converts the PD photocurrent signal into a PD voltage signal and then sends it to the in-phase amplifier circuit. The non-inverting amplifier circuit amplifies the PD voltage signal and transmits it to one input terminal of the comparator circuit. The other input terminal of the comparator circuit is connected to the voltage reference circuit, and the output terminal of the comparator circuit outputs the processed PD signal.

2. The PD detection alarm protection circuit according to claim 1, characterized in that, The PD sensor is a planar silicon PN photodiode.

3. The PD detection alarm protection circuit according to claim 1, characterized in that, The resistor voltage divider circuit includes: resistor R1 and resistor R3; One end of the resistor R1 is connected to the negative terminal of the PD photocurrent signal, and the other end is connected to the power supply VCC. One end of the resistor R3 is grounded, and the other end is connected to the positive terminal of the PD photocurrent signal and the input terminal of the in-phase amplifier circuit.

4. The PD detection alarm protection circuit according to claim 1, characterized in that, The non-inverting amplifier includes: a first operational amplifier, resistor R4, and resistor R5; The positive input terminal of the first operational amplifier is connected to the output terminal of the resistor divider circuit, and the negative input terminal of the first operational amplifier is grounded through the resistor R4; the resistor R5 is connected between the negative input terminal and the output terminal of the first operational amplifier.

5. The PD detection alarm protection circuit according to claim 4, characterized in that, The first operational amplifier is model SGM8965A-1; A sliding adjustable resistor R2 is also connected between the negative input terminal of the first operational amplifier and the resistor R4; The negative input terminal of the first operational amplifier is grounded, the positive input terminal of the first operational amplifier is connected to the power supply terminal and one end of capacitor C1, and the other end of capacitor C1 is grounded.

6. The PD detection alarm protection circuit according to claim 1, characterized in that, The comparator circuit includes: a second operational amplifier, an N-channel enhancement-mode field-effect transistor Q1, resistors R11 and R12; The negative input terminal of the second operational amplifier receives the amplified PD voltage signal output by the non-inverting amplifier circuit; The positive input terminal of the second operational amplifier is connected to the reference voltage Vref output by the voltage reference circuit; The output terminal of the second operational amplifier is connected to the gate (G) of the field-effect transistor Q1; The source (S) terminal of the field-effect transistor Q1 is grounded, and the drain (D) terminal of the field-effect transistor Q1 is connected to one end of the resistors R11 and R12. The other end of the resistor R11 is grounded, and the other end of the resistor R12 is connected to the power supply terminal. The drain terminal of the field-effect transistor Q1 serves as the port for outputting the processed PD signal.

7. The PD detection alarm protection circuit according to claim 6, characterized in that, The second operational amplifier is model SGM8965A-1; the field-effect transistor Q1 is model 2N7002; The negative input terminal of the second operational amplifier is grounded, the positive input terminal of the second operational amplifier is connected to the power supply terminal and one end of capacitor C2, and the other end of capacitor C2 is grounded.

8. The PD detection alarm protection circuit according to claim 6, characterized in that, The voltage reference circuit includes: a voltage reference chip, a voltage divider circuit, and a resistor R13; the voltage divider circuit includes: a resistor R9 and a resistor R10; One end of resistors R9 and R10 is connected to the positive input terminal of the second operational amplifier; the other end of resistor R9 is grounded, and the other end of resistor R10 is connected to the output terminal of the voltage reference chip. The output terminal of the voltage reference chip is also connected to the power supply through the resistor R13.

9. The PD detection alarm protection circuit according to claim 8, characterized in that, The voltage reference chip is model LM4040AIM3X or LM4040-N.

10. The PD detection alarm protection circuit according to claim 1, characterized in that, The processed PD signal is input to a high-speed FPGA; the high-speed FPGA is model EP4CE10E22C8N.