Relay protection tester voltage source multifunctional protection circuit and tester

By integrating overvoltage, undervoltage, short circuit, and overload protection circuits into the relay protection tester, and employing voltage comparison and optocoupler delay circuit design, the problems of complex circuit design and mutual interference are solved, achieving high-precision, low-cost, and high-stability voltage source output.

CN224233337UActive Publication Date: 2026-05-12GUANGDONG ANGLI ELECTRICAL AUTOMATION CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
GUANGDONG ANGLI ELECTRICAL AUTOMATION CO LTD
Filing Date
2025-05-08
Publication Date
2026-05-12

AI Technical Summary

Technical Problem

The protection circuit design of the voltage source of the existing relay protection tester is complex, costly, prone to mutual interference, and has poor anti-interference ability, making it difficult to achieve high precision and stability.

Method used

The overvoltage, undervoltage, short circuit, and overload protection circuits are integrated into a single circuit structure. A voltage comparison circuit is used for dual threshold collaborative judgment. Combined with an optocoupler delay circuit and an isolation alarm reporting circuit, modular integration is achieved.

Benefits of technology

It simplifies wiring, reduces the number of components, lowers manufacturing costs, enhances circuit structure flexibility and anti-interference capabilities, improves overall reliability and compatibility, and provides a technical foundation for high-precision and high-power output of voltage sources.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model discloses a relay protection tester voltage source multifunctional protection circuit and a tester. The circuit comprises a voltage source power amplification circuit, a voltage comparison circuit, a chip power supply filter circuit, an optocoupler delay circuit and an optocoupler isolation alarm reporting circuit. The optocoupler delay circuit comprises an optocoupler U2, a voltage-regulator tube D2 and a triode Q1, a third pin of the optocoupler U2 is connected with a first pin of the voltage-regulator tube D2, and a second pin and the third pin of the voltage-regulator tube D2 are connected with a first pin of the triode Q1; the optocoupler isolation alarm reporting circuit comprises an optocoupler U3 and a resistor R4, and a fourth pin of the optocoupler U3 is connected to a second pin of the resistor R4 and then connected to an alarm signal reporting GJ end. According to the utility model, multiple protection functions such as overvoltage protection, under-voltage protection, short-circuit protection and overload protection are integrated in a single circuit structure, so that modular integration of a protection system is realized.
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Description

Technical Field

[0001] This utility model belongs to the technical field of relay protection, specifically relating to a multi-functional protection circuit for a voltage source of a relay protection tester and the tester itself. Background Technology

[0002] With the continuous upgrading of relay protection test instruments, the requirements for voltage sources on these instruments have also changed in many ways: improving accuracy, enhancing stability, and increasing output power, among others. Stability and reliability are fundamental guarantees for voltage sources. Therefore, the protection circuitry on the voltage source has become one of the key areas for optimization.

[0003] The protection circuits on a voltage source include overvoltage protection, undervoltage protection, short-circuit protection, and overload protection. These circuits differ in principle, structure, and parameters, and integrating them onto a single board requires a deep understanding of their characteristics and complex circuit design and layout planning. This not only increases design time and cost but also easily leads to mutual interference between circuits due to improper design, affecting the normal operation of the protection functions. The large number of components required for multiple protection circuits increases the manufacturing cost of the voltage source. Furthermore, the large number of components results in limited board space; arranging multiple protection circuits in a confined space complicates the wiring, potentially reducing the distance between lines and increasing the risk of signal crosstalk and electromagnetic interference, affecting the normal operation of the circuit. Therefore, a circuit is needed that integrates overvoltage protection, undervoltage protection, short-circuit protection, and overload protection circuits to achieve multi-functional protection for the voltage source of the relay protection tester. Utility Model Content

[0004] The main purpose of this utility model is to overcome the shortcomings and deficiencies of the prior art and provide a multi-functional protection circuit and tester for voltage source of relay protection tester. By integrating multiple protection functions such as overvoltage protection, undervoltage protection, short circuit protection and overload protection into a single circuit structure, the modular integration of the protection system is realized.

[0005] To achieve the above objectives, the present invention adopts the following technical solution:

[0006] In the first aspect, this utility model provides a multi-functional protection circuit for the voltage source of a relay protection tester, including a voltage source power amplifier circuit, a voltage comparison circuit, a chip power supply filter circuit, an optocoupler delay circuit, and an optocoupler isolation alarm reporting circuit.

[0007] The voltage source power amplifier circuit includes a MOSFET driver module U5 and an operational amplifier U4.1. The MOSFET driver module U5 is connected to the output terminal of the operational amplifier U4.1 and outputs a monitoring signal through the alarm detection signal terminal BJ. The first output terminal of the operational amplifier U4.1 is connected to a transistor Q3, and the second output terminal is connected to a transistor Q2.

[0008] The voltage comparison circuit includes comparator U1.1 and comparator U1.2. Comparator U1.1 and comparator U1.2 respectively receive the BJ terminal signal and the reference voltage jz+ and jz-, and the output terminal forms an AND logic gate through diode D1.

[0009] The chip power supply filtering circuit is configured with capacitors C1 and C2 to perform AGND filtering on power supply V+ and V-.

[0010] The optocoupler delay circuit includes an optocoupler U2, a Zener diode D2, and a transistor Q1. The third pin of the optocoupler U2 is connected to the first pin of the Zener diode D2, and the second and third pins of the Zener diode D2 are connected to the first pin of the transistor Q1.

[0011] The optocoupler isolation alarm reporting circuit includes optocoupler U3 and resistor R4. Pin 4 of optocoupler U3 is connected to pin 2 of resistor R4 and then to the alarm signal reporting GJ terminal.

[0012] As a preferred technical solution, the voltage source power amplifier circuit further includes a voltage source filter circuit, which includes capacitors C4 and C5. One end of capacitors C1 and C2 is grounded and the other end is connected to the external power supply VCC. Pin 1 of capacitor C5 is connected to pin 8 of operational amplifier U4.1.

[0013] As a preferred technical solution, the voltage source power amplifier circuit further includes resistors R5 and R6. Pin 2 of operational amplifier U4.1 is connected to the input signal, pin 3 of operational amplifier U4.1 is connected to pin 1 of resistor R5, pin 2 of resistor R5 is connected to AGND, pin 1 of operational amplifier U4.1 is connected to the alarm detection signal BJ terminal, and then connected to pin 3 of MOSFET driver module U5. Pin 1 of MOSFET driver module U5 is connected to pin 1 of MOSFET Q3, pin 2 of MOSFET driver module U5 is connected to pin 1 of MOSFET Q2, pin 2 of MOSFET Q3 and pin 3 of MOSFET Q2 are connected together and then connected to the output terminal OUT, pin 2 of resistor R6 is connected to pin 1 of R5, and pin 1 of resistor R6 is connected to the output terminal OUT.

[0014] As a preferred technical solution, pin 3 of MOSFET Q3 is connected to power supply VDD, and pin 2 of MOSFET Q2 is connected to power supply VEE.

[0015] As a preferred technical solution, pins 2 and 5 of comparator U1 are connected to the alarm detection signal BJ terminal, pins 3 and 6 of comparator U1 are connected to the reference voltages jz+ and jz- respectively, pins 1 and 7 of comparator U1 are connected to pins 1 and 2 of diode D1 respectively, and pin 3 of diode D1 is connected to pin 2 of U2 in optocoupler delay circuit (4).

[0016] As a preferred technical solution, the chip power supply filtering circuit includes capacitor C1 and capacitor C2. After capacitors C1 and C2 are connected in parallel, one end is grounded and the other end is connected to an external power supply. The end of capacitor C2 connected to the external power supply is also connected to the output terminal of comparator U1.1.

[0017] As a preferred technical solution, the optocoupler delay circuit further includes resistors R1, R2, and R3, and capacitor C3. Pin 1 of optocoupler U2 is connected to pin 2 of resistor R1, pin 4 of U2 is connected to pin 2 of resistor R2, pin 1 of C3 is connected to pin 1 of Zener diode D2 and then to pin 3 of optocoupler U2, pin 2 of capacitor C3 is connected to AGND, pins 2 and 3 of Zener diode D2 are connected to pin 1 of transistor Q1, pin 2 of Q1 is connected to AGND, pin 3 of Q1 is connected to pin 2 of U3 in the optocoupler isolation alarm reporting circuit, and pin 2 of resistor R3 is connected to pin 1 of U3 in the optocoupler isolation alarm reporting circuit.

[0018] As a preferred technical solution, pin 1 of resistor R1 is connected to a 12V power supply, pin 1 of resistor R2 is connected to a 12V power supply, and pin 1 of resistor R3 is connected to a 12V power supply.

[0019] As a preferred technical solution, in the optocoupler isolation alarm reporting circuit, pin 3 of optocoupler U3 is connected to GND.

[0020] Secondly, this utility model provides a relay protection tester, including the aforementioned multi-functional protection circuit for a voltage source of a relay protection tester.

[0021] Compared with the prior art, this utility model has the following advantages and beneficial effects:

[0022] This invention integrates overvoltage, undervoltage, short-circuit, and overload protection circuits into a single-point detection architecture. It utilizes a voltage comparison circuit to perform dual-threshold collaborative judgment on the monitoring signal (BJ terminal), combined with delay filtering by an optocoupler delay circuit and optocoupler isolation alarm reporting, achieving circuit simplification and a significant reduction in the number of components. Its advantages include: simplified wiring through centralized layout, optimized line spacing and width to improve anti-interference capability; reduced component count to lower manufacturing costs and enhance circuit structural flexibility; and reduced mutual interference between multiple protection circuits through integrated design, improving overall reliability and compatibility, thus laying a technical foundation for high precision, high stability, and high-power output of the voltage source. Attached Figure Description

[0023] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0024] Figure 1 This is a structural diagram of the multi-functional protection circuit of the voltage source of the relay protection tester of this utility model.

[0025] Figure 2 This is the circuit diagram of the voltage source power amplifier circuit of this utility model;

[0026] Figure 3 This is a circuit diagram of the voltage comparison circuit, chip power supply filter circuit, optocoupler delay circuit 4, and optocoupler isolation alarm reporting circuit of this utility model.

[0027] Figure 4 This is a schematic diagram of the structure of the relay protection tester of this utility model.

[0028] The following diagrams are labeled as follows: 1. Voltage source power amplifier circuit; 2. Voltage comparator circuit; 3. Chip power supply filter circuit; 4. Optocoupler delay circuit; 5. Optocoupler isolation alarm reporting circuit. Detailed Implementation

[0029] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0030] Please see Figure 1 , Figure 2 and Figure 3 The present invention provides a multi-functional protection circuit for a voltage source of a relay protection tester, comprising a voltage source power amplifier circuit 1, a voltage comparator circuit 2, a chip power supply filter circuit 3, an optocoupler delay circuit 4, and an optocoupler isolation alarm reporting circuit 5. The voltage comparator circuit 2, the chip power supply filter circuit 3, the optocoupler delay circuit 4, and the optocoupler isolation alarm reporting circuit 5 are connected in sequence, and the voltage source power amplifier circuit 1 is connected to the voltage comparator circuit 2.

[0031] Furthermore, the voltage source power amplifier circuit 1 is connected to power supply VDD, VEE, V+, V- and input signal IN, and is mainly used for voltage amplification. For the voltage source multi-functional protection circuit of the relay protection tester, it provides the source of alarm judgment signal.

[0032] Furthermore, the voltage comparison circuit 2 is the core component for alarm judgment. It is connected to pin 1 of U4 in the voltage source power amplifier circuit 1, i.e., the alarm detection signal BJ terminal, and is also externally connected to pin 2 of U2 in the optocoupler delay circuit 4. The main function of the voltage comparison circuit 2 is to determine whether the monitoring signal transmitted from the BJ terminal is normal based on the reference voltages jz- and jz+.

[0033] Understandably, when the monitoring signal from the BJ terminal of voltage source power amplifier circuit 1 is biased towards V+, the monitoring signal from the BJ terminal of voltage source power amplifier circuit 1 will be greater than jz+ and jz-, causing comparator U1.1 to output a low level and comparator U1.2 to output a high level. Conversely, when the monitoring signal from the BJ terminal of voltage source power amplifier circuit 1 is biased towards V-, the monitoring signal from the BJ terminal of voltage source power amplifier circuit 1 will be less than jz+ and jz-, causing comparator U1.1 to output a high level and comparator U1.2 to output a low level. Due to the presence of diode D1, the outputs of U1.1 and U1.2 are ANDed. Therefore, when the monitoring signal from the BJ terminal is abnormal, D1 can pull down the potential of pin 2 of U2 in optocoupler delay circuit 4, enabling U2 in optocoupler delay circuit 4 to operate, thus turning on pins 3 and 4 of U2 in optocoupler delay circuit 4.

[0034] Furthermore, the chip power supply filter circuit 3 is connected to power supplies V+ and V-, and then connected to AGND through pins 2 of C2 and C1. The main function of the chip power supply filter circuit 3 is to filter the power supply, so that the control signal is protected from power supply noise interference, and a clean and stable operating voltage is provided for the voltage comparison circuit 2.

[0035] Furthermore, the optocoupler delay circuit 4 is connected to a 12V power supply and is controlled by the voltage comparator circuit 2. When D1 in the voltage comparator circuit 2 is turned on, it pulls down the potential of pin 2 of U2 in the optocoupler delay circuit 4, and U2 works. Pins 3 and 4 of U2 will be connected, and 12V will charge C3 through R2. This charging process plays a delaying role, mainly to prevent an interference signal from suddenly coupling into the BJ terminal of the voltage source power amplifier circuit 1, causing Q1 in the optocoupler delay circuit 4 to turn on, thereby generating an incorrect alarm reporting signal.

[0036] Furthermore, the aforementioned optocoupler isolation alarm reporting circuit 5 is connected to the power supply VCC and is connected to pin 3 of Q1 and pin 2 of R3 in the optocoupler delay circuit 4. When Q1 in the optocoupler delay circuit 4 is turned on, it will pull down the potential of pin 2 of U3 in the optocoupler isolation alarm reporting circuit 5, thereby enabling U3 in the optocoupler isolation alarm reporting circuit 5 to work. Pins 3 and 4 of U3 will be turned on, pulling the GJ terminal, which is pulled up to a high level through R4, to GND and transmitting a low level, thereby realizing the alarm.

[0037] Understandably, when an abnormal signal is received from the monitoring signal terminal BJ, the comparator circuit will output a low level. This low level is then pulled down by diode D1, causing optocoupler U2 to operate. The output terminal of U2 is closed, and the 12V power supply charges capacitor C3 through resistor R2, providing a certain delay. When the voltage on capacitor C3 exceeds the voltage regulation value of Zener diode D2, D2 breaks down, supplying power to transistor Q1. Q1 is energized and conducts, causing optocoupler U3 to operate. Pins 3 and 4 of U3 will then conduct, pulling the GJ terminal, which is pulled up to a high level through R4, to GND, thus transmitting a low level and triggering an alarm.

[0038] Combination Figure 2 As shown in the attached diagram, the voltage source power amplifier circuit 1 includes operational amplifier U4.1, MOSFET driver module U5, transistors Q3 and Q2, capacitors C4 and C5, resistors R5 and R6. Pins 2 of capacitors C4 and C5 are connected to AGND. Pin 1 of C5 is connected to the positive power supply V+, and then to pin 8 of operational amplifier U4.1. Pin 1 of C4 is connected to the negative power supply V-, and then to pin 4 of operational amplifier U4. Pin 2 of operational amplifier U4 is connected to the input signal. Pin 3 of operational amplifier U4 is connected to pin 1 of resistor R5. Pin 2 of resistor R5 is connected to AGND. ND, pin 1 of op-amp U4 is connected to the alarm detection signal BJ terminal, and then connected to pin 3 of MOSFET driver module U5. Pin 1 of MOSFET driver module U5 is connected to pin 1 of MOSFET Q3. Pin 2 of MOSFET driver module U5 is connected to pin 1 of MOSFET Q2. Pin 2 of MOSFET Q3 and pin 3 of MOSFET Q2 are connected to the output terminal OUT. Pin 3 of MOSFET Q3 is connected to power supply VDD. Pin 2 of MOSFET Q2 is connected to power supply VEE. Pin 2 of resistor R6 is connected to pin 1 of R5. Pin 1 of resistor R6 is connected to the output terminal OUT.

[0039] Combination Figure 3 As shown, the voltage comparison circuit 2 includes comparator U1.1, comparator U1.2 and diode D1. Pins 2 and 5 of comparator U1 are connected to the alarm detection signal BJ terminal. Pins 3 and 6 of comparator U1 are connected to the reference voltages jz+ and jz-, respectively. Pins 1 and 7 of comparator U1 are connected to pins 1 and 2 of diode D1, respectively. Pin 3 of diode D1 is connected to pin 2 of U2 in optocoupler delay circuit 4.

[0040] Combination Figure 3 As shown, the chip power supply filtering circuit includes capacitor C1 and capacitor C2. The two pins of capacitor C1 and capacitor C2 are connected to AGND. The pin 1 of C1 is connected to the positive power supply V+ and then to pin 8 of comparator U1. The pin 1 of C2 is connected to the negative power supply V- and then to pin 4 of comparator U1.

[0041] Combination Figure 3 As shown, the optocoupler delay circuit 4 includes optocoupler U2, Zener diode D2, transistor Q1, resistors R1, R2, and R3, and capacitor C3. Pin 1 of U2 is connected to pin 2 of resistor R1, which is connected to a 12V power supply. Pin 4 of U2 is connected to pin 2 of resistor R2, which is connected to a 12V power supply. Pin 1 of C3 is connected to pin 1 of Zener diode D2 and then to pin 3 of U2. Pin 2 of C3 is connected to AGND. Pins 2 and 3 of D2 are connected to pin 1 of transistor Q1, which is connected to AGND. Pin 3 of Q1 is connected to pin 2 of U3 in the optocoupler isolation alarm reporting circuit 5. Pin 1 of resistor R3 is connected to a 12V power supply, and pin 2 of resistor R3 is connected to pin 1 of U3 in the optocoupler isolation alarm reporting circuit 5.

[0042] Combination Figure 3 As shown, the optocoupler isolation alarm reporting circuit 5 includes an optocoupler U3 and a resistor R4. Pin 3 of U3 is connected to GND, pin 4 of U3 is connected to pin 2 of resistor R4 and then to the alarm signal reporting GJ terminal, and pin 1 of resistor R4 is connected to the power supply VCC.

[0043] This invention integrates overvoltage, undervoltage, short-circuit, and overload protection functions into a single-point detection architecture through integrated design. Its core working principle is as follows: the monitoring terminal (BJ terminal) of the voltage source power amplifier circuit acquires the output signal in real time. A dual threshold comparison circuit (jz+ / jz-) synchronously determines the overvoltage or undervoltage state. An abnormal signal triggers an optocoupler delay circuit for double delay with an RC-Zn diode to filter transient interference. After confirming the fault, the optocoupler isolation circuit pulls the alarm signal (GJ terminal) low, achieving electrical isolation and reporting. This design, through a single-point signal multi-dimensional decision mechanism, simplifies components while improving the protection response speed to the millisecond level. Furthermore, optocoupler isolation and intelligent delay technology reduce the false alarm rate, significantly improving circuit stability and anti-interference capabilities.

[0044] Please see Figure 4 In another embodiment of this application, a relay protection tester is also provided. The relay protection tester includes the aforementioned multi-functional protection circuit for a voltage source of a relay protection tester. The circuit includes a voltage source power amplifier circuit 1, a voltage comparison circuit 2, a chip power supply filter circuit 3, an optocoupler delay circuit 4, and an optocoupler isolation alarm reporting circuit 5.

[0045] The voltage source power amplifier circuit 1 includes a MOS transistor driver module U5 and an operational amplifier U4.1. The MOS transistor driver module U5 is connected to the output terminal of the operational amplifier U4.1 and outputs a monitoring signal through the alarm detection signal BJ. The first output terminal of the operational amplifier U4.1 is connected to a transistor Q3, and the second output terminal is connected to a transistor Q2.

[0046] The voltage comparison circuit 2 includes comparator U1.1 and comparator U1.2. Comparator U1.1 and comparator U1.2 respectively receive the BJ terminal signal and the reference voltage jz+ and jz-, and the output terminal is connected to an AND logic gate via diode D1.

[0047] The chip power supply filter circuit 3 is configured with capacitors C1 and C2 to perform AGND filtering on power supply V+ and V-.

[0048] The optocoupler delay circuit 4 includes an optocoupler U2, a Zener diode D2, and a transistor Q1. The third pin of the optocoupler U2 is connected to the first pin of the Zener diode D2, and the second and third pins of the Zener diode D2 are connected to the first pin of the transistor Q1.

[0049] The optocoupler isolation alarm reporting circuit 5 includes an optocoupler U3 and a resistor R4. The fourth pin of the optocoupler U3 is connected to the second pin of the resistor R4 and then to the alarm signal reporting GJ terminal.

[0050] It should be noted that in this specification, relational terms such as resistor R1 and resistor R2 are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0051] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0052] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A multi-functional protection circuit for a voltage source of a relay protection tester, characterized in that, It includes a voltage source power amplifier circuit (1), a voltage comparator circuit (2), a chip power supply filter circuit (3), an optocoupler delay circuit (4), and an optocoupler isolation alarm reporting circuit (5). The voltage source power amplifier circuit (1) includes a MOS transistor driving module U5 and an operational amplifier U4.

1. The MOS transistor driving module U5 is connected to the output terminal of the operational amplifier U4.1 and outputs a monitoring signal through the alarm detection signal terminal BJ. The first output terminal of the operational amplifier U4.1 is connected to a transistor Q3, and the second output terminal is connected to a transistor Q2. The voltage comparison circuit (2) includes comparator U1.1 and comparator U1.

2. Comparator U1.1 and comparator U1.2 respectively receive the BJ terminal signal and the reference voltage jz+ and jz-, and the output terminal is connected to a logic gate via diode D1. The chip power supply filtering circuit (3) is configured with capacitors C1 and C2 to perform AGND filtering on power supply V+ and V-. The optocoupler delay circuit (4) includes an optocoupler U2, a Zener diode D2 and a transistor Q1. The third pin of the optocoupler U2 is connected to the first pin of the Zener diode D2, and the second and third pins of the Zener diode D2 are connected to the first pin of the transistor Q1. The optocoupler isolation alarm reporting circuit (5) includes optocoupler U3 and resistor R4. Pin 4 of optocoupler U3 is connected to pin 2 of resistor R4 and then to the alarm signal reporting GJ terminal.

2. The multi-functional protection circuit for the voltage source of a relay protection tester according to claim 1, characterized in that, The voltage source power amplifier circuit (1) also includes a voltage source filter circuit, which includes capacitor C4 and capacitor C5. One end of capacitors C1 and C2 is grounded and the other end is connected to the external power supply VCC. The first pin of capacitor C5 is connected to the 8th pin of operational amplifier U4.

1.

3. The multi-functional protection circuit for the voltage source of a relay protection tester according to claim 1, characterized in that, The voltage source power amplifier circuit (1) also includes resistors R5 and R6. Pin 2 of operational amplifier U4.1 is connected to the input signal, pin 3 of operational amplifier U4.1 is connected to pin 1 of resistor R5, pin 2 of resistor R5 is connected to AGND, pin 1 of operational amplifier U4.1 is connected to the alarm detection signal BJ terminal, and then connected to pin 3 of MOS transistor driver module U5. Pin 1 of MOS transistor driver module U5 is connected to pin 1 of MOS transistor Q3, pin 2 of MOS transistor driver module U5 is connected to pin 1 of MOS transistor Q2, pin 2 of MOS transistor Q3 and pin 3 of MOS transistor Q2 are connected together and then connected to the output terminal OUT, pin 2 of resistor R6 is connected to pin 1 of R5, and pin 1 of resistor R6 is connected to the output terminal OUT.

4. The multi-functional protection circuit for the voltage source of a relay protection tester according to claim 3, characterized in that, Pin 3 of MOSFET Q3 is connected to power supply VDD, and pin 2 of MOSFET Q2 is connected to power supply VEE.

5. The multi-functional protection circuit for the voltage source of a relay protection tester according to claim 1, characterized in that, Pins 2 and 5 of comparator U1 are connected to the alarm detection signal BJ terminal. Pins 3 and 6 of comparator U1 are connected to the reference voltages jz+ and jz- respectively. Pins 1 and 7 of comparator U1 are connected to pins 1 and 2 of diode D1 respectively. Pin 3 of diode D1 is connected to pin 2 of U2 in optocoupler delay circuit (4).

6. The multi-functional protection circuit for the voltage source of a relay protection tester according to claim 1, characterized in that, The chip power filter circuit (3) includes capacitor C1 and capacitor C2. After capacitors C1 and C2 are connected in parallel, one end is grounded and the other end is connected to an external power supply. The end of capacitor C2 connected to the external power supply is also connected to the output terminal of comparator U1.

1.

7. The multi-functional protection circuit for the voltage source of a relay protection tester according to claim 1, characterized in that, The optocoupler delay circuit (4) also includes resistors R1, R2, R3 and capacitor C3. Pin 1 of optocoupler U2 is connected to pin 2 of resistor R1, pin 4 of U2 is connected to pin 2 of resistor R2, pin 1 of C3 is connected to pin 1 of Zener diode D2 and then to pin 3 of optocoupler U2, pin 2 of capacitor C3 is connected to AGND, pins 2 and 3 of Zener diode D2 are connected to pin 1 of transistor Q1, pin 2 of Q1 is connected to AGND, pin 3 of Q1 is connected to pin 2 of U3 in optocoupler isolation alarm reporting circuit (5), and pin 2 of resistor R3 is connected to pin 1 of U3 in optocoupler isolation alarm reporting circuit (5).

8. The multi-functional protection circuit for the voltage source of a relay protection tester according to claim 7, characterized in that, Pin 1 of resistor R1 is connected to a 12V power supply, pin 1 of resistor R2 is connected to a 12V power supply, and pin 1 of resistor R3 is connected to a 12V power supply.

9. The multi-functional protection circuit for the voltage source of a relay protection tester according to claim 1, characterized in that, In the optocoupler isolation alarm reporting circuit (5), pin 3 of optocoupler U3 is connected to GND.

10. A relay protection tester, characterized in that, The present invention includes a multi-functional protection circuit for a voltage source of a relay protection tester, as described in any one of claims 1-9.