Current limiting control circuit and concentrator

Abstract

The utility model relates to a current-limiting control circuit and a concentrator, and the circuit comprises a current-limiting chip, the output end of which is connected with at least one target port; two ends of the first branch circuit are respectively connected with a current limiting pin of the current limiting chip and the ground, and the first branch circuit comprises a first resistor; the second branch and the first branch are connected in parallel between the current limiting pin and the ground; the second branch comprises a gating module and a second resistor which are connected in series, the first end of the gating module is connected with an enabling control pin of the current limiting chip, and the second end and the third end of the gating module are connected with the second resistor and the ground respectively; and the current limiting chip is used for adjusting the current output to the target port by controlling the on-off of the gating module. Therefore, access of the second resistor is flexibly controlled through the gating module, so that the magnitude of the current output to the port is flexibly adjusted.

Description

Technical Field

[0001] This application relates to the field of electronic equipment technology, and in particular to a current limiting control circuit and a hub. Background Technology

[0002] Currently, in the design of hub products, because data ports require external devices, the output power of a fixed port in the hub is first deducted from the input power, then deducted from the motherboard's power consumption, and only the remaining power is used to charge the devices. Especially in complex hub products, where there are many data ports and the total power is large, if not every port is used, pre-deducting the fixed power often requires a large power adapter or the charging power is insufficient to meet the demand. Utility Model Content

[0003] This application provides a current limiting control circuit and a hub to solve the technical problem of high power loss.

[0004] In a first aspect, this application provides a current limiting control circuit, the circuit comprising: a current limiting chip, the output terminal of the current limiting chip being connected to at least one target port; a first branch, the two ends of the first branch being respectively connected to a current limiting pin of the current limiting chip and ground, the first branch including a first resistor; at least one second branch, the second branch being connected in parallel with the first branch between the current limiting pin and ground; the second branch including a gating module and a second resistor connected in series, the first end of the gating module being connected to an enable control pin of the current limiting chip, the second end and the third end of the gating module being respectively connected to the second resistor and ground; the current limiting chip is used to regulate the current output to the target port by controlling the on / off state of the gating module.

[0005] In one possible implementation, the gating module is a transistor or a metal-oxide-semiconductor field-effect transistor (MOSFET); the first terminal of the gating module is the base of the transistor or the gate of the MOSFET.

[0006] In one possible implementation, when the circuit includes multiple second branches, the resistance values ​​of the second resistors in different second branches are different; the current limiting chip is used to control the gating module of the second branch to be turned on by outputting an enable signal, and when the resistance value of the second resistor in the second branch is greater than a predetermined value, the current value of the current output to the target port is reduced; the current limiting chip is used to control the gating module of the second branch to be turned on by outputting an enable signal, and when the resistance value of the second resistor in the second branch is less than a predetermined value, the current value of the current output to the target port is increased.

[0007] In one possible implementation, the circuit further includes: a first detection module; the current limiting chip is connected to the target port through the first detection module; the current limiting chip is used to control the gating module of the second branch to be turned on by outputting an enable signal when the first detection module detects that no device is connected to the target port.

[0008] In one possible implementation, the circuit further includes: a second detection module; the current limiting chip is also connected to the second detection module, and the current limiting chip is used to control the gating module of the second branch to be turned on by outputting an enable signal when a predetermined operation is detected by the second detection module.

[0009] In one possible implementation, the target port is a data port.

[0010] In one possible implementation, the current limiting chip is a microcontroller unit (MCU) or a proportional-derivative (PD) controller.

[0011] In one possible implementation, the current limiting control circuit includes: a plurality of the current limiting chips; each of the current limiting chips is connected to the first branch and at least one of the second branches.

[0012] Secondly, this application provides a hub including at least one target port and the current limiting control circuit described in any of the first aspects above.

[0013] In one possible implementation, one of the target ports is connected to a plurality of the current limiting control circuits, and the plurality of the current limiting control circuits are connected in parallel.

[0014] Compared with the prior art, the technical solution provided in this application has the following advantages: The current limiting control circuit provided in this application includes: a current limiting chip, the output terminal of which is connected to at least one target port; a first branch, the two ends of which are respectively connected to the current limiting pin of the current limiting chip and ground, and the first branch includes a first resistor; at least one second branch, which is connected in parallel with the first branch between the current limiting pin and ground; the second branch includes a gating module and a second resistor connected in series, the first end of which is connected to the enable control pin of the current limiting chip, and the second and third ends of which are respectively connected to the second resistor and ground; the current limiting chip is used to regulate the current output to the target port by controlling the on / off state of the gating module. In this way, by controlling the on / off state of the selection module of the multi-level parallel branch, it is possible to flexibly control whether the multi-level parallel resistor is connected to the current limiting chip. Moreover, the current limiting chip can flexibly select the second branch where the required second resistor is located through the enable control pin, thereby adjusting the current output of the current limiting chip to the target port to regulate the output power and avoid the fixed output power causing a large power deduction when the port is not in use, thus reducing unnecessary resource waste. Attached Figure Description

[0015] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0016] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] One or more embodiments are illustrated by way of example with reference numerals in the accompanying drawings. These illustrations do not constitute a limitation on the embodiments. Elements with the same reference numerals in the drawings are denoted as similar elements. Unless otherwise stated, the figures in the drawings are not to be limited by scale.

[0018] Figure 1 This is a schematic diagram of a current limiting control circuit provided in an embodiment of this application;

[0019] Figure 2 This is a schematic diagram of a current limiting control circuit provided in an embodiment of this application;

[0020] Figure 3 A schematic diagram of a hub provided in an embodiment of this application;

[0021] Figure 4 This is a schematic diagram of the structure of a hub provided in an embodiment of this application.

[0022] Explanation of reference numerals in the attached figures

[0023] 1. Current limiting chip; 2. First branch; 3. Second branch; 4. Target port; 11. Current limiting pin; 12. Enable control pin; 21. First resistor; 31. Gating module; 32. Second resistor. Detailed Implementation

[0024] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application. It should be noted that, unless otherwise specified, the embodiments and features in the embodiments of this application can be combined with each other.

[0025] The following disclosure provides numerous different embodiments or examples for implementing various structures of this application. To simplify the disclosure, specific examples of components and arrangements are described below. These are merely examples and are not intended to limit the scope of this application. Furthermore, reference numerals and / or letters may be repeated in different examples. Such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed.

[0026] To address the technical problem of high power loss in existing technologies, this application provides a current limiting control circuit and a hub. The circuit controls the on / off state of multiple parallel branches through a current limiting chip, and a second resistor is connected in the circuit to change the total resistance of the circuit, thereby adjusting the output current.

[0027] Figure 1 A current limiting control circuit is provided in this embodiment, such as Figure 1 As shown, the circuit may include:

[0028] Current limiting chip 1, the output of current limiting chip 1 is connected to at least one target port 4;

[0029] The first branch 2 has its two ends connected to the current limiting pin 11 of the current limiting chip 1 and ground, respectively. The first branch 2 includes a first resistor 21.

[0030] At least one second branch 3 is connected in parallel with the first branch 2 between the current limiting pin 11 and ground; the second branch 3 includes a gating module 31 and a second resistor 32 connected in series, the first end of the gating module 31 is connected to the enable control pin 12 of the current limiting chip 1, and the second and third ends of the gating module 31 are connected to the second resistor 32 and ground, respectively.

[0031] The current limiting chip 1 is used to regulate the current output to the target port 4 by controlling the on / off state of the gating module 31.

[0032] In this embodiment, the aforementioned current limiting control circuit can be applied to hubs, routers, repeaters, switches, power banks, or other devices with data transmission and / or charging functions. Here, a hub is also called a HUB or Dock, mainly used to regenerate, shape, amplify, or convert received signals to extend the network transmission distance and perform signal mode conversion, etc.

[0033] In one embodiment, target port 4 can be an uplink port or a downlink port, used to connect devices, such as computers, mobile phones, or other devices. Target port 4 can be a data port, or it can be a charging port, etc.

[0034] In one embodiment, the output of the current limiting control circuit can be connected to one or more target ports 4 to adjust the magnitude of the current output to one or more target ports 4, thereby controlling the output power to one or more target ports 4.

[0035] Here, the current limiting chip 1 can be a microcontroller unit (MCU) or a proportional-differential (PD) controller, such as the ETA2808 chip.

[0036] In one embodiment, the output terminal of the current limiting chip 1 can be its current output terminal, such as the output VOUT pin. Correspondingly, the current limiting chip 1 may also include an input terminal, such as the input VIN pin. The current limiting ILIM pin of the current limiting chip 1 can also be an overcurrent protection pin, and the enable control EN pin can be used to output an enable signal.

[0037] In one embodiment, the first branch 2 and at least one second branch 3 can be connected in parallel between the current limiting pin 11 of the current limiting chip 1 and ground. The first branch 2 includes a first resistor 21, and the second branch includes a gating module 31 and a second resistor 32. The gating module 31 can be turned on or off by an enable signal output from the enable control pin 12. For example, the gating module 31 is turned on when the enable signal is high and turned off when the enable signal is low.

[0038] In one embodiment, the gating module 31 is connected to the current limiting chip 1, which can mean that it is connected to the enable control pin 12 of the current limiting chip 1. Controlling the on / off state of the gating module 31 can mean outputting an enable signal to control the on / off state of the gating module 31, such as outputting a high-level enable signal to control the gating module 31 to be turned on, and outputting a low-level enable signal to control the gating module 31 to be turned off, etc.

[0039] In one embodiment, when the gating module 31 in the second branch 3 is turned off, the second resistor 32 in the second branch 3 is not connected to the current limiting chip 1, and the total resistance connected to the current limiting chip 1 is equal to the resistance of the first resistor 21, for example, Rx.

[0040] In one embodiment, when the selection module 31 in the second branch 3 is turned on, the second resistor 32 in the second branch 3 is connected to the current limiting chip 1. The second resistor 32 is connected in parallel with the first resistor 21. The total resistance value connected to the current limiting chip 1 changes. For example, if the resistance value of the second resistor 32 is R1, then the total resistance value connected to the current limiting chip 1 becomes R = Rx * R1 / (Rx + R1), thereby changing the magnitude of the current output to the target port 4.

[0041] In one embodiment, the first end of the gating module 31 is the control end of the gating module 31, used to control the on / off state of the gating module 31. The second end of the gating module 31 can be an input end, connected to the second resistor 32. The third end can be an output end, grounded.

[0042] In one embodiment, the enable control pin 12 is used to output an enable signal, which is used to control the on and off of the gating module.

[0043] In one embodiment, when the current limiting chip 1 outputs a low-level enable signal to the first terminal of the gating module 31 via the enable control pin 12, the gating module 31 is turned off, and the first resistor 21 is connected to the current limiting chip 1. When the current limiting chip 1 outputs a high-level enable signal via the enable control pin 12, the gating module 31 is turned on, and the second resistor 32 is connected in parallel with the first resistor 21 to the current limiting chip 1 to regulate the current output to the target port 4.

[0044] In one embodiment, the resistance values ​​of the second resistors 32 in the plurality of second branches 3 may be the same or different. For example, in the plurality of second branches 3, some of the second resistors 32 may have a resistance value greater than that of the first resistor 21, while the resistance values ​​of the second resistors 32 in the remaining second branches 3 may be less than that of the first resistor 21.

[0045] In one embodiment, the second resistor 32 can be a variable resistor, and the current limiting chip 1 can adjust the resistance value of the second resistor 32 according to the required current value.

[0046] In this way, by controlling the on / off state of the selection module 31 of the multi-stage parallel branch through the current limiting chip 1, the connection of the multi-stage parallel resistors to the current limiting chip 1 can be flexibly controlled, thereby causing a change in the total resistance value connected to the current limiting chip 1, adjusting the current output of the current limiting chip 1 to the target port 4, so as to adjust the output power of the target port 4, avoiding the fixed output power that would result in a large power deduction even when the port is not in use, and reducing unnecessary resource waste.

[0047] In some embodiments, the gating module 31 is a transistor or a metal-oxide-semiconductor field-effect transistor (MOSFET); the first terminal of the gating module 31 is the base of the transistor or the gate of the MOSFET.

[0048] In one embodiment, when the selection module 31 is a transistor, the first end is the base, the second end can be the collector, and the third end can be the emitter.

[0049] In one embodiment, when the gating module 31 is a MOSFET, the first terminal is the gate, the second terminal can be the drain, and the third terminal can be the source.

[0050] In this way, the switching on and off of transistors or MOSFETs can be controlled by changing the high or low level of the enable signal, thereby quickly and accurately controlling the resistor connection and improving control efficiency.

[0051] In some embodiments, a current limiting chip 1 for connecting a target port 4 is connected to a plurality of second branches 3, and the plurality of second branches 3 are connected in parallel between the current limiting pin 11 and ground.

[0052] In one embodiment, a current limiting chip 1 can be connected to one or more target ports 4, and a target port 4 is connected to a current limiting chip 1. A target port 4 can be connected to multiple second branches 3 through the current limiting chip 1, and the multiple second branches 3 connected to a target port 4 can be connected in parallel.

[0053] In one embodiment, for a target port 4 connected to multiple second branches 3 via a current limiting chip, the resistance values ​​of the second resistors 32 in different second branches 3 may be different.

[0054] In one embodiment, the current limiting chip 1 can be used to control the gating module 31 of the second branch 3 to be turned on by outputting an enable signal, and when the resistance value of the second resistor 32 in the second branch 3 is greater than a predetermined value, the current value of the current output to the target port 4 is reduced; the current limiting chip 1 can be used to control the gating module 31 of the second branch 3 to be turned on by outputting an enable signal, and when the resistance value of the second resistor 32 in the second branch 3 is less than a predetermined value, the current value of the current output to the target port 4 is increased.

[0055] In one embodiment, for a target port 4 connected to multiple second branches 3 via a current limiting chip, the resistance values ​​of the second resistors 32 in different second branches 3 can be the same.

[0056] In one embodiment, the current limiting chip 1 can be used to control the selection module 31 of the second branch 3 to conduct by outputting an enable signal, and when the number of the second branch 3 that is conducted is less than or equal to a predetermined number, the current value of the current output to the target port 4 is reduced; the current limiting chip 1 can also be used to control the selection module 31 of the second branch 3 to conduct by outputting an enable signal, and when the number of the second branch 3 that is conducted is greater than a predetermined number, the current value of the current output to the target port 4 is increased.

[0057] Thus, for a target port 4, multiple second branches 3 can be used to form a multi-level current limiting circuit. The selective conduction of the multi-level current limiting circuit can achieve flexible control of the branch resistance of the port, thereby enabling precise current limiting control for each port independently and flexibly, further improving the flexibility of current limiting control.

[0058] In one embodiment, when the circuit includes multiple second branches 3, the resistance values ​​of the second resistors 32 in different second branches 3 are different; the current limiting chip 1 is used to control the gating module 31 of the second branch 3 to be turned on by outputting an enable signal, and when the resistance value of the second resistor 32 in the second branch 3 is greater than a predetermined value, the current value of the current output to the target port 4 is reduced; the current limiting chip 1 is used to control the gating module 31 of the second branch 3 to be turned on by outputting an enable signal, and when the resistance value of the second resistor 32 in the second branch 3 is less than a predetermined value, the current value of the current output to the target port 4 is increased.

[0059] In one embodiment, the predetermined value can be a fixed value, such as the resistance value of the first resistor 21, or it can be determined based on the resistance value of the first resistor 21, such as the reciprocal of the resistance value of the first resistor 21 or a predetermined ratio.

[0060] In one embodiment, a first number of second branches 3 have second resistors 32 with resistance values ​​greater than a predetermined value, and a second number of second branches 3 have second resistors 32 with resistance values ​​less than a predetermined value. The sum of the first number and the second number may equal the total number of second branches 3 in the circuit.

[0061] In this way, the current limiting chip 1 can increase or decrease the output current value as needed, and flexibly select the second branch 3 where the second resistor 32 is located to conduct, thereby further improving the control flexibility.

[0062] In some embodiments, the circuit further includes: a first detection module; a current limiting chip 1 connected to the target port 4 through the first detection module; the current limiting chip 1 is used to control the gating module 31 of the second branch 3 to be turned on by outputting an enable signal when the first detection module detects that no device is connected to the target port 4.

[0063] In one embodiment, the first detection module may include a power delivery (PD) adapter or other detection circuitry. Target port 4 may be a data port.

[0064] In one embodiment, when the target port 4 is a Type-C port, the first detection module detects that no device is connected to the target port 4. This can mean that the first detection module detects that no device is connected to the target port 4 based on the CC pin.

[0065] Thus, when no device is detected connected to target port 4, the output current can be reduced by connecting a parallel resistor, thereby reducing the power of the port and avoiding excessive power deduction that would lead to resource waste.

[0066] In some embodiments, the circuit further includes: a second detection module; the current limiting chip 1 is also connected to the second detection module, and the current limiting chip 1 is used to control the gating module 31 of the second branch 3 to be turned on by outputting an enable signal when a predetermined operation is detected by the second detection module.

[0067] In one embodiment, the predetermined operation may include a key press, an input operation, a selection operation, or other types of indication operation. The predetermined operation may instruct the target port 4 not to perform data transmission operations or not to connect to a device, such as instructing to start a charging operation.

[0068] In one embodiment, when the gating module 31 of the second branch 3 is turned on, the current limiting chip 1 is also used to control the gating module 31 of the second branch 3 to turn off by outputting an enable signal when a predetermined operation is detected by the second detection module. Here, the predetermined operation may also indicate the end of charging operation, etc.

[0069] In this way, user instructions can be received more quickly and directly through button operation, eliminating the need to detect whether each port is connected to a device, and allowing for rapid control of current adjustment.

[0070] In some embodiments, target port 4 is a data port.

[0071] Here, the data port can be a data transmission port used to connect to devices such as computers and mobile phones. For example, a data port can include a USB_A port and a Type-C port.

[0072] In one embodiment, the current limiting chip 1 is a microcontroller unit (MCU) or a proportional-derivative (PD) controller.

[0073] In some embodiments, such as Figure 2 As shown, the current limiting control circuit may include: multiple current limiting chips 1; each current limiting chip 1 is connected to a first branch 2 and at least one second branch 3.

[0074] Here, each current limiting chip 1 can be connected to one target port 4, or each current limiting chip 1 can be connected to multiple target ports 4. Different current limiting chips 1 are connected to different target ports 4.

[0075] In one embodiment, the number of second branches 3 connected to different current limiting chips 1 can be the same or different.

[0076] In this way, by setting multiple current limiting chips 1, precise control can be made for different target ports 4, thereby improving the accuracy and flexibility of current limiting control.

[0077] This application also provides a hub including at least one target port 4 and the current limiting control circuit described in any one or more of the foregoing embodiments.

[0078] Here, the hub may include one or more current limiting control circuits. One current limiting control circuit can be connected to one or more target ports 4, and different current limiting control circuits can be connected to different target ports 4.

[0079] In some embodiments, a target port 4 is connected to multiple current limiting control circuits, and the multiple current limiting control circuits are connected in parallel.

[0080] Here, "multiple current limiting control circuits connected in parallel" refers to multiple current limiting control circuits connected in parallel to the same target port 4. Multiple current limiting control circuits are connected in parallel to one target port 4, and the target port 4 connected to the multiple current limiting control circuits in the hub can be one or more. Specifically, the multiple current limiting chips 1 corresponding to the multiple current limiting control circuits are connected in parallel to one target port 4.

[0081] In one embodiment, among the multiple current limiting control circuits connected to the same target port 4, at least one current limiting control circuit may include multiple second branches 3, that is, at least one current limiting chip 1 is connected to multiple second branches 3, and the multiple second branches 3 are connected in parallel between the current limiting pin 11 and ground.

[0082] In this way, multiple connections can be used to provide flexible current limiting control for a target port 4, enabling dynamic adjustment of the current limiting method under different scenario requirements. Furthermore, the flexibility of current limiting can be further improved by combining multiple branches in each current limiting control circuit.

[0083] As one possible implementation, a hardware-based dynamic power management mechanism is provided to help address the power redundancy waste in common hub designs. It mainly consists of triggering conditions and current-limiting circuits, with specific power distribution control within the hub as follows: Figure 3 As shown. The main body consists of three parts: a condition input section, a receive judgment section, and a current limiting section. The current limiting circuit is the aforementioned current limiting control circuit. USB_A or Type-C port, i.e., the target port, refers to whether the target port is a USB_A type port or a Type-C type port.

[0084] The condition input section is divided into two parts: automatic triggering based on specific conditions or manual triggering via buttons, touch, etc.; and a receiving and judging section, which receives the condition input through an MCU or PD controller, judges the current condition, and then outputs a signal to control the current limiting circuit to configure current limiting at the port. The current limiting section executes the corresponding current limiting on the port through control signals.

[0085] like Figure 4 The hub structure shown can be triggered under different conditions, but not limited to the following two: 1. Automatically determining whether a computer or mobile phone is connected to the uplink port via CC detection using Type-C; 2. Manually triggering via button or touch. The receiving judgment circuit mainly consists of a current limiting chip (integrated circuit, IC), i.e., an MCU or PD controller U1, used to receive triggers under any of the above conditions and output the following based on the conditions set by the software: Figure 4Control signals such as EN1, EN2, ENn, EN_1n, EN_2n, EN_nn in it all come from the MCU or the PD controller U1. Among them, Rx is the first resistor corresponding to U1, Q1, Q2,... Qn are the gating modules corresponding to U1, R1, R2,... Rn are the second resistors corresponding to U1, and EN1, EN2,... ENn are the EN enable signals corresponding to U1; R_xn is the first resistor corresponding to Un, Q_1n, Q_2n,... Q_nn are the gating modules corresponding to Un, R_1n, R_2n,... R_nn are the second resistors corresponding to Un, and EN_1n, EN_2n,... EN_nn are the EN enable signals corresponding to Un. GND is the ground pin.

[0086] The control circuit consists of the MCU or the PD controller U1, the triode or MOSFET Q1, and the resistors Rx and R1 to form a two-stage current limiting circuit. First, taking the working principle of the two-stage current limiting as an example, each current limiting IC is different, and according to the different resistance values of the current limiting resistors, the corresponding current limiting magnitudes are also different. Taking ETA2808 as an example, the current limiting current Icc = 160 / R is used to calculate the current limiting current value, where R is the current limiting resistance value. By default, the EN1 control signal is at a low level, corresponding to the triode or MOSFET Q1 being turned off, and R1 is left floating and not connected to GND. At this time, only the current limiting resistor Rx will be connected to U1 and limit the output power. Taking Icc = 160 / Rx as an example, the current limiting current magnitude at present is calculated; if the current limiting magnitude needs to be changed according to the input conditions, at this time EN1 becomes a high level, corresponding to the triode Q1 and MOSFET being turned on, and the resistor R1 is connected to the circuit. At this time, the current limiting resistor value R is determined by the parallel connection of Rx and R1. According to the formula, R = Rx*R1 / (Rx + R1). Therefore, the current limiting resistor value changes from the original Rx to R. According to the current limiting formula calculation, the final current limiting current also changes, thus realizing the two-stage current limiting control. As can be seen from the above, if the current limiting current needs to increase and the current limiting resistor R value needs to decrease, so the value of R1 needs to be connected in parallel on the default Rx resistor, satisfying R1 < Rx. Similarly, if the current limiting current needs to decrease and the current limiting resistor R value needs to increase, at this time the value of R1 connected in parallel on Rx needs to satisfy R1 > Rx.

[0087] If you want to implement a current limiting function of greater than or equal to two stages, you also need to add Q2....Qn and resistors R2...Rn and add the corresponding EN control signals. The working principle is similar to the two-stage current limiting method. When a multi-stage current limiting function is required, the corresponding EN2...ENn signals are made to become high levels in sequence.

[0088] Taking a single-channel example: After the device is powered on, the hub first deducts the default pre-deducted power according to the default current limit value (the specific power amount depends on the number of ports and design requirements, generally around 10W-15W). Then, the hub determines whether there is a trigger condition input based on two conditions. For example, when no device is connected to the hub's upstream port, it means that the device's USB_A or Type-C port has no data function. At this time, the hub device mainly performs charging functions. The reserved output power of the USB_A port (usually set to 5V_0.5A / 0.9A / 1.5A) that originally had data function can be reduced or disabled. This part of the occupied but unused power is given to the upstream port for charging or other fast charging ports to improve power utilization. When the upstream port is connected, the data function is enabled, and the corresponding port can output power according to the default settings. The detection of upstream port insertion is implemented by the PD adapter or similar detection circuit through CC. 2. Another method uses buttons and touch triggers. When the user needs to put the hub into charging mode, pressing a button causes U1 to limit the default port power to a lower level or disable it via the control circuit. The remaining power can then be allocated to the charging ports that need it. Similarly, pressing a button exits charging mode and enters data mode, thus switching the port power back to the default level via a signal.

[0089] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.

[0090] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus a general-purpose hardware platform, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the parts that contribute to the related technology, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., including several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods of various embodiments or some parts of embodiments.

[0091] It should be understood that the terminology used herein is for the purpose of describing particular exemplary embodiments only and is not intended to be limiting. Unless the context clearly indicates otherwise, the singular forms “a,” “an,” and “described” as used herein may also include the plural forms. The terms “comprising,” “including,” “containing,” and “having” are inclusive and therefore indicate the presence of the stated features, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, elements, components, and / or combinations thereof. The method steps, processes, and operations described herein are not construed as requiring them to be performed in a particular order described or illustrated unless the order of performance is explicitly indicated. It should also be understood that additional or alternative steps may be used.

[0092] Where there is no contradiction, each step in a particular implementation or embodiment can be implemented as an independent embodiment, and the steps can be arbitrarily combined. For example, the solution after removing some steps in a particular implementation or embodiment can also be implemented as an independent embodiment, and the order of the steps in a particular implementation or embodiment can be arbitrarily interchanged. In addition, the optional methods or examples in a particular implementation or embodiment can be arbitrarily combined; furthermore, the implementations or embodiments can be arbitrarily combined with each other. For example, some or all steps of different implementations or embodiments can be arbitrarily combined, and a particular implementation or embodiment can be arbitrarily combined with the optional methods or examples of other implementations or embodiments.

[0093] The above are merely specific embodiments of this application, enabling those skilled in the art to understand or implement this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features claimed herein.

Claims

1. A current limiting control circuit, characterized in that, The circuit includes: A current limiting chip, wherein the output of the current limiting chip is connected to at least one target port; The first branch, with its two ends connected to the current limiting pin of the current limiting chip and ground respectively, includes a first resistor; At least one second branch is connected in parallel with the first branch between the current limiting pin and ground; the second branch includes a gating module and a second resistor connected in series, the first end of the gating module is connected to the enable control pin of the current limiting chip, and the second and third ends of the gating module are respectively connected to the second resistor and ground; The current limiting chip is used to regulate the current output to the target port by controlling the on / off state of the gating module.

2. The circuit according to claim 1, characterized in that, The selection module is a transistor or a metal-oxide-semiconductor field-effect transistor (MOSFET); the first terminal of the selection module is the base of the transistor or the gate of the MOSFET.

3. The circuit according to claim 1, characterized in that, When the circuit includes multiple second branches, the resistance values ​​of the second resistors in different second branches are different; The current limiting chip is used to control the gating module of the second branch to be turned on by outputting an enable signal, and when the resistance value of the second resistor in the second branch is greater than a predetermined value, the current value of the current output to the target port is reduced. The current limiting chip is used to control the gating module of the second branch to be turned on by outputting an enable signal, and when the resistance value of the second resistor in the second branch is less than a predetermined value, the current value of the current output to the target port is increased.

4. The circuit according to claim 1, characterized in that, The circuit further includes: a first detection module; the current limiting chip is connected to the target port through the first detection module; the current limiting chip is used to control the gating module of the second branch to be turned on by outputting an enable signal when the first detection module detects that no device is connected to the target port.

5. The circuit according to claim 1, characterized in that, The circuit also includes: a second detection module; The current limiting chip is also connected to the second detection module. When the second detection module detects a predetermined operation, the current limiting chip controls the gating module of the second branch to be turned on by outputting an enable signal.

6. The circuit according to claim 1, characterized in that, The target port is a data port.

7. The circuit according to claim 1, characterized in that, The current limiting chip is a microcontroller or a proportional-derivative controller.

8. The circuit according to claim 1, characterized in that, The current limiting control circuit includes: a plurality of current limiting chips; each current limiting chip is connected to the first branch and at least one second branch.

9. A hub, characterized in that, The hub includes at least one target port and a current limiting control circuit as described in any one of claims 1 to 8.

10. The hub according to claim 9, characterized in that, One of the target ports is connected to multiple current limiting control circuits, and the multiple current limiting control circuits are connected in parallel.

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