Double-sided heat dissipation packaging unit and packaging structure

By designing a double-sided heat dissipation packaging structure in power MOSFET devices, the double-sided heat dissipation surfaces of the base island and heat dissipation copper block are exposed in the package, which solves the problem of poor heat dissipation performance in traditional packaging structures and achieves higher heat dissipation efficiency and smaller package size.

CN224234191UActive Publication Date: 2026-05-12CHONGQING PINGWEI SEMICONDUCTOR CO LTD +1
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
CHONGQING PINGWEI SEMICONDUCTOR CO LTD
Filing Date
2025-04-18
Publication Date
2026-05-12

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Abstract

The utility model belongs to the technical field of semiconductor packaging, and provides a double-sided heat dissipation packaging unit and a packaging structure. The double-sided heat dissipation packaging unit comprises a unit frame, a chip, a heat dissipation copper block and a packaging body, the unit frame comprises a base island, and the base island is provided with a working surface and a first heat dissipation surface which are oppositely arranged; the chip is arranged on the working surface; the heat dissipation copper block and the base island are oppositely arranged, the chip is located between the base island and the heat dissipation copper block, and the face, away from the chip, of the heat dissipation copper block is arranged to be a second heat dissipation face; the packaging body is used for wrapping the unit frame, the chip and the heat dissipation copper block, and the first heat dissipation surface and the second heat dissipation surface are exposed out of the packaging body. The heat generated in the working process of the chip can be dissipated through the first heat dissipation surface and the second heat dissipation surface, so that the heat dissipation performance of the packaging unit can be improved.
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Description

Technical Field

[0001] This utility model relates to the field of semiconductor packaging technology, and in particular to a double-sided heat dissipation packaging unit and packaging structure. Background Technology

[0002] As a core component of modern power electronic systems, the performance of power MOSFET devices directly affects the efficiency, reliability, and cost of the entire system. With the development of power electronics technology towards higher efficiency, higher power density, and higher reliability, the performance requirements for power MOSFET devices are becoming increasingly stringent.

[0003] Traditional power MOSFET devices typically employ a source-up structure, where the source is located at the top of the chip and the drain at the bottom, connected to external circuitry via wire bonding. While this structure boasts mature technology and low cost, it suffers from significant limitations in practical applications.

[0004] First, heat dissipation performance is limited. In traditional packaging structures, the heat generated by the chip is mainly dissipated through the drain at the bottom, resulting in a long heat dissipation path and high thermal resistance. This leads to a high temperature rise when the device operates at high power, limiting its power density and efficiency. Second, parasitic parameters are relatively large. Wire bonding introduces additional parasitic inductance and resistance, affecting the high-frequency characteristics and switching speed of the device, especially in high-frequency applications. Furthermore, traditional packaging structures require reserved space for wire bonding, resulting in a larger package size, which makes it difficult to meet the miniaturization and weight reduction requirements of modern electronic devices.

[0005] Traditional power MOSFET packaging structures have limitations in terms of heat dissipation, parasitic parameters, and package size, making it difficult to meet the growing application demands. Therefore, a new solution is needed to address these technical issues. Utility Model Content

[0006] In view of the shortcomings of the prior art described above, the purpose of this utility model is to provide a double-sided heat dissipation packaging unit and packaging structure to solve the problem of poor heat dissipation performance of power MOSFET packaging structures in the prior art.

[0007] To achieve the above and other related objectives, this utility model provides a double-sided heat dissipation packaging unit, specifically configured as follows: it includes a unit frame, a chip, a heat dissipation copper block, and a package body. The unit frame includes a base island, which has a working surface and a first heat dissipation surface disposed opposite to each other. The chip is disposed on the working surface. The heat dissipation copper block is disposed opposite to the base island, and the chip is located between the base island and the heat dissipation copper block. The side of the heat dissipation copper block facing away from the chip is configured as a second heat dissipation surface. The package body is used to cover the unit frame, the chip, and the heat dissipation copper block, and both the first heat dissipation surface and the second heat dissipation surface are exposed in the package body.

[0008] Optionally, the unit frame further includes a first pin and a second pin disposed opposite to each other. The first pin is integrally connected to the base island; the second pin is flush with the base island and a gap is provided between them; the second pin is connected to the heat dissipation copper block.

[0009] Optionally, the solder portions of both the first pin and the second pin are exposed outside the package and flush with the surface of the package.

[0010] Optionally, the base island includes a gate base island and a source base island spaced apart, the first pin includes a gate pin and a source pin, the gate base island and the gate pin are connected as one unit, the source base island and the source pin are connected as one unit, and the gate pin and the source pin are arranged in parallel or perpendicularly.

[0011] Optionally, when the gate pin and the source pin are arranged perpendicularly, the gate pin is located near the center of the package.

[0012] Optionally, a welding groove is provided on the working surface at the location where the chip is welded.

[0013] Optionally, the unit frame has a first step on the side opposite to the chip, the heat dissipation copper block has a second step on the side opposite to the chip, and the package covers the first step and the second step.

[0014] Optionally, the circumferential sidewall of the heat dissipation copper block is provided with a first protrusion and a second protrusion, both of which are located on the second step, and the encapsulation body covers the first protrusion and the second protrusion.

[0015] This utility model also provides a packaging structure, including a lead frame and a double-sided heat dissipation packaging unit disposed on the lead frame, wherein the lead frame is divided into a plurality of frame units, and a plurality of the packaging units are disposed within each frame unit.

[0016] Optionally, the unit frame is further provided with connecting ribs, and two adjacent unit frames are connected by the connecting ribs.

[0017] As described above, the double-sided heat dissipation packaging unit and packaging structure of this utility model have the following beneficial effects:

[0018] By soldering the chip onto the working surface of the base island, a heat dissipation copper block is soldered to the side of the chip away from the base island, so that the chip is located between the base island and the heat dissipation copper block. The side of the base island away from the chip is set as the first heat dissipation surface, and the side of the heat dissipation copper block away from the chip is set as the second heat dissipation surface. Both the first and second heat dissipation surfaces are exposed to the package body, so that the heat generated by the chip during operation can be dissipated through the first and second heat dissipation surfaces. This is beneficial to improving the heat dissipation performance of the package unit, reducing the temperature rise of the device, and improving the power density and operating efficiency of the device. Attached Figure Description

[0019] Figure 1 The diagram shown is a first-view structural schematic of the double-sided heat dissipation packaging unit according to an embodiment of the present utility model.

[0020] Figure 2 The diagram shown is a second-view structural schematic of the double-sided heat dissipation packaging unit according to an embodiment of the present invention.

[0021] Figure 3 Displayed as Figure 1 A partial structural diagram;

[0022] Figure 4 Displayed as Figure 3 A structural diagram from another perspective;

[0023] Figure 5 The diagram shown is a structural schematic of the packaging structure according to an embodiment of the present invention.

[0024] Explanation of reference numerals in the attached figures

[0025] 1-Chip;

[0026] 2-Copper heat dissipation block; 21-Second heat dissipation surface; 22-Second step; 23-First protrusion; 24-Second protrusion;

[0027] 3-Package;

[0028] 4-Base island; 41-First heat dissipation surface;

[0029] 5-First pin; 51-Gate pin; 52-Source pin; 53-Limiting groove;

[0030] 6-Second pin;

[0031] 7 - First step;

[0032] 8-Leader frame; 81-Frame unit;

[0033] 9-Connecting tendons. Detailed Implementation

[0034] The following specific examples illustrate the implementation of this utility model. Those skilled in the art can easily understand other advantages and effects of this utility model from the content disclosed in this specification. This utility model can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of this utility model.

[0035] It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of this utility model. Therefore, the illustrations only show components relevant to this utility model and are not drawn according to the actual number, shape, and size of the components in implementation. In actual implementation, the shape, quantity, and proportion of each component can be arbitrarily changed, and the component layout may be more complex. The structures, proportions, and sizes shown in the accompanying drawings are only for illustrative purposes to aid those skilled in the art and are not intended to limit the implementation conditions of this utility model. Therefore, they have no substantial technical significance. Any modifications to the structure, changes in proportions, or adjustments to size, without affecting the effects and objectives of this utility model, should still fall within the scope of the technical content disclosed in this utility model. Furthermore, terms such as "upper," "lower," "left," "right," "middle," and "one" used in this specification are only for clarity of description and are not intended to limit the scope of implementation of this utility model. Changes or adjustments to their relative relationships, without substantially altering the technical content, should also be considered within the scope of implementation of this utility model.

[0036] like Figure 1As shown, some embodiments of this application provide a double-sided heat dissipation packaging unit, including a unit frame, a chip 1, a heat dissipation copper block 2, and a package body 3. The unit frame includes a base island 4, which has a working surface and a first heat dissipation surface 41 disposed opposite to each other. The chip 1 is soldered to the working surface of the base island 4. The heat dissipation copper block 2 is disposed opposite to the base island 4, and the chip 1 is located between the base island 4 and the heat dissipation copper block 2. The chip 1 is soldered to the heat dissipation copper block 2, and the side of the heat dissipation copper block 2 facing away from the chip 1 is set as a second heat dissipation surface 21. When the package body 3 covers the unit frame, the chip 1, and the heat dissipation copper block 2, both the first heat dissipation surface 41 and the second heat dissipation surface 21 are exposed to the package body 3 to dissipate the heat generated by the chip 1. This is beneficial to improving the heat dissipation performance of the packaging unit of this application, reducing the temperature rise of the device, and improving the power density and operating efficiency of the device.

[0037] In this embodiment, the first heat dissipation surface 41 and the second heat dissipation surface 21 are flush with the surface of the package 3, which helps to reduce the volume of the package unit of this application.

[0038] In some embodiments, a welding groove is provided on the working surface of the base island 4, which is corresponding to the chip 1. The welding groove can guide the physical mechanism of solder flow, thereby enhancing the uniformity of solder filling. In addition, the groove structure increases the contact area between the solder and the base island 4, improves the wettability of the solder, and ensures a stronger welding interface.

[0039] For example, the welding groove may include, but is not limited to, a cross-shaped groove.

[0040] In some embodiments, the unit frame further includes a first pin 5 and a second pin 6, which are disposed opposite each other on a first opposite side of the base island 4. The first pin 5 is connected to the base island 4 and integrated into it; the second pin 6 is flush with the base island 4, with a gap between them, and is soldered to the heat sink copper block 2. When the second pin 6 is connected to the drain of the chip 1, making the second pin 6 a drain pin, the above arrangement can improve thermal management and optimize on-resistance.

[0041] For example, the solder portions of the first pin 5 and the second pin 6 are both exposed outside the package body 3 and flush with the surface of the package body 3, which helps to reduce the volume of the package unit of this application.

[0042] In some embodiments, the base island 4 includes a gate base island and a source base island spaced apart. The gate of chip 1 is connected to the gate base island, and the source of chip 1 is connected to the source base island. The first pin 5 includes a gate pin 51 and a source pin 52. The gate base island and the gate pin are connected as one unit, and the source base island and the source pin are connected as one unit, so that the gate pin 51 is connected to the gate of chip 1, and the source pin 52 is connected to the source of chip 1. To better utilize the heat dissipation path and allow the heat generated by the device during operation to be dissipated more effectively, the gate pin 51 and the source pin 52 can be arranged in parallel. Alternatively, to improve the integration of the circuit and allow more devices to be arranged per unit area, the gate pin 51 and the source pin 52 can be arranged vertically. The specific arrangement method is adaptively selected according to actual needs.

[0043] For example, when the gate pin 51 and the source pin 52 are arranged vertically, the gate pin 51 is located near the middle of the package 3, which can make full use of the space inside the package 3, thereby saving package space and thus helping to improve the integration and packaging density of the circuit, making the entire electronic device more compact.

[0044] In one example, a limiting groove 53 is provided on the first pin 5. When the package 3 encapsulates the first pin 5, the package 3 is embedded in the limiting groove 53, thereby increasing the bonding force between the first pin 5 and the package 3 and preventing delamination between the unit frame and the package 3.

[0045] In some embodiments, to make the connection between the package 3 and the unit frame and the heat sink 2 more stable, a first step 7 is provided on the side of the unit frame facing away from the chip 1, and a second step 22 is provided on the side of the heat sink 2 facing away from the chip 1. When the package 3 covers the unit frame and the heat sink 2, the package 3 fills the first step 7 and the second step 22, preventing the unit frame and the heat sink 2 from falling off from the package 3.

[0046] For example, the first step 7 includes a step between the first heat dissipation surface 41 and the source pin 52 and the base island 4, a step between the gate pin 51 and the base island 4, and a step on the side of the second pin 6 facing the base island 4. The second step 22 is a step between the second heat dissipation surface 21 and the heat dissipation copper block 2.

[0047] In some embodiments, to further strengthen the connection between the heat dissipation copper block 2 and the package 3, a first protrusion 23 and a second protrusion 24 are provided on the circumferential sidewall of the heat dissipation copper block 2, and the first protrusion 23 and the second protrusion 24 are located on the second step 22. By providing the first protrusion 23 and the second protrusion 24, when the package 3 covers the first protrusion 23 and the second protrusion 24, the area of ​​the second step 22 embedded inside the package 3 can be increased.

[0048] For example, a first protrusion 23 and a second protrusion 24 are provided on the two sidewalls adjacent to the side of the heat sink copper block 2 that connects to the second pin 6.

[0049] In summary, the present invention provides a double-sided heat dissipation packaging unit by soldering a chip onto the working surface of a base island. A heat dissipation copper block is soldered to the side of the chip away from the base island, so that the chip is located between the base island and the heat dissipation copper block. The side of the base island away from the chip is set as the first heat dissipation surface, and the side of the heat dissipation copper block away from the chip is set as the second heat dissipation surface. Both the first and second heat dissipation surfaces are exposed to the package body, so that the heat generated by the chip during operation can be dissipated through the first and second heat dissipation surfaces. This is beneficial to improving the heat dissipation performance of the packaging unit, reducing the temperature rise of the device, and improving the power density and operating efficiency of the device.

[0050] Some embodiments of this application also provide a packaging structure, including a lead frame 8 and the aforementioned double-sided heat dissipation packaging unit, which is disposed on the lead frame 8. The lead frame 8 is divided into a plurality of frame units 81, and each frame unit 81 contains a plurality of packaging units.

[0051] In this embodiment, the lead frame 8 is divided into 4 frame units 81, each frame unit 81 is provided with 18 rows and 16 columns of encapsulation units, and a pre-cut channel is provided between two adjacent frame units 81.

[0052] In some embodiments, since the lead frame 8 is thin (e.g., 0.4 mm), in order to improve the stability of the lead frame 8, a connecting rib 9 is also provided on the unit frame. The connecting rib 9 is located on the second opposite sides of the base island 4 and is used to connect two adjacent unit frames.

[0053] For example, the material of the lead frame 8 may include, but is not limited to, T2 alloy.

[0054] The above embodiments are merely illustrative of the principles and effects of this utility model and are not intended to limit the scope of this utility model. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of this utility model. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in this utility model should still be covered by the claims of this utility model.

Claims

1. A double-sided heat dissipation packaging unit, characterized in that, include: The unit frame includes a base island, the base island having a working surface and a first heat dissipation surface disposed opposite to each other; The chip is disposed on the working surface; A heat dissipation copper block is disposed opposite to the base island, the chip is located between the base island and the heat dissipation copper block, and the side of the heat dissipation copper block facing away from the chip is configured as a second heat dissipation surface; A package is used to cover the unit frame, the chip and the heat dissipation copper block, with both the first heat dissipation surface and the second heat dissipation surface exposed outside the package.

2. The double-sided heat dissipation packaging unit according to claim 1, characterized in that: The unit frame also includes a first pin and a second pin arranged opposite to each other. The first pin is integrated with the base island. The second pin is flush with the base island and there is a gap between them. The second pin is connected to the heat dissipation copper block.

3. The double-sided heat dissipation packaging unit according to claim 2, characterized in that: The solder portions of the first pin and the second pin are both exposed outside the package and flush with the surface of the package.

4. The double-sided heat dissipation packaging unit according to claim 3, characterized in that: The base island includes a gate base island and a source base island spaced apart. The first pin includes a gate pin and a source pin. The gate base island and the gate pin are connected as one unit. The source base island and the source pin are connected as one unit. The gate pin and the source pin are arranged in parallel or perpendicularly.

5. The double-sided heat dissipation packaging unit according to claim 4, characterized in that: When the gate pin and the source pin are arranged perpendicularly, the gate pin is located near the center of the package.

6. The double-sided heat dissipation packaging unit according to any one of claims 1-5, characterized in that: A welding groove is provided on the working surface at the location where the chip is welded.

7. The double-sided heat dissipation packaging unit according to claim 6, characterized in that: The unit frame has a first step on the side opposite to the chip, the heat dissipation copper block has a second step on the side opposite to the chip, and the package covers the first step and the second step.

8. The double-sided heat dissipation packaging unit according to claim 7, characterized in that: The heat dissipation copper block has a first protrusion and a second protrusion on its circumferential sidewall. Both the first protrusion and the second protrusion are located on the second step, and the package covers the first protrusion and the second protrusion.

9. A packaging structure, characterized in that, include: The lead frame is divided into several frame units; The double-sided heat dissipation packaging unit as described in any one of claims 1-8 is disposed on the lead frame, and each of the frame units contains a plurality of the packaging units.

10. The packaging structure according to claim 9, characterized in that: The unit frame is also provided with connecting ribs, and two adjacent unit frames are connected by the connecting ribs.