Heat dissipation structure and semiconductor packaging structure
By setting anchor holes on the heat sink, the thermal interface layer flows in and solidifies to form an anchoring structure, solving the problems of uneven distribution and warping of thermal interface material in FCBGA packaging, and achieving higher bonding strength and heat dissipation efficiency.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- SUZHOU TF AMD SEMICON CO LTD
- Filing Date
- 2025-05-15
- Publication Date
- 2026-05-22
AI Technical Summary
During the flip-chip ball grid array (FCBGA) packaging process, the thermal interface material may be squeezed out due to uneven pressure distribution, leading to contamination of surrounding components and short circuit risk. Furthermore, the mismatch in thermal expansion coefficients can cause package warping, affecting heat dissipation performance.
The heat dissipation structure adopts a heat dissipation cover with anchor holes. When the thermal interface layer is squeezed, it flows into the anchor holes and solidifies to form an anchoring structure, which enhances the bonding force and prevents interface delamination.
It improves the curing and bonding strength of the thermal interface layer, prevents interface delamination, ensures overall heat dissipation, reduces the risk of contamination, and improves heat dissipation efficiency.
Smart Images
Figure CN224267259U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor packaging technology, and more specifically, to a heat dissipation structure and a semiconductor packaging structure. Background Technology
[0002] With the rapid development of high-performance computing, artificial intelligence, and graphics processing, higher demands are being placed on chip packaging technology. Flip-chip ball grid array (FCBGA) packaging, due to its excellent electrical performance and high integration, has become one of the key technologies in these fields. The FCBGA package structure mainly includes a chip, a substrate, a solder ball array, and a heat dissipation structure. The heat dissipation structure includes a thermal interface material (TIM), whose main function is to fill the space between the chip and the TIM to effectively transfer heat and reduce thermal resistance.
[0003] In actual packaging, the thermal interface material is first coated onto the chip surface in liquid form. Then, the thermal interface material is evenly distributed between the chip and the thermal interface by pressing the heat sink. Finally, the thermal interface material is cured. However, when the pressure distribution between the heat sink and the chip is uneven, the thermal interface material may be squeezed out of the contact area, causing contamination of surrounding components or even short circuit risks. This also reduces the effective contact area and lowers heat dissipation efficiency. Secondly, significant packaging warping due to CTE (coefficient of thermal expansion) mismatch during packaging can lead to interface delamination between the heat sink, thermal interface material, and chip due to stress, thus affecting the coverage of the thermal interface layer and resulting in a decrease in overall heat dissipation performance. Utility Model Content
[0004] This application provides at least one heat dissipation structure and semiconductor packaging structure. The heat dissipation structure can improve the bonding force of the thermal interface layer after curing, prevent the thermal interface layer from delaminating with the heat sink when the package warps, avoid the thermal interface layer coverage rate from being reduced due to interface delamination, and thus ensure the overall heat dissipation effect.
[0005] In a first aspect, embodiments of this application provide a heat dissipation structure for being disposed on the surface of a chip to dissipate heat from the chip, the heat dissipation structure comprising:
[0006] A heat sink cover, wherein the side of the heat sink cover facing the chip is provided with anchor holes;
[0007] A thermal interface layer is disposed on the side of the chip facing the heat sink cover. The thermal interface layer can flow into the anchor hole when the heat sink cover is squeezed, and form an anchoring structure with the anchor hole after curing.
[0008] In one alternative implementation, the number of anchor holes is multiple, and the multiple anchor holes are distributed at intervals along the circumference of the chip.
[0009] In one alternative implementation, the anchor hole is configured to form a multi-point anchor with the thermal interface layer.
[0010] In one alternative embodiment, the anchor hole has multiple cascaded cavities, the diameter of which gradually increases in the direction away from the thermal interface layer.
[0011] In one alternative embodiment, the anchor hole has multiple cascaded cavities, each cavity having a diameter that gradually decreases in the direction away from the thermal interface layer.
[0012] In one alternative embodiment, a barrier is provided on the side of the heat sink facing the chip, the barrier surrounding the thermal interface layer and the periphery of the chip, and the anchor hole is provided in the barrier.
[0013] In one alternative implementation, the enclosure and the heat dissipation cover are an integral structure.
[0014] In one optional embodiment, the enclosure includes a first blocking portion and a second blocking portion connected along the height direction. The first blocking portion surrounds the periphery of the thermal interface layer and is provided with the anchor hole. The second blocking portion surrounds the periphery of the chip and is used to guide the thermal interface layer into the anchor hole.
[0015] In one alternative embodiment, the distance between the second blocking portion and the chip is no greater than 3 mm.
[0016] In one alternative embodiment, the fence has an L-shaped cross-section.
[0017] Secondly, embodiments of this application also provide a semiconductor packaging structure, including the heat dissipation structure described above.
[0018] The above-mentioned technical solution of this application has the following beneficial technical effects:
[0019] The heat dissipation structure of this application embodiment includes a heat dissipation cover and a thermal interface layer. The thermal interface layer can flow into the anchor hole of the heat dissipation cover, and after curing, the thermal interface layer can form an anchoring structure with the anchor hole. This can achieve the locking function of the thermal interface layer, improve the bonding force of the thermal interface layer after curing, prevent the thermal interface layer from delaminating with the heat dissipation cover when the package warps, avoid the thermal interface layer coverage rate from being reduced due to interface delamination, and thus ensure the overall heat dissipation effect.
[0020] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description
[0021] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly described below. These drawings are incorporated in and constitute a part of this specification. They illustrate embodiments conforming to this application and, together with the specification, serve to explain the technical solutions of this application. It should be understood that the following drawings only show some embodiments of this application and should not be considered as limiting the scope. For those skilled in the art, other related drawings can be obtained from these drawings without creative effort.
[0022] Figure 1 A schematic diagram of a semiconductor packaging structure provided in an embodiment of this application is shown;
[0023] Figure 2 It shows Figure 1 A schematic diagram of an anchor hole in a heat dissipation cover;
[0024] Figure 3 It shows Figure 1 A schematic diagram of another type of anchor hole for the heat dissipation cover;
[0025] Figure 4 The packaging process of the semiconductor packaging structure provided in the embodiments of this application is illustrated;
[0026] In the figure: 100, heat sink cover; 110, anchor hole; 120, enclosure; 121, first blocking part; 122, second blocking part; 200, thermal interface layer; 300, chip; 400, substrate; 500, solder ball. Detailed Implementation
[0027] Various exemplary embodiments of the present application will now be described in detail with reference to the accompanying drawings. It should be noted that, unless otherwise specifically stated, the relative arrangement, numerical expressions, and values of the components and steps set forth in these embodiments do not limit the scope of the present application.
[0028] The embodiments of this application will now be described in detail. Examples of these embodiments are illustrated in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.
[0029] The terms "first" and "second" in the specification and claims of this application may explicitly or implicitly include one or more of the features. In the description of this application, unless otherwise stated, "multiple" means two or more. Furthermore, "and / or" in the specification and claims indicates at least one of the connected objects, and the character " / " generally indicates that the preceding and following objects are in an "or" relationship.
[0030] In the description of this application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc., indicating the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.
[0031] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection between two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.
[0032] refer to Figure 1 This application provides a heat dissipation structure for application on the surface of a chip 300 to dissipate heat from the chip 300. The heat dissipation structure includes a heat sink 100 and a thermal interface layer 200. An anchor hole 110 is provided on the side of the heat sink 100 facing the chip 300. The thermal interface layer 200 is disposed on the side of the chip 300 facing the heat sink 100. The thermal interface layer 200 can flow into the anchor hole 110 when the heat sink 100 is compressed, and can form an anchoring structure with the anchor hole 110 after curing.
[0033] The heat dissipation structure of this application embodiment can be applied to FCBGA package structure, wherein the thermal interface layer 200 is made of organic thermal adhesive or metal thermal dissipation material.
[0034] When the thermal interface layer 200 is made of organic thermal adhesive, such as Figure 4As shown, the specific process includes: applying organic thermal adhesive to the non-functional layer of chip 300 (i.e., the side facing away from substrate 400) according to a specific pattern using a dispensing process; covering the thermal interface layer 200 with heat sink 100; pressing the heat sink 100 together, causing the organic thermal adhesive to be squeezed outwards and spread into the anchor hole 110; and rapidly curing during pressing. The cured organic thermal adhesive forms an anchoring structure with the anchor hole 110, and is then further cured at high temperature in an oven.
[0035] When the material of the thermal interface 200 is a metal heat dissipation material, the metal heat dissipation material often chosen is indium. The specific process includes: first, connecting the indium sheet to the non-functional layer of the chip 300 (i.e. the side facing away from the substrate 400). The indium sheet can be fixed to the chip 300 by pasting, welding or applying pressure. Then, the heat dissipation cover 100 is placed on the thermal interface layer 200, the heat dissipation cover 100 is pressed together, and a reflow soldering process is performed. The indium sheet will become liquid after the high temperature of reflow. The liquid metal indium will flow into the anchor hole 110. During subsequent cooling, the metal indium will slowly solidify and form an anchoring structure with the anchor hole 110.
[0036] The heat dissipation structure of this application embodiment includes a heat dissipation cover 100 and a thermal interface layer 200. The thermal interface layer 200 can flow into the anchor hole 110 of the heat dissipation cover 100, and after curing, the thermal interface layer 200 can form an anchoring structure with the anchor hole 110. This can achieve the locking function of the thermal interface layer 200, improve the bonding force of the thermal interface layer 200 after curing, prevent the thermal interface layer 200 from delaminating with the heat dissipation cover 100 when the package warps, avoid the reduction of the coverage of the thermal interface layer 200 due to interface delamination, and thus ensure the overall heat dissipation effect.
[0037] In some embodiments, the anchor hole 120 can be a through hole, or the anchor hole 120 can be a blind hole. This application does not specifically limit the embodiments in this regard.
[0038] In some embodiments, there are multiple anchor holes 120, which are evenly distributed along the circumference of the chip 300. This arrangement allows the thermal interface layer 200 to diffuse into each anchor hole 120, thereby forming multiple anchoring structures to enhance the bonding strength between the thermal interface layer 200 and the heat sink 100 after curing.
[0039] In some embodiments, the anchor holes 120 are configured to form multi-point anchoring with the thermal interface layer 200. By forming multi-point anchoring (multi-point anchoring effect) between the anchor holes 120 and the thermal interface layer 200, the bonding strength between the heat sink 100 and the thermal interface layer 200 can be improved, reducing the risk of interface delamination caused by mechanical vibration or impact.
[0040] In some embodiments, reference Figure 2The anchor hole 110 has multiple cascaded cavities, and the diameter of the cavities gradually increases in the direction away from the thermal interface layer 200. For example, the inner wall of the anchor hole 120 is stepped, and the diameter of the anchor hole 120 gradually increases in the direction away from the chip 300. This arrangement enables multi-point anchoring between the anchor hole 120 and the thermal interface layer 200. In specific configurations, two or three steps can be provided within the anchor hole 120. Of course, this embodiment does not specifically limit the number of steps within the anchor hole 120, and can be selected according to actual conditions.
[0041] In some embodiments, reference Figure 3 The anchor hole 110 has multiple cascaded cavities, each with a diameter that gradually increases in the direction away from the thermal interface layer 200. For example, the inner wall of the anchor hole 120 is provided with multiple sets of barbed structures, which divide the anchor hole 120 into multiple cascaded cavities. The tips of each set of barbed structures are bent away from the thermal interface layer 200. This arrangement enables multi-point anchoring between the anchor hole 120 and the thermal interface layer 200. In specific configurations, three or more sets of barbed structures can be provided in the anchor hole 120. Of course, the embodiments of this application do not specifically limit the number of barbed structures in the anchor hole 120, and can be selected according to the actual situation.
[0042] In some embodiments, reference Figure 1 A retaining wall 120 is provided on the side of the heat sink 100 facing the chip 300, surrounding the thermal interface layer 200 and the periphery of the chip 300. Anchor holes 110 are provided on the retaining wall 120. This embodiment shows the anchor holes 110 being provided on the inner side of the retaining wall 120. Of course, the anchor holes 110 can also be through holes penetrating the thickness direction of the retaining wall 120. This arrangement ensures that the heat sink 100 will not be damaged by the anchor holes 110, thereby affecting its structural performance.
[0043] In some embodiments, the enclosure 120 is annular. For example, the enclosure 120 is rectangular or other polygons that match the outline of the chip 300.
[0044] In some embodiments, the enclosure 120 includes a first blocking portion 121 and a second blocking portion 122 connected along its height direction. The first blocking portion 121 surrounds the periphery of the thermal interface layer 200 and is provided with an anchor hole 110. The second blocking portion 122 surrounds the periphery of the chip 300 and is used to guide the thermal interface layer 200 into the anchor hole 110. In a specific configuration, the distance between the second blocking portion 122 and the chip 300 should be minimized as much as possible. This restricts the thermal interface layer 200 from overflowing from the gap between the second blocking portion 122 and the chip 300, thereby allowing the second blocking portion 122 to guide the thermal interface layer 200 into the anchor hole 110. Specifically, during the compression of the heat sink 100, the enclosure 120 and the anchor hole 120 can restrict the overflow path of the thermal interface layer 200, ensuring that the thermal interface layer 200 can only flow into the anchor hole 120. This not only reduces contamination caused by overflow but also increases the contact area between the thermal interface layer 200 and the heat sink 100, thereby improving heat dissipation efficiency. In addition, since the enclosure 120 and anchor holes 120 restrict the overflow path of the thermal interface layer 200, when mounting the heat sink 100, the enclosure 120 and anchor holes 120 can help increase the coverage area of the thermal interface layer 200 on the surface of the chip 300, especially the coverage of the chip 300 edges and warp-sensitive areas. At the same time, it can also improve the tolerance for the initial coating thickness and uniformity of the thermal interface layer 200, allowing the use of conventional coating processes (such as dispensing) to replace high-precision screen printing, which can reduce the process difficulty and equipment investment costs.
[0045] In some embodiments, the distance between the second barrier 122 and the chip 300 is no greater than 3 mm. Preferably, the distance between the barrier 120 and the chip 300 is 0.05 to 0.3 mm, which ensures that the thermal interface layer 200 preferentially fills the anchor hole 120 when compressed, rather than overflowing from the gap between the barrier 120 and the chip 300, thus helping to reduce contamination.
[0046] In some embodiments, the cross-section of the barrier 120 is L-shaped. Specifically, the second blocking portion 122 can reduce its distance from the chip 300 by increasing its own width.
[0047] In some embodiments, the enclosure 120 and the heat dissipation cover 110 are an integral structure. This configuration can improve the connection strength between the enclosure 120 and the heat dissipation cover 110, while reducing the risk of loosening or separation of the connection points, making the structure more reliable.
[0048] refer to Figure 1 This application also provides a semiconductor packaging structure, including a substrate 400, a chip 300, solder balls 500, and a heat dissipation structure, which is the heat dissipation structure described above. The specific structure of the heat dissipation structure has been described in detail above and will not be repeated here.
[0049] The semiconductor packaging structure of this application embodiment includes a heat dissipation structure, which includes a heat dissipation cap 100 and a thermal interface layer 200. The thermal interface layer 200 can flow into the anchor hole 110 of the heat dissipation cap 100, and after curing, the thermal interface layer 200 can form an anchoring structure with the anchor hole 110. This can achieve the locking function of the thermal interface layer 200, improve the bonding force of the thermal interface layer 200 after curing, prevent the thermal interface layer 200 from delaminating with the heat dissipation cap 100 when the package warps, and avoid the reduction of the coverage of the thermal interface layer 200 due to interface delamination, thereby ensuring the overall heat dissipation effect.
[0050] One or more embodiments in this specification are intended to cover all such substitutions, modifications, and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of one or more embodiments in this specification should be included within the protection scope of this application.
[0051] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.
Claims
1. A heat dissipation structure for being disposed on the surface of a chip to dissipate heat from the chip, characterized in that, The heat dissipation structure includes: A heat sink cover, wherein the side of the heat sink cover facing the chip is provided with anchor holes; A thermal interface layer is disposed on the side of the chip facing the heat sink cover. The thermal interface layer can flow into the anchor hole when the heat sink cover is squeezed, and form an anchoring structure with the anchor hole after curing.
2. The heat dissipation structure according to claim 1, characterized in that, The number of anchor holes is multiple, and the multiple through holes are distributed at intervals along the circumference of the chip.
3. The heat dissipation structure according to claim 1, characterized in that, The anchor holes are configured to form multi-point anchoring with the thermal interface layer.
4. The heat dissipation structure according to claim 3, characterized in that, The anchor hole has multiple cascaded cavities, and the diameter of the multiple cavities gradually increases in the direction away from the thermal interface layer.
5. The heat dissipation structure according to claim 3, characterized in that, The anchor hole has multiple cascaded cavities, and the diameter of each cavity gradually decreases along the direction away from the thermal interface layer.
6. The heat dissipation structure according to claim 1, characterized in that, A barrier is provided on the side of the heat sink facing the chip, the barrier surrounds the thermal interface layer and the periphery of the chip, and the anchor hole is provided in the barrier.
7. The heat dissipation structure according to claim 6, characterized in that, The fence and the cover plate are an integral structure.
8. The heat dissipation structure according to claim 6, characterized in that, The enclosure includes a first blocking part and a second blocking part connected along the height direction. The first blocking part surrounds the periphery of the thermal interface layer and is provided with the anchor hole. The second blocking part surrounds the periphery of the chip and is used to guide the thermal interface layer into the anchor hole.
9. The heat dissipation structure according to claim 8, characterized in that, The distance between the second blocking part and the chip is no more than 3mm.
10. A semiconductor packaging structure, characterized in that, Includes the heat dissipation structure described in any one of claims 1-9.