A voltage and current signal detection circuit

Abstract

This utility model discloses a voltage and current signal detection circuit, relating to the field of voltage and current detection technology. It includes a load detection module that samples the current and voltage of a power supply module and transmits the samples to a voltage processing module and a current processing module via a first transmission module for differential amplification. The processed signals are received by a signal receiving module. Simultaneously, an anomaly detection module detects the operating status of the current processing module and, when the input and output voltages are unequal, switches the switching path of the first transmission module via a timing control module. This allows the voltage processing module to process the signals detected by the load detection module separately, and then receive the signals through the voltage and current receiving terminals of the signal receiving module. This voltage and current signal detection circuit ensures efficient current and voltage sampling and improves signal detection efficiency.

Description

Technical Field

[0001] This utility model relates to the field of voltage and current detection technology, specifically a voltage and current signal detection circuit. Background Technology

[0002] Voltage and current signal detection is fundamental to various circuits and control circuits, and is an important parameter for measuring the operating status of power systems. In existing technologies, voltage detection circuits generally consist of voltage divider circuits and differential amplifier circuits for voltage sampling and signal amplification. Current detection circuits generally consist of sampling resistors and differential amplifier circuits for current sampling, current-voltage conversion, and amplification. However, when the signal processing of the current detection circuit is abnormal, it will be unable to perform current sampling normally, so improvements are needed. Utility Model Content

[0003] This utility model provides a voltage and current signal detection circuit to solve the problems mentioned in the background art.

[0004] To achieve the above objectives, this utility model provides the following technical solution:

[0005] A voltage and current signal detection circuit includes: a power supply module, a load detection module, a first transmission module, a voltage processing module, a current processing module, an anomaly detection module, a timing control module, and a signal receiving module.

[0006] The power module is used for power supply;

[0007] The load detection module is connected to the power supply module and is used to sample the current and voltage of the power supply module and output the first detection signal and the second detection signal respectively.

[0008] The first transmission module is connected to the power supply module, load detection module, timing control module, voltage processing module and current processing module. It is used to control the transmission status of the first detection signal and the second detection signal, and transmit the first detection signal to the current processing module and the second detection signal to the voltage processing module. The timing control module controls the transmission of the first detection signal to the voltage processing module.

[0009] The voltage processing module is used to differentially amplify the input first detection signal or the second detection signal and output the first processed signal;

[0010] The current processing module is used to differentially amplify the first detection signal and output a second processed signal;

[0011] An anomaly detection module, connected to the current processing module, is used to detect the voltage of the first detection signal and the second processing signal, and to output a first control signal by self-locking when the voltages of the first detection signal and the second processing signal are unequal.

[0012] The signal receiving module is connected to the power supply module, voltage processing module, current processing module and timing control module. It is used to receive the first processed signal and the second processed signal through the voltage receiving end and the current receiving end respectively and to process the signal. The timing control module controls the transmission of the first processed signal to the voltage receiving end or the current receiving end.

[0013] The timing control module, connected to the anomaly detection module, is used to set the timing period and, upon receiving the first control signal, initiates timing operation and intermittently controls the first transmission module to transmit the first detection signal to the voltage processing module, switching the signal transmission path of the signal receiving module.

[0014] As a further embodiment of this utility model: the power module includes a power processing module, a detection load, a fourth resistor, and a fifth resistor; the load detection module includes a first resistor, a second resistor, and a third resistor;

[0015] Preferably, the first output terminal of the power processing device is connected to the first terminal of the fifth resistor and the first terminal of the fourth resistor, the second terminal of the fifth resistor and the second terminal of the fourth resistor are connected to the first transmission module, the second output terminal of the power processing device is connected to the detection load and the first terminal of the second resistor, the second terminal of the second resistor is connected to the first terminal of the first resistor, the ground terminal and the ground terminal of the power processing device through the third resistor, and the second terminal of the first resistor is connected to the second terminal of the detection load.

[0016] As a further embodiment of this utility model: the first transmission module includes a first analog switch; the voltage processing module includes a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, and a first capacitor;

[0017] Preferably, the third terminal of the first analog switch is connected to the second terminal of the second resistor; the first and eighth terminals of the first analog switch are both connected to the second terminals of the first resistor; the thirteenth and fifth terminals of the first analog switch are respectively connected to the second terminals of the fifth and fourth resistors; the fourth and ninth terminals of the first analog switch are both connected to the non-inverting input of the first operational amplifier and one end of the seventh resistor through the sixth resistor; the inverting input of the first operational amplifier is connected to one end of the eighth resistor and is connected to the output terminal of the first operational amplifier and the first terminal of the tenth resistor through the ninth resistor; the second terminal of the tenth resistor is connected to the other end of the eighth resistor, the other end of the seventh resistor, and ground through the first capacitor; the second terminal of the first analog switch is connected to the current processing module; and the sixth terminal of the first analog switch is connected to the timing control module.

[0018] As a further embodiment of this utility model: the current processing module includes a signal processing device;

[0019] Preferably, the input terminal of the signal processing device is connected to the second terminal of the first analog switch, the ground terminal of the signal processing device is grounded, and the output terminal of the signal processing device is connected to the signal receiving module.

[0020] As a further embodiment of this utility model: the signal receiving module includes a second analog switch and a signal receiving device;

[0021] Preferably, the sixth terminal of the second analog switch is connected to the timing control module, the thirteenth and fifth terminals of the second analog switch are respectively connected to the second terminals of the fifth and fourth resistors, the third and eighth terminals of the second analog switch are both connected to the second terminals of the tenth resistor, the first terminal of the second analog switch is connected to the output terminal of the signal processing device, the fourth terminal of the second analog switch is connected to the voltage receiving terminal of the signal receiving device, and the second and ninth terminals of the second analog switch are both connected to the current receiving terminal of the signal receiving device.

[0022] As a further embodiment of this utility model: the timing control module includes a third switch, a first switch, a second switch, and a timing device;

[0023] Preferably, the power supply terminal of the timing device is connected to the emitter of the third switching transistor, the base of the third switching transistor is connected to the abnormal detection module and the base of the first switching transistor, the collector of the third switching transistor is connected to the first output terminal of the power processing device, the ground terminal of the timing device, the emitter of the first switching transistor and the emitter of the second switching transistor are all grounded, the output terminal of the timing device is connected to the base of the second switching transistor, the sixth terminal of the first analog switch and the sixth terminal of the second analog switch, and the collectors of the first switching transistor and the second switching transistor are respectively connected to the second terminal of the fifth resistor and the second terminal of the fourth resistor.

[0024] As a further improvement of this utility model: the anomaly detection module includes a first comparator, a second comparator, a first logic chip, and a self-locking device;

[0025] Preferably, the non-inverting input of the first comparator is connected to the inverting input of the second comparator and the input of the signal processing device; the inverting input of the first comparator is connected to the non-inverting input of the second comparator and the output of the signal processing device; the outputs of the first and second comparators are respectively connected to the A and B terminals of the first logic chip; the Y terminal of the first logic chip is connected to the input of the self-locking device; and the output of the self-locking device is connected to the base of the first switching transistor and the base of the third switching transistor.

[0026] Compared with the prior art, the beneficial effects of this utility model are as follows: The voltage and current signal detection circuit of this utility model can sample the current and voltage of the power supply module through the load detection module, and transmit the samples to the voltage processing module and the current processing module for differential amplification through the first transmission module. The processed signals are received by the signal receiving module. At the same time, the abnormal detection module detects the working status of the current processing module, and when the input and output voltages are not equal, the switching path of the first transmission module is switched through the timing control module. Then, the voltage processing module can process the signals detected by the load detection module separately, and then receive them through the voltage receiving end and the current receiving end of the signal receiving module, ensuring the sampling of current and voltage and improving the signal detection efficiency. Attached Figure Description

[0027] To more clearly illustrate the technical solutions of the embodiments of this utility model, the drawings used in the description of the embodiments of this utility model will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0028] Figure 1 This is a schematic block diagram of a voltage and current signal detection circuit provided for an example of this utility model.

[0029] Figure 2 A circuit diagram of a voltage and current signal detection circuit provided for an example of this utility model.

[0030] Figure 3 The connection circuit diagram of the anomaly detection module provided for this utility model embodiment. Detailed Implementation

[0031] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0032] In one embodiment, see Figure 1 A voltage and current signal detection circuit includes: a power supply module 1, a load detection module 2, a first transmission module 3, a voltage processing module 4, a current processing module 5, an anomaly detection module 6, a timing control module 7, and a signal receiving module 8.

[0033] Specifically, power module 1 is used for power supply;

[0034] The load detection module 2 is connected to the power supply module 1 and is used to sample the current and voltage of the power supply module 1 and output the first detection signal and the second detection signal respectively.

[0035] The first transmission module 3 is connected to the power supply module 1, the load detection module 2, the timing control module 7, the voltage processing module 4, and the current processing module 5. It is used to control the transmission status of the first detection signal and the second detection signal, and transmit the first detection signal to the current processing module 5 and the second detection signal to the voltage processing module 4. The timing control module 7 controls the transmission of the first detection signal to the voltage processing module 4.

[0036] Voltage processing module 4 is used to differentially amplify the input first detection signal or the second detection signal and output the first processed signal;

[0037] Current processing module 5 is used to differentially amplify the first detection signal and output a second processed signal;

[0038] Anomaly detection module 6, connected to current processing module 5, is used to detect the voltage of the first detection signal and the second processing signal, and when the voltages of the first detection signal and the second processing signal are not equal, it self-locks and outputs the first control signal.

[0039] The signal receiving module 8 is connected to the power supply module 1, the voltage processing module 4, the current processing module 5, and the timing control module 7. It is used to receive the first processing signal and the second processing signal through the voltage receiving end and the current receiving end respectively and to perform signal processing. The timing control module 7 controls the transmission of the first processing signal to the voltage receiving end or the current receiving end.

[0040] The timing control module 7 is connected to the anomaly detection module 6. It is used to set the timing time and start the timing operation when the first control signal is received. It also intermittently controls the first transmission module 3 to transmit the first detection signal to the voltage processing module 4 and switches the signal transmission path of the signal receiving module 8.

[0041] In a specific embodiment, the power supply module 1 can be a power circuit composed of a power processing device, a detection load, and a resistor, which can provide electrical energy and power the detection load; the load detection module 2 can be a load detection circuit composed of resistors, which can perform voltage sampling and current sampling; the first transmission module 3 can be a first transmission circuit composed of analog switches, which can perform signal transmission and signal switching transmission; the voltage processing module 4 can be a voltage processing circuit composed of an operational amplifier, resistors, and capacitors, which can perform differential amplification processing on the input signal; the current processing module 5 can be a current processing circuit composed of a signal processing device, which can perform differential amplification processing on the input signal; the anomaly detection module 6 can... An anomaly detection circuit composed of a comparator, logic chip, and self-locking device can detect voltage fluctuations in the input and output signals of the current processing module 5, and when the input and output voltages are unequal, it self-locks and outputs a high-level signal. The aforementioned timing control module 7 can be a timing control circuit composed of a transistor and a timing device, which can set the timing time and perform intermittent timing operation, that is, timing control of the signal switching operation of the first transmission module 3 and the signal receiving module 8. The aforementioned signal receiving module 8 can be a signal receiving circuit composed of an analog switch and a signal receiving device, which can control the transmission of electrical energy and the transmission path, and the current receiving terminal and voltage receiving terminal of the signal receiving device receive the corresponding processed signals detected.

[0042] In another embodiment, please refer to Figure 1 , Figure 2 and Figure 3 The power module 1 includes a power processing module, a detection load, a fourth resistor R4, and a fifth resistor R5; the load detection module 2 includes a first resistor R1, a second resistor R2, and a third resistor R3.

[0043] Specifically, the first output terminal of the power processing device is connected to the first end of the fifth resistor R5 and the first end of the fourth resistor R4. The second end of the fifth resistor R5 and the second end of the fourth resistor R4 are connected to the first transmission module 3. The second output terminal of the power processing device is connected to the detection load and the first end of the second resistor R2. The second end of the second resistor R2 is connected to the first end of the first resistor R1, the ground terminal and the ground terminal of the power processing device through the third resistor R3. The second end of the first resistor R1 is connected to the second end of the detection load.

[0044] In a specific embodiment, the power processing module can be composed of multiple voltage regulators, which can regulate the input electrical energy and provide regulated voltage through the first output terminal and the second output terminal respectively; the first resistor R1 performs current sampling; and the second resistor R2 and the third resistor R3 perform voltage sampling.

[0045] Furthermore, the first transmission module 3 includes a first analog switch IC1; the voltage processing module 4 includes a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, and a first capacitor C1.

[0046] Specifically, the third terminal of the first analog switch IC1 is connected to the second terminal of the second resistor R2. The first and eighth terminals of the first analog switch IC1 are both connected to the second terminal of the first resistor R1. The thirteenth and fifth terminals of the first analog switch IC1 are respectively connected to the second terminals of the fifth resistor R5 and the second terminal of the fourth resistor R4. The fourth and ninth terminals of the first analog switch IC1 are both connected to the non-inverting input of the first operational amplifier and one end of the seventh resistor R7 through the sixth resistor R6. The inverting input of the first operational amplifier is connected to one end of the eighth resistor R8 and connected to the output terminal of the first operational amplifier and the first terminal of the tenth resistor R10 through the ninth resistor R9. The second terminal of the tenth resistor R10 is connected to the other end of the eighth resistor R8, the other end of the seventh resistor R7 and ground through the first capacitor C1. The second terminal of the first analog switch IC1 is connected to the current processing module 5, and the sixth terminal of the first analog switch IC1 is connected to the timing control module 7.

[0047] In a specific embodiment, the first analog switch IC1 can be a CD4066 analog switch; the first operational amplifier can be an OP07 operational amplifier, which, together with the sixth resistor R6, the seventh resistor R7, the eighth resistor R8 and the ninth resistor R9, performs differential amplification processing, and the amplification factor is 1; the tenth resistor R10 and the first capacitor C1 perform filtering processing.

[0048] Furthermore, the current processing module 5 includes a signal processing device;

[0049] Specifically, the input terminal of the signal processing device is connected to the second terminal of the first analog switch IC1, the ground terminal of the signal processing device is grounded, and the output terminal of the signal processing device is connected to the signal receiving module 8.

[0050] In a specific embodiment, the circuit structure of the signal processing device is the same as that of the sixth resistor R6, the seventh resistor R7, the eighth resistor R8, the ninth resistor R9, the tenth resistor R10 and the first capacitor C1, and the amplification factor of the signal processing device is 1.

[0051] Furthermore, the signal receiving module 8 includes a second analog switch IC2 and a signal receiving device;

[0052] Specifically, the sixth terminal of the second analog switch IC2 is connected to the timing control module 7; the thirteenth and fifth terminals of the second analog switch IC2 are respectively connected to the second terminals of the fifth resistor R5 and the fourth resistor R4; the third and eighth terminals of the second analog switch IC2 are both connected to the second terminals of the tenth resistor R10; the first terminal of the second analog switch IC2 is connected to the output terminal of the signal processing device; the fourth terminal of the second analog switch IC2 is connected to the voltage receiving terminal of the signal receiving device; and the second and ninth terminals of the second analog switch IC2 are both connected to the current receiving terminal of the signal receiving device.

[0053] In a specific embodiment, the second analog switch IC2 can be a CD4066 analog switch; the signal receiving device can be a CPU.

[0054] Furthermore, the timing control module 7 includes a third switch V3, a first switch V1, a second switch V2, and a timing device;

[0055] Specifically, the power supply terminal of the timing device is connected to the emitter of the third switching transistor V3, the base of the third switching transistor V3 is connected to the abnormal detection module 6 and the base of the first switching transistor V1, the collector of the third switching transistor V3 is connected to the first output terminal of the power processing device, the ground terminal of the timing device, the emitter of the first switching transistor V1 and the emitter of the second switching transistor V2 are all grounded, the output terminal of the timing device is connected to the base of the second switching transistor V2, the sixth terminal of the first analog switch IC1 and the sixth terminal of the second analog switch IC2, and the collectors of the first switching transistor V1 and the second switching transistor V2 are respectively connected to the second terminal of the fifth resistor R5 and the second terminal of the fourth resistor R4.

[0056] In a specific embodiment, the third switch V3, the first switch V1, and the second switch V2 can all be NPN transistors; the timing device can be composed of an NE555 timer, diodes, resistors, and capacitors. After being powered on, it can start timing and output a high-level signal at regular intervals. After the timing ends, it stops outputting the high-level signal and restarts timing and outputs the high-level signal at regular intervals after a period of time, and so on.

[0057] Furthermore, the anomaly detection module 6 includes a first comparator A1, a second comparator A2, a first logic chip J1, and a self-locking device;

[0058] Specifically, the non-inverting input of the first comparator A1 is connected to the inverting input of the second comparator A2 and the input of the signal processing device; the inverting input of the first comparator A1 is connected to the non-inverting input of the second comparator A2 and the output of the signal processing device; the output of the first comparator A1 and the output of the second comparator A2 are respectively connected to the A and B terminals of the first logic chip J1; the Y terminal of the first logic chip J1 is connected to the input of the self-locking device; and the output of the self-locking device is connected to the base of the first switching transistor V1 and the base of the third switching transistor V3.

[0059] In a specific embodiment, both the first comparator A1 and the second comparator A2 can be selected as LM358 comparators; the first logic chip J1 can be selected as an XOR gate chip; the self-locking device can be composed of a transistor and a resistor, which can self-lock the input high-level signal and continuously output the high-level signal.

[0060] In this embodiment, a voltage and current signal detection circuit uses a power supply processing device to regulate the voltage and supply power to the detection load. A first resistor R1 samples the current of the detection load and outputs a first detection signal. Second resistors R2 and R3 sample the voltage of the detection load and output a second detection signal. Because the third and fourth terminals of the first analog switch IC1 are conducting, the first and second terminals of the first analog switch IC1 are also conducting, allowing the first detection signal to be transmitted to a signal processing device for differential amplification and filtering, outputting a second processed signal. The second detection signal undergoes differential amplification and filtering through a first operational amplifier, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, and a first capacitor C1, outputting a first processed signal. The first processed signal is transmitted to the voltage receiving terminal of a signal receiving device through the third and fourth terminals of a second analog switch IC2. The second processed signal then passes through the first terminal of the second analog switch IC2. The signal is transmitted from the first terminal to the second terminal to the current receiving terminal of the signal receiving device. At the same time, the first comparator A1 and the second comparator A2 compare the voltage of the signal input to the signal processing device and the signal output by the signal processing device. When the input voltage and the output voltage are not equal, the first logic chip J1 outputs a high-level signal and performs self-locking processing by the self-locking device. The first control signal is output to control the third switch V3 and the first switch V1 to conduct. The timing device starts timing operation. The first detection signal is transmitted to the first operational amplifier through the eighth and ninth terminals of the first analog switch IC1. After processing by the first operational amplifier, it is transmitted to the current receiving terminal of the signal receiving device through the eighth and ninth terminals of the second analog switch IC2. After the timing ends, the second detection signal is processed again and transmitted to the voltage receiving terminal of the signal receiving device. After a period of time, the timing operation starts again and performs cyclic control to maintain the current and voltage detection of the detection load.

[0061] It will be apparent to those skilled in the art that this invention is not limited to the details of the exemplary embodiments described above, and that it can be implemented in other specific forms without departing from the spirit or essential characteristics of this invention. Therefore, the embodiments should be considered illustrative and non-limiting in all respects, and the scope of this invention is defined by the appended claims rather than the foregoing description. Thus, it is intended that all variations falling within the meaning and scope of equivalents of the claims be included within this invention. No reference numerals in the claims should be construed as limiting the scope of the claims.

[0062] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A voltage and current signal detection circuit, characterized in that, The voltage and current signal detection circuit includes: a power supply module, a load detection module, a first transmission module, a voltage processing module, a current processing module, an anomaly detection module, a timing control module, and a signal receiving module. The power module is used to supply power; The load detection module is connected to the power supply module and is used to sample the current and voltage of the power supply module and output a first detection signal and a second detection signal respectively. The first transmission module is connected to the power supply module, load detection module, timing control module, voltage processing module and current processing module. It is used to control the transmission status of the first detection signal and the second detection signal, and transmit the first detection signal to the current processing module and the second detection signal to the voltage processing module. The timing control module controls the transmission of the first detection signal to the voltage processing module. The voltage processing module is used to differentially amplify the input first detection signal or the second detection signal and output the first processed signal; The current processing module is used to differentially amplify the first detection signal and output a second processed signal; The anomaly detection module is connected to the current processing module and is used to perform voltage detection on the first detection signal and the second processing signal, and to output the first control signal by self-locking when the voltages of the first detection signal and the second processing signal are not equal. The signal receiving module is connected to the power supply module, voltage processing module, current processing module and timing control module. It is used to receive the first processed signal and the second processed signal through the voltage receiving end and the current receiving end respectively and perform signal processing. The timing control module controls the transmission of the first processed signal to the voltage receiving end or the current receiving end. The timing control module is connected to the anomaly detection module and is used to set the timing time. When the first control signal is received, the timing operation is started and the first transmission module is intermittently controlled to transmit the first detection signal to the voltage processing module, and the signal transmission path of the signal receiving module is switched.

2. The voltage and current signal detection circuit according to claim 1, characterized in that, The power module includes a power processing device, a detection load, a fourth resistor, and a fifth resistor; the load detection module includes a first resistor, a second resistor, and a third resistor. The first output terminal of the power processing device is connected to the first terminal of the fifth resistor and the first terminal of the fourth resistor. The second terminal of the fifth resistor and the second terminal of the fourth resistor are connected to the first transmission module. The second output terminal of the power processing device is connected to the detection load and the first terminal of the second resistor. The second terminal of the second resistor is connected to the first terminal of the first resistor, the ground terminal and the ground terminal of the power processing device through the third resistor. The second terminal of the first resistor is connected to the second terminal of the detection load.

3. The voltage and current signal detection circuit according to claim 2, characterized in that, The first transmission module includes a first analog switch; the voltage processing module includes a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, and a first capacitor; The third terminal of the first analog switch is connected to the second terminal of the second resistor. The first and eighth terminals of the first analog switch are both connected to the second terminal of the first resistor. The thirteenth and fifth terminals of the first analog switch are respectively connected to the second terminals of the fifth and fourth resistors. The fourth and ninth terminals of the first analog switch are both connected to the non-inverting input of the first operational amplifier and one end of the seventh resistor through the sixth resistor. The inverting input of the first operational amplifier is connected to one end of the eighth resistor and is connected to the output terminal of the first operational amplifier and the first terminal of the tenth resistor through the ninth resistor. The second terminal of the tenth resistor is connected to the other end of the eighth resistor, the other end of the seventh resistor, and ground through the first capacitor. The second terminal of the first analog switch is connected to the current processing module, and the sixth terminal of the first analog switch is connected to the timing control module.

4. The voltage and current signal detection circuit according to claim 3, characterized in that, The current processing module includes a signal processing device; The input terminal of the signal processing device is connected to the second terminal of the first analog switch, the ground terminal of the signal processing device is grounded, and the output terminal of the signal processing device is connected to the signal receiving module.

5. A voltage and current signal detection circuit according to claim 4, characterized in that, The signal receiving module includes a second analog switch and a signal receiving device; The sixth terminal of the second analog switch is connected to the timing control module. The thirteenth and fifth terminals of the second analog switch are respectively connected to the second terminals of the fifth and fourth resistors. The third and eighth terminals of the second analog switch are both connected to the second terminals of the tenth resistor. The first terminal of the second analog switch is connected to the output terminal of the signal processing device. The fourth terminal of the second analog switch is connected to the voltage receiving terminal of the signal receiving device. The second and ninth terminals of the second analog switch are both connected to the current receiving terminal of the signal receiving device.

6. A voltage and current signal detection circuit according to claim 5, characterized in that, The timing control module includes a third switching transistor, a first switching transistor, a second switching transistor, and a timing device; The power supply terminal of the timing device is connected to the emitter of the third switching transistor. The base of the third switching transistor is connected to the abnormal detection module and the base of the first switching transistor. The collector of the third switching transistor is connected to the first output terminal of the power processing device. The ground terminal of the timing device, the emitter of the first switching transistor, and the emitter of the second switching transistor are all grounded. The output terminal of the timing device is connected to the base of the second switching transistor, the sixth terminal of the first analog switch, and the sixth terminal of the second analog switch. The collectors of the first switching transistor and the second switching transistor are respectively connected to the second terminal of the fifth resistor and the second terminal of the fourth resistor.

7. A voltage and current signal detection circuit according to claim 6, characterized in that, The anomaly detection module includes a first comparator, a second comparator, a first logic chip, and a self-locking device; The non-inverting input of the first comparator is connected to the inverting input of the second comparator and the input of the signal processing device. The inverting input of the first comparator is connected to the non-inverting input of the second comparator and the output of the signal processing device. The outputs of the first and second comparators are respectively connected to the A and B terminals of the first logic chip. The Y terminal of the first logic chip is connected to the input of the self-locking device. The output of the self-locking device is connected to the base of the first switching transistor and the base of the third switching transistor.

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