Slave ID calibration module of battery management system

Abstract

The utility model relates to new energy automobile technical field discloses a kind of slave ID calibration module of battery management system, including system link;The system link includes: host BCU, BMU link combination and CAN communication link;The BMU link combination includes at least one BMU unit, and adjacent BMU unit is linked in series by the CAN communication link;The host BCU and BMU link combination are connected by the CAN communication link, and the series link mode of setting host BCU, BMU link combination and CAN communication link realizes ID calibration function, system scheme is simply and low in cost, production line installation fault tolerance is high by such setting, also simultaneously avoided the risk of installation position error caused by manual ID calibration, causes the data misregistration of acquisition, cannot correctly diagnose cell fault position.

Description

Technical Field

[0001] This utility model relates to the field of new energy vehicle technology, specifically to a slave ID calibration module for a battery management system. Background Technology

[0002] With the development and maturation of new energy vehicles, more and more vehicles are using lithium batteries as their power source, including passenger cars, commercial vehicles, heavy trucks, and buses. In particular, large vehicles such as commercial vehicles and heavy trucks have larger battery packs with higher voltages than passenger cars, and the application of multiple branches and multiple packs in series and parallel is more widespread. This requires that each battery pack be equipped with a slave device of the battery management system to collect the voltage and temperature of individual cells and communicate with the master device of the battery management system via CAN. This requires that multiple battery packs in the battery system be assigned a unique ID and managed and calibrated to ensure that the BMS can accurately identify and monitor the status of each battery pack.

[0003] Conventional slave ID calibration is usually performed manually via a host computer before the battery pack is taken off the production line. Then, the battery pack is installed in the corresponding position according to the calibrated ID. However, due to the varying levels of responsibility and skill among assembly workers, there is a risk of incorrect installation positions, which can lead to misaligned data and make it impossible to correctly diagnose the location of cell faults. Alternatively, multiple battery pack IDs may be duplicated, causing the BMS to fail to identify them correctly. Therefore, when replacing battery packs in the future, calibration must be performed according to the actual position of the battery pack. Utility Model Content

[0004] The purpose of this utility model is to provide a slave ID calibration module for a battery management system, and to solve the following technical problems;

[0005] Incorrect installation location of slave device ID calibration can lead to misaligned data collection, making it impossible to correctly diagnose the location of cell faults. Alternatively, duplicate battery pack IDs can prevent the BMS from correctly identifying the battery pack.

[0006] The objective of this utility model can be achieved through the following technical solutions:

[0007] A slave ID calibration module for a battery management system includes: a master BCU, a BMU link combination, and a CAN communication link;

[0008] The BMU link assembly includes at least one BMU unit, and adjacent BMU units are linked in series through the CAN communication link.

[0009] The host BCU and BMU are connected via the CAN communication link.

[0010] Furthermore, the host BCU has a built-in signal output module;

[0011] For one of the BMU units, the BMU unit has a built-in signal output module and a signal input module;

[0012] The signal output module is connected to the signal input module of another adjacent BMU unit.

[0013] Furthermore, the signal output module includes resistor R1, resistor R2, transistor Q1, resistor R3, and capacitor C1;

[0014] Wherein, one end of resistor R1 is connected to MCU, and the other end is connected to one end of resistor R2 and the base of transistor Q1, and the emitter of transistor Q1 and the other end of resistor R2 are grounded;

[0015] The collector of transistor Q1 is the signal output terminal, which is connected to one end of resistor R3. The other end of resistor R3 is connected to a 24V power supply and one end of capacitor C1. The other end of capacitor C1 is grounded.

[0016] Furthermore, the signal output module also includes resistor R5, resistor R4, and capacitor C2;

[0017] In this configuration, one end of resistor R5 is connected to the collector of transistor Q1, and the other end of resistor R5 is connected to one end of resistor R4; resistor R4 is connected to the emitter of transistor Q1; capacitor C2 is connected in parallel with resistor R5; and the connection between resistors R4 and R5 is connected to the MCU.

[0018] Furthermore, the signal input module includes resistors R5, R6, and R7, transistor Q2, resistor R8, capacitor C3, and diode D1;

[0019] In this configuration, one end of resistor R5 is connected to the input signal, and the other end of resistor R5 is connected to resistors R6 and R7. The emitter of transistor Q2 and the other end of resistor R7 are grounded. One end of resistor R6 is connected to the base of transistor Q2. Diode D1 is connected in parallel with resistors R5 and R6. The base of transistor Q2 is connected to resistor R8 and the MCU. Resistor R8 is connected to capacitor C3 and the 5V power supply. The other end of capacitor C3 is grounded.

[0020] Furthermore, the signal input module also includes resistor R10, resistor R9, and capacitor C4;

[0021] Wherein, one end of resistor R10 is connected to the collector of transistor Q1, and the other end of resistor R10 is connected to one end of resistor R9; resistor R9 is connected to the emitter of transistor Q1; capacitor C4 is connected in parallel with resistor R10; the middle part of resistor R10 and resistor R9 is connected to MCU.

[0022] The beneficial effects of this utility model are:

[0023] (1) The ID calibration function is realized by setting up the host BCU, BMU link combination and CAN communication link in series. This system setting solution is simple and low cost, and the production line installation fault tolerance rate is high. It also avoids the risk of incorrect installation position caused by manual ID calibration, which will cause the collected data to be misaligned and unable to correctly diagnose the cell fault location. Attached Figure Description

[0024] The present invention will be further described below with reference to the accompanying drawings.

[0025] Figure 1 This is a system chain diagram of the slave ID calibration module of this utility model;

[0026] Figure 2 This is a diagram of the signal output module of the slave ID calibration module of this utility model;

[0027] Figure 3 This is a diagram of the signal input module of the slave ID calibration module of this utility model;

[0028] Figure 4 This is a flowchart of the slave ID calibration module of this utility model. Detailed Implementation

[0029] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of the present utility model.

[0030] Please see Figures 1-4 As shown, this utility model is a slave ID calibration module for a battery management system, including: a master BCU, a BMU link combination and a CAN communication link;

[0031] The BMU link assembly includes at least one BMU unit, and adjacent BMU units are linked in series through the CAN communication link.

[0032] The host BCU and BMU are connected via the CAN communication link.

[0033] After powering on the host BCU and BMU units, the host BCU completes initialization and begins issuing encoding commands. The host BCU first sends an encoded message to the bus via the CAN communication link. Then, the first BMU unit receives the corresponding encoded message and detects a low-level input signal. If the received ID differs from the previously stored ID, it writes the received ID into the NVM; otherwise, it doesn't need to write it into the NVM. After completing encoding, the first BMU unit sends a calibration completion message to the CAN communication link. Upon detecting the communication data from the first BMU unit on the bus, the host BCU stops sending BMU unit encoding commands and instead sends encoding commands to the second BMU unit on the bus. After receiving the encoding instruction from the second BMU unit, the first BMU unit pulls its signal output module low. This process continues until all BMU units have been encoded. Data transmission to the bus is prohibited until all BMU units are encoded, at which point bus data communication returns to normal, and the BCU exits the encoding process. The ID calibration function is achieved by setting up a series connection between the host BCU, BMU links, and the CAN communication link. This system setup is simple, low-cost, and has a high tolerance for errors during production line installation. It also avoids the risk of incorrect installation location caused by manual ID calibration, which could lead to misaligned data and prevent accurate diagnosis of cell fault locations.

[0034] Please refer to the attached image. Figure 1 As shown, specifically, the host BCU has a built-in signal output module;

[0035] For one of the BMU units, the BMU unit has a built-in signal output module and a signal input module;

[0036] The signal output module is connected to the signal input module of another adjacent BMU unit;

[0037] Control signals generated by the host BCU are sent by the output signal module within the host BCU and loaded by the signal input module within the first BMU unit. When the host BCU needs to send a signal to the second BMU unit, it sends the signal through the host BCU's signal output module, which is received by the signal input module within the first BMU unit. After receiving the signal, the signal input module within the first BMU unit sends the signal to its internal signal output module for transmission, and then to the signal input module of the second BMU unit for loading. Subsequent transmission modes follow the same pattern.

[0038] Please refer to the attached image. Figure 2As shown, specifically, the signal output module includes resistor R1, resistor R2, transistor Q1, resistor R3, and capacitor C1;

[0039] Wherein, one end of resistor R1 is connected to MCU, and the other end is connected to one end of resistor R2 and the base of transistor Q1, and the emitter of transistor Q1 and the other end of resistor R2 are grounded;

[0040] The collector of transistor Q1 is the signal output terminal, which is connected to one end of resistor R3. The other end of resistor R3 is connected to a 24V power supply and one end of capacitor C1. The other end of capacitor C1 is grounded.

[0041] The MCU within the module generates a control signal, which, after being divided by resistors R1 and R2, drives transistor Q1 to conduct. The emitter of transistor Q1 is connected to the 24V power supply through resistor R3. The 24V power supply is connected to ground (GND) via capacitor C1. The signal output module is a digital level signal output circuit with diagnostic feedback functionality.

[0042] Please refer to the attached image. Figure 2 As shown, specifically, the signal output module also includes resistor R5, resistor R4, and capacitor C2;

[0043] Wherein, one end of resistor R5 is connected to the collector of transistor Q1, and the other end of resistor R5 is connected to one end of resistor R4; resistor R4 is connected to the emitter of transistor Q1; capacitor C2 is connected in parallel with resistor R5; the middle part of resistor R4 and resistor R5 is connected to MCU.

[0044] The emitter of transistor Q1 is connected to the MCU through a voltage divider via resistors R4 and R5 to acquire the analog signal level, which is used for fault diagnosis of the signal level output.

[0045] Please refer to the attached image. Figure 3 As shown, specifically, the signal input module includes resistors R5, R6, and R7, transistor Q2, resistor R8, capacitor C3, and diode D1;

[0046] In this configuration, one end of resistor R5 is connected to the input signal, and the other end of resistor R5 is connected to resistors R6 and R7. The emitter of transistor Q2 and the other end of resistor R7 are grounded. One end of resistor R6 is connected to the base of transistor Q2. Diode D1 is connected in parallel with resistors R5 and R6. The base of transistor Q2 is connected to resistor R8 and the MCU. Resistor R8 is connected to capacitor C3 and the 5V power supply. The other end of capacitor C3 is grounded.

[0047] The level signal generated by the signal output module is connected to resistor R5 of the signal input module. After being divided by resistors R5 and R7, it is connected to transistor Q2 through resistor R6. The emitter of transistor Q2 is connected to the 5V power supply through resistor R8. The emitter of transistor Q2 is connected to GND through diode D1. The emitter of transistor Q2 is connected to GND and then to the MCU inside the signal input module. The signal input module is a level detection circuit that also has analog signal acquisition function.

[0048] Please refer to the attached image. Figure 3 As shown, specifically, the signal input module also includes resistor R10, resistor R9, and capacitor C4;

[0049] Wherein, one end of resistor R10 is connected to the collector of transistor Q1, and the other end of resistor R10 is connected to one end of resistor R9; resistor R9 is connected to the emitter of transistor Q1; capacitor C4 is connected in parallel with resistor R10; the middle part of resistor R10 and resistor R9 is connected to MCU.

[0050] The diagnostic signal is divided by resistors R9 and R10 and then connected to the diagnostic pin of the MCU for fault diagnosis of level signal input.

[0051] The working principle of this invention is as follows: Upon power-up of the host BCU and BMU units, after initialization, the host BCU begins issuing encoding commands. The host BCU first sends an encoded message to the bus via the CAN communication link. Then, the first BMU unit receives the corresponding encoded message and detects a low-level input signal. If the received ID differs from the previously stored ID, it writes the received ID into the NVM; otherwise, it does not need to write it into the NVM. After completing encoding, the first BMU unit sends a calibration completion message to the CAN communication link. Upon detecting the communication data from the first BMU unit on the bus, the host BCU stops sending BMU unit encoding commands and instead sends commands to the second BMU unit on the bus. Upon receiving the encoding command from the second BMU unit, the first BMU unit pulls its signal output module low, and so on, numbering the BMU units accordingly. Data transmission to the bus is prohibited until all BMU units have completed encoding. Once all BMU units are encoded, bus data communication returns to normal, and the BCU exits the encoding process. The ID calibration function is achieved by setting up a series connection between the host BCU, BMU links, and the CAN communication link. This system setup is simple, low-cost, and has a high tolerance for errors during production line installation. It also avoids the risk of incorrect installation location caused by manual ID calibration, which could lead to misaligned data and prevent accurate diagnosis of cell fault locations.

[0052] The above description provides a detailed account of one embodiment of the present invention. However, this description is merely a preferred embodiment and should not be construed as limiting the scope of the present invention. All equivalent variations and improvements made within the scope of the claims of the present invention should still fall within the patent coverage of the present invention.

Claims

1. A slave ID calibration module for a battery management system, characterized in that, include: Host BCU and BMU link combination and CAN communication link; The BMU link assembly includes at least one BMU unit, and adjacent BMU units are linked in series through the CAN communication link. The host BCU and BMU are connected via the CAN communication link.

2. The slave ID calibration module of a battery management system according to claim 1, characterized in that, The host BCU has a built-in signal output module; For one of the BMU units, the BMU unit has a built-in signal output module and a signal input module; The signal output module is connected to the signal input module of another adjacent BMU unit.

3. The slave ID calibration module of a battery management system according to claim 2, characterized in that, The signal output module includes resistor R1, resistor R2, transistor Q1, resistor R3, and capacitor C1; Wherein, one end of resistor R1 is connected to MCU, and the other end is connected to one end of resistor R2 and the base of transistor Q1, and the emitter of transistor Q1 and the other end of resistor R2 are grounded; The collector of transistor Q1 is the signal output terminal, which is connected to one end of resistor R3. The other end of resistor R3 is connected to a 24V power supply and one end of capacitor C1. The other end of capacitor C1 is grounded.

4. The slave ID calibration module of a battery management system according to claim 3, characterized in that, The signal output module also includes resistor R5, resistor R4, and capacitor C2; In this configuration, one end of resistor R5 is connected to the collector of transistor Q1, and the other end of resistor R5 is connected to one end of resistor R4; resistor R4 is connected to the emitter of transistor Q1; capacitor C2 is connected in parallel with resistor R5; and the connection between resistors R4 and R5 is connected to the MCU.

5. The slave ID calibration module of a battery management system according to claim 4, characterized in that, The signal input module includes resistors R5, R6, and R7, transistor Q2, resistor R8, capacitor C3, and diode D1; In this configuration, one end of resistor R5 is connected to the input signal, and the other end of resistor R5 is connected to resistors R6 and R7. The emitter of transistor Q2 and the other end of resistor R7 are grounded. One end of resistor R6 is connected to the base of transistor Q2. Diode D1 is connected in parallel with resistors R5 and R6. The base of transistor Q2 is connected to resistor R8 and the MCU. Resistor R8 is connected to capacitor C3 and the 5V power supply. The other end of capacitor C3 is grounded.

6. The slave ID calibration module of a battery management system according to claim 5, characterized in that, The signal input module also includes resistor R10, resistor R9, and capacitor C4; Wherein, one end of resistor R10 is connected to the collector of transistor Q1, and the other end of resistor R10 is connected to one end of resistor R9; resistor R9 is connected to the emitter of transistor Q1; capacitor C4 is connected in parallel with resistor R10; the middle part of resistor R10 and resistor R9 is connected to MCU.

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