Triop subtractor circuit arrangement

Abstract

The utility model relates to three operational amplifier subtraction operation circuit device, its circuit actual object can adopt high -quality PCB welding technology to integrate each component and its connecting circuit, to ensure that circuit connection is stable and reliable, solve the time -consuming and labor -intensive problem when student builds the circuit, form the flexible and efficient special experimental circuit board of wiring. A plurality of test points are reserved on the circuit, can be convenient for student to use multimeter, oscilloscope and other instruments real -time measurement each node's voltage, current and the like parameter, be convenient for observation circuit dynamic change, and the design of gain regulator and connector makes student can conveniently adjust the gain of circuit, studies the influence of gain on circuit performance, simultaneously, this design also is convenient for teacher to demonstrate on the classroom, through the regulation gain, intuitively shows the influence of gain on output signal amplitude, deepens the understanding of gain concept of student, improves teaching use efficiency.

Description

Technical Field

[0001] This utility model belongs to the field of teaching aid circuit design technology, and relates to a three-operation amplifier subtraction operation circuit device. Background Technology

[0002] The three-op-amp subtraction circuit has significant theoretical and practical value in the field of analog electronics and is one of the challenging aspects of teaching. It requires explanation using physical circuit diagrams to help students connect abstract theories with experimental circuit phenomena, thereby improving teaching effectiveness. The three-op-amp subtraction circuit includes various components such as operational amplifiers, resistors, and capacitors, and the connections between these components are complex. Building the experimental circuit from scratch in class can slow down the teacher's pace and place excessive demands on beginners' hands-on skills, which is not practical for teaching. Using existing fixed-function circuits for demonstration experiments can only support the principle of a certain part of the three-op-amp subtraction circuit, which is not conducive to students' understanding of the overall and local relationships of the circuit, lacking a holistic perspective. Furthermore, fixed circuits make it difficult to dynamically adjust parameters such as gain and input impedance, and are not convenient for intuitively demonstrating the voltage changes at each node in the circuit, resulting in low flexibility. Therefore, designing a dedicated experimental circuit board with flexible and efficient wiring has become one of the technical problems that needs to be solved. Utility Model Content

[0003] To address the problems existing in the above-mentioned traditional technologies, this utility model proposes a three-operation amplifier subtraction circuit device, which can provide a dedicated experimental circuit board with flexible and efficient wiring.

[0004] To achieve the above objectives, the embodiments of this utility model adopt the following technical solutions:

[0005] A three-op-amp subtraction circuit device is provided, including test point ANI1, test point ANI2, test point ANI3, connector J1, connector J2, connector J3, operational amplifier U1A, operational amplifier U1B, operational amplifier U2A, gain regulator, resistor R1, resistor R2, resistor R3, resistor R4, resistor R5, resistor R6, resistor R7, resistor R8 and resistor R9;

[0006] The input terminal of connector J2 is connected to test point ANI1 and used to receive the signal output from an external signal source. The first output terminal of connector J2 is connected to the non-inverting input terminal of operational amplifier U1A. The second output terminal of connector J2 is connected to one end of resistor R4. The input terminal of connector J3 is connected to test point ANI2 and used to receive the signal output from an external signal source. The first output terminal of connector J3 is connected to the non-inverting input terminal of operational amplifier U1B. The second output terminal of connector J3 is connected to one end of resistor R9. The inverting input terminal of operational amplifier U1A is connected between resistors R5 and R6 in series. The output terminals of operational amplifier U1A are connected to one end of resistor R5 and one end of resistor R4 respectively. The inverting input terminal of operational amplifier U1B is connected between resistors R7 and R8 in series. The output terminals of operational amplifier U1B are connected to one end of resistor R8 and one end of resistor R9 respectively. The ground terminal of connector J1 is grounded. One pair of terminals of connector J1 is connected in series through a gain regulator. The two terminals of the other pair of terminals of connector J1 are connected to the other end of resistor R6 and the other end of resistor R7 respectively.

[0007] The inverting input of operational amplifier U2A is connected to the other end of resistor R4. The non-inverting input of operational amplifier U2A is connected between resistors R9 and R2 in series. The other end of resistor R2 is grounded. The output of operational amplifier U2A is connected to the other end of resistor R4 through resistor R1. Test point ANI3 is connected to the output of operational amplifier U2A. Operational amplifiers U1A, U1B, and U2A are used to form a subtraction circuit. Operational amplifiers U1A and U1B are the differential input stages of operational amplifier U2A. Test points AIN1 and AI are connected to the output of operational amplifier U2A. N2 is used to connect the differential input signal of the branch to be tested. AIN3 is used to connect the output signal of operational amplifier U2A to be tested. Connector J1 is used to switch the gain of operational amplifiers U1A and U1B to adjustable or fixed. The gain adjuster is used to adjust the gain of operational amplifiers U1A and U1B. Connector J2 is used to switch the signal to the non-inverting input of operational amplifier U1A or to one end of resistor R4. Connector J3 is used to switch the signal to the non-inverting input of operational amplifier U1B or to one end of resistor R9.

[0008] In one embodiment, the gain regulator is a variable resistor.

[0009] In one embodiment, the above-mentioned three operational amplifier subtraction circuit device further includes jumper switches P1 and P2. One terminal of jumper switch P1 is connected to the output terminal of operational amplifier U1A and one end of resistor R5, and the other terminal of jumper switch P1 is connected to one end of resistor R4. One terminal of jumper switch P2 is connected to the output terminal of operational amplifier U1B and one end of resistor R8, and the other terminal of jumper switch P2 is connected to one end of resistor R9.

[0010] In one embodiment, the above-mentioned three operational amplifier subtraction circuit device further includes a switch SW1 and two signal source terminals. The first input terminal of the switch SW1 is connected to a signal source terminal for receiving signal S1, and the second input terminal of the switch SW1 is connected to another signal source terminal for receiving signal S2. The output terminal of the switch SW1 is connected to the test point ANI2 and the input terminal of connector J3, respectively. The input terminal of connector J2 is used to receive signal S1.

[0011] In one embodiment, the above-mentioned three operational amplifier subtraction circuit device further includes an oscilloscope connection port, wherein each terminal of the oscilloscope connection port is connected to test point ANI1, test point ANI2 and test point ANI3 respectively, and the oscilloscope connection port is used to connect an oscilloscope.

[0012] In one embodiment, the above-mentioned three operational amplifier subtraction circuit device further includes an onboard power interface, which is connected to the power supply terminals of operational amplifiers U1A, U1B and U2A respectively, and is used to connect to an external power supply.

[0013] In one embodiment, the above-described three operational amplifier subtraction circuit device further includes a multimeter test interface, which is connected to the connection points between each component and is used to connect a multimeter.

[0014] One of the above technical solutions has the following advantages and beneficial effects:

[0015] The aforementioned three-op-amp subtraction circuit can be integrated using high-quality PCB soldering technology to ensure stable and reliable circuit connections. This solves the problem of time-consuming and laborious circuit building for students, creating a flexible and efficient dedicated experimental circuit board. Multiple test points are pre-installed on the circuit, allowing students to easily connect external instruments such as multimeters and oscilloscopes to measure voltage, current, and other parameters at each node in real time, facilitating observation of dynamic circuit changes. The design of the gain regulator R3 and connector J1 allows students to easily adjust the circuit gain and study its impact on circuit performance. This design also facilitates classroom demonstrations by teachers, allowing them to visually demonstrate the effect of gain on the output signal amplitude, deepening students' understanding of the gain concept and improving teaching efficiency. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of this utility model or the conventional technology, the drawings used in the description of the embodiments or the conventional technology will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 This is a schematic diagram of the circuit structure of a three-operation amplifier subtraction circuit device in one embodiment;

[0018] Figure 2 This is a schematic diagram of the physical circuit of a three-operation amplifier subtraction operation circuit in one embodiment. Detailed Implementation

[0019] To make the objectives, technical solutions, and advantages of this utility model clearer, the present utility model will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only for explaining the present utility model and are not intended to limit the present utility model. Unless otherwise defined, all technical and scientific terms used in this utility model have the same meaning as commonly understood by one of ordinary skill in the art to which this utility model belongs. The terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the present utility model.

[0020] It should be noted that the reference to "embodiment" in this utility model means that a specific feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of this utility model. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. Those skilled in the art will understand that the embodiments described in this utility model can be combined with other embodiments. The term "and / or" as used in this utility model specification refers to any combination and all possible combinations of one or more of the associated listed items, and includes such combinations.

[0021] The embodiments of this utility model will now be described in detail with reference to the accompanying drawings.

[0022] In one embodiment, such as Figure 1As shown, a three-op-amp subtraction circuit is provided, including test points ANI1, ANI2, and ANI3, connectors J1, J2, and J3, operational amplifiers U1A, U1B, and U2A, a gain adjuster, and resistors R1, R2, R3, R4, R5, R6, R7, R8, and R9. The input terminal of connector J2 (e.g., pin 2) is connected to test point ANI1 and used to receive the signal output from an external signal source. The first output terminal of connector J2 (e.g., pin 1) is connected to the non-inverting input terminal of operational amplifier U1A, and the second output terminal of connector J2 (e.g., pin 3) is connected to one end of resistor R4. The input terminal of connector J3 (e.g., pin 2) is connected to test point ANI2 and used to receive the signal output from an external signal source. The first output terminal of connector J3 (e.g., pin 3) is connected to the non-inverting input terminal of operational amplifier U1B, and the second output terminal of connector J3 (e.g., pin 1) is connected to one end of resistor R9. Operational amplifier U1A's inverting input is connected between resistors R5 and R6 in series. Its output is connected to one end of resistor R5 and one end of resistor R4. Operational amplifier U1B's inverting input is connected between resistors R7 and R8 in series. Its output is connected to one end of resistor R8 and one end of resistor R9. Connector J1's ground terminal (e.g., pins 5 and 6) is grounded. One pair of terminals on connector J1 (e.g., pins 1 and 2) is connected in series through gain regulator R3. The other pair of terminals on connector J1 (e.g., pins 3 and 4) are connected to the other ends of resistors R6 and R7, respectively. Operational amplifier U2A's inverting input is connected to the other end of resistor R4. Its non-inverting input is connected between resistors R9 and R2 in series. The other end of resistor R2 is grounded. Operational amplifier U2A's output is connected to the other end of resistor R4 through resistor R1. Test point ANI3 is connected to the output of operational amplifier U2A. Operational amplifiers U1A, U1B, and U2A are used to form a subtraction circuit. Operational amplifiers U1A and U1B are the differential input stages of operational amplifier U2A. Test points AIN1 and AIN2 are used to externally test the differential input signals of their respective branches. AIN3 is used to externally test the output signal of operational amplifier U2A. Connector J1 is used to switch the gain of operational amplifiers U1A and U1B to adjustable or fixed. The gain adjuster is used to adjust the gain of operational amplifiers U1A and U1B. Connector J2 is used to switch the signal to the non-inverting input of operational amplifier U1A or to one end of resistor R4. Connector J3 is used to switch the signal to the non-inverting input of operational amplifier U1B or to one end of resistor R9.

[0023] Understandable, such as Figure 1 As shown, the three operational amplifier subtraction circuit includes three operational amplifiers (U1A, U2A, and U1B). Operational amplifiers U1A and U1B are configured as differential amplifiers to amplify the voltage difference between two input signals. Together with operational amplifier U2A, they perform the subtraction operation. Connector J1 is used to switch the gain of operational amplifiers U1A and U1B. For example, when pins 2 and 4 of connector J1 are connected, and pins 1 and 3 are connected, the gain of operational amplifiers U1A and U1B can be adjusted using gain adjuster R3. When pins 3 and 4 of connector J1 are connected, the gain of operational amplifiers U1A and U1B can be fixed using resistors R6 and R7.

[0024] Connector J1 allows operational amplifiers U1A and U1B to operate in fixed gain or variable gain mode. The gain regulator R3 can be composed of resistors and / or capacitors. By adjusting the value of the feedback resistor between operational amplifiers U1A and U1B, the gain can be changed, thus supporting the setting of multiple adjustment points through the gain regulator R3. This allows students to easily change circuit parameters and conduct experiments to adjust performance such as gain and impedance.

[0025] Specifically, connector J2 is used to switch the signal output from an external signal source (denoted as S1) to the non-inverting input of operational amplifier U1A (the corresponding jumper cap in connector J2 connects to pins 1 and 2), or to switch signal S1 to one end of resistor R4 (the corresponding jumper cap in connector J2 connects to pins 1 and 3). The purpose is to bypass operational amplifier U1A, allowing signal S1 to directly enter operational amplifier U2A, which acts as a subtractor, through resistor R4. Similarly, connector J3 can be used to switch signal S1 to the non-inverting input of U1B (the corresponding jumper cap in connector J3 connects to pins 2 and 3), or to switch signal S1 to one end of resistor R9 (the corresponding jumper cap in connector J3 connects to pins 2 and 1). The purpose is to bypass operational amplifier U1B, allowing signal S1 to directly enter operational amplifier U2A, which acts as a subtractor, through resistor R9.

[0026] V represents the operating voltage of the operational amplifier. A suitable power supply (e.g., ±12V) can be selected based on the available operational amplifier model to provide the required operating voltage. Pins 5 and 6 of connector J1 are connected to ground to ensure circuit stability and safety. In addition, the circuit includes other components such as resistors R5, R6, R7, and R8, and capacitors C1, C2, C3, and C4, which are used for basic functions such as filtering and stabilization. Capacitors C1 and C2 are connected to the power supply terminals of operational amplifiers U1A and U2A, respectively, while capacitors C3 and C4 are connected to the power supply terminal of operational amplifier U2A. These components, together with the other components mentioned above, ensure the stability and reliability of the circuit under different operating conditions.

[0027] The aforementioned three-op-amp subtraction circuit can be integrated using high-quality PCB soldering technology to ensure stable and reliable circuit connections. This solves the problem of time-consuming and laborious circuit building for students, creating a flexible and efficient dedicated experimental circuit board. Multiple test points (such as AIN1, AIN2, and AIN3) are pre-installed on the circuit, allowing students to easily connect external instruments such as multimeters and oscilloscopes to measure voltage, current, and other parameters at each node in real time, facilitating observation of dynamic changes in the circuit. The design of the gain regulator R3 and connector J1 allows students to easily adjust the circuit gain and study its impact on circuit performance. This design also facilitates classroom demonstrations by teachers, allowing them to visually demonstrate the effect of gain on the output signal amplitude, deepening students' understanding of the gain concept and improving teaching efficiency.

[0028] In one embodiment, the gain regulator R3 is a variable resistor. It is understood that this embodiment employs a variable resistor design, which results in a simpler circuit structure, higher adjustment efficiency, and support for multiple gain levels, thereby further improving the circuit's efficiency.

[0029] In one embodiment, the above-mentioned three operational amplifier subtraction circuit device further includes jumper switches P1 and P2. One terminal of jumper switch P1 is connected to the output terminal of operational amplifier U1A and one end of resistor R5, and the other terminal of jumper switch P1 is connected to one end of resistor R4. One terminal of jumper switch P2 is connected to the output terminal of operational amplifier U1B and one end of resistor R8, and the other terminal of jumper switch P2 is connected to one end of resistor R9.

[0030] It can be understood that jumper switch P1 is used to disconnect (e.g., remove the jumper cap) the connection between the output terminal of operational amplifier U1A and one end of resistor R4, or to connect (e.g., insert the jumper cap) the output terminal of operational amplifier U1A to one end of resistor R4. Its purpose is to control the on / off connection between operational amplifier U1A and operational amplifier U2A. Similarly, jumper switch P2 is used to disconnect (e.g., remove the jumper cap) the connection between the output terminal of operational amplifier U1B and one end of resistor R9, or to connect (e.g., insert the jumper cap) the output terminal of operational amplifier U1B to one end of resistor R9. Its purpose is to control the disconnection between operational amplifier U1B and operational amplifier U2A. Resistors R1, R4, R9, and R2 are high-precision resistors (typically resistors with a resistance error of less than 1%, even reaching 0.1% or 0.01%, and possessing characteristics such as a low temperature coefficient) to ensure the performance stability, accuracy, and reliability of the circuit.

[0031] By using a jumper switch, the front and rear operational amplifier circuits can be separated, allowing for flexible switching of the connection status between the front and rear stages. This enables separate demonstrations of the front and rear stages, facilitating individual testing of each amplifier stage. Students can then study the working principle and performance indicators of each stage without having to build multiple circuits. This not only saves experimental time but also avoids errors introduced by frequent circuit disassembly and assembly, improving the accuracy and reliability of the experiment. Furthermore, it allows for quick switching between different operating modes, making it convenient for teachers to demonstrate circuit functions and improving teaching efficiency and quality.

[0032] In one embodiment, such as Figure 1 As shown, the above-mentioned three operational amplifier subtraction circuit device also includes a switch SW1 and two signal source terminals. The first input terminal of the switch SW1 is connected to a signal source terminal for inputting signal S1, and the second input terminal of the switch SW1 is connected to another signal source terminal for inputting signal S2. The output terminal of the switch SW1 is connected to the test point ANI2 and the input terminal of connector J3 respectively. The input terminal of connector J2 is used to input signal S1.

[0033] The circuit includes a switch SW1 for switching between two different external signal sources (e.g., S1 and S2). When switch SW1 is connected to signal S1, signal S1 enters both operational amplifiers U1A and U1B, allowing the circuit to be used to test common-mode rejection. When switch SW1 is connected to signal S2, signal S1 enters operational amplifier U1A, and signal S2 enters operational amplifier U1B, allowing the circuit to be used to test differential-mode gain. Correspondingly, connector J2 is used to switch the directly connected signal S1 to the non-inverting input of operational amplifier U1A (corresponding jumper cap in connector J2 connects to pins 1 and 2), or to switch signal S1 to one end of resistor R4 (corresponding jumper cap in connector J2 connects to pins 1 and 3). The purpose is to bypass operational amplifier U1A, allowing signal S1 to directly enter operational amplifier U2A, which acts as a subtractor, through resistor R4.

[0034] When switch SW1 connects to signal S1 output from the signal source, connector J3 is used to switch signal S1 to the non-inverting input of U1B (the corresponding jumper cap in connector J3 connects to pins 2 and 3), or to switch signal S1 to one end of resistor R9 (the corresponding jumper cap in connector J3 connects to pins 2 and 1). The purpose is to bypass operational amplifier U1B, allowing signal S1 to directly enter operational amplifier U2A, which acts as a subtractor, through resistor R9. Similarly, the same logic applies when switch SW1 connects to another signal output from the external signal source (which can be denoted as S2).

[0035] The circuit also provides two signal sources (such as...). Figure 2 The signal source markers shown are used to provide external expansion for at least two signals (such as signal S1 and signal S2). These can be selected as differential or common-mode signal inputs via switch SW1. This design allows students to complete differential amplification and common-mode rejection experiments on the same experimental circuit board, gaining a comprehensive understanding of the working principles and performance characteristics of instrumentation amplifiers. Simultaneously, this design facilitates classroom demonstrations and explanations by teachers, allowing for a direct visual demonstration of the effects of differential amplification and common-mode rejection by switching signal sources, thus improving teaching effectiveness.

[0036] In one embodiment, the above-described three-op-amp subtraction circuit device further includes an oscilloscope connection port (such as...). Figure 2 (As shown in the diagram, the oscilloscope logo) The terminals of the oscilloscope connector are connected to test points ANI1, ANI2 and ANI3 respectively. The oscilloscope connector is used to connect the oscilloscope.

[0037] It is understandable that an oscilloscope connection port has been added in this embodiment, so that students can directly connect an external oscilloscope to the board, thereby visually observing and learning the experimental signals through signal waveforms, and further improving the efficiency of use.

[0038] In one embodiment, the aforementioned three-op-amp subtraction circuit device further includes an onboard power interface (such as...). Figure 2 (As shown in the power indicator), the onboard power interface is connected to the power supply terminals of operational amplifiers U1A, U1B and U2A respectively, and is used to connect to an external power source.

[0039] It is understood that an onboard power interface is also added in this embodiment, so that the power supply of each component in the circuit does not need to be wired separately. The power supply can be quickly connected to the appropriate power supply through a unified power interface, so as to realize the circuit's fast and flexible power supply.

[0040] In one embodiment, the aforementioned three-op-amp subtraction circuit device further includes a multimeter test interface (such as...). Figure 2 (The multimeter symbol shown in the image) The multimeter test interface is connected to the connection points between each component. The multimeter test interface is used to connect the multimeter.

[0041] It is understood that in this embodiment, a multimeter test interface is also brought out at the circuit connection points of each component, so as to support the multimeter to directly measure the current, voltage and other signals of each node in the circuit, thereby further improving the efficiency of the circuit.

[0042] The circuit design of the aforementioned three-op-amp subtraction circuit fully demonstrates the advantages of a single board for multiple uses and comprehensive coverage. Through reasonable circuit layout and component configuration, this experimental board can perform various experiments such as non-inverting amplification, differential amplification, and common-mode rejection, comprehensively covering the teaching content of three-op-amp subtraction circuits. At the same time, the experimental board is also easy to use. By setting jumpers and switches, the operating mode of the circuit can be easily switched, avoiding errors introduced by frequent circuit disassembly and assembly, and improving the accuracy and reliability of the experiments. This design effectively overcomes the shortcomings of traditional three-op-amp subtractor experiments, providing great convenience for teaching and experimentation.

[0043] It should be noted that in the specific circuit diagrams of the above circuit parts, if the pins in different circuit diagrams are marked with the same label, it means that the pins with the same label are connected.

[0044] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0045] The above embodiments only illustrate several implementation methods of this utility model, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of protection of this utility model. It should be noted that for those skilled in the art, several modifications and improvements can be made without departing from the concept of this utility model, and all of these modifications and improvements fall within the scope of protection of this utility model.

Claims

1. A three-operation amplifier subtraction circuit device, characterized in that, This includes test point ANI1, test point ANI2, test point ANI3, connector J1, connector J2, connector J3, operational amplifier U1A, operational amplifier U1B, operational amplifier U2A, gain regulator, and resistors R1 to R9; The input terminal of connector J2 is connected to test point ANI1 and used to receive the signal output from an external signal source. The first output terminal of connector J2 is connected to the non-inverting input terminal of operational amplifier U1A. The second output terminal of connector J2 is connected to one end of resistor R4. The input terminal of connector J3 is connected to test point ANI2 and used to receive the signal output from an external signal source. The first output terminal of connector J3 is connected to the non-inverting input terminal of operational amplifier U1B. The second output terminal of connector J3 is connected to one end of resistor R9. The inverting input terminal of operational amplifier U1A is connected between resistors R5 and R6 in series. The output terminals of operational amplifier U1A are connected to one end of resistor R5 and one end of resistor R4 respectively. The inverting input terminal of operational amplifier U1B is connected between resistors R7 and R8 in series. The output terminals of operational amplifier U1B are connected to one end of resistor R8 and one end of resistor R9 respectively. The ground terminal of connector J1 is grounded. One pair of terminals of connector J1 is connected in series through a gain regulator. The two terminals of the other pair of terminals of connector J1 are connected to the other end of resistor R6 and the other end of resistor R7 respectively. The inverting input of operational amplifier U2A is connected to the other end of resistor R4, and the non-inverting input is connected between resistors R9 and R2 in series. The other end of resistor R2 is grounded. The output of operational amplifier U2A is connected to the other end of resistor R4 through resistor R1. Test point ANI3 is connected to the output of operational amplifier U2A. Operational amplifiers U1A and U1B are the differential input stages of operational amplifier U2A. Test points AIN1 and AIN2 are used to externally test the differential input signals of their respective branches. AIN3 is used to externally test the output signal of operational amplifier U2A. Connector J1 is used to switch the gain of operational amplifiers U1A and U1B to adjustable or fixed. The gain adjuster is used to adjust the gain of operational amplifiers U1A and U1B.

2. The three operational amplifier subtraction circuit device according to claim 1, characterized in that, The gain regulator is a variable resistor.

3. The three operational amplifier subtraction circuit device according to claim 1 or 2, characterized in that, It also includes jumper switches P1 and P2. One terminal of jumper switch P1 is connected to the output of operational amplifier U1A and one end of resistor R5, and the other terminal of jumper switch P1 is connected to one end of resistor R4. One terminal of jumper switch P2 is connected to the output of operational amplifier U1B and one end of resistor R8, and the other terminal of jumper switch P2 is connected to one end of resistor R9.

4. The three operational amplifier subtraction circuit device according to claim 3, characterized in that, It also includes a switch SW1 and two signal source terminals. The first input terminal of switch SW1 is connected to a signal source terminal for receiving signal S1, and the second input terminal of switch SW1 is connected to another signal source terminal for receiving signal S2. The output terminal of switch SW1 is connected to the test point ANI2 and the input terminal of connector J3 respectively. The input terminal of connector J2 is used to receive signal S1.

5. The three operational amplifier subtraction circuit device according to claim 3, characterized in that, It also includes an oscilloscope connection port, with each terminal of the oscilloscope connection port connected to test point ANI1, test point ANI2 and test point ANI3 respectively. The oscilloscope connection port is used to connect an oscilloscope.

6. The three operational amplifier subtraction circuit device according to claim 3, characterized in that, It also includes an onboard power interface, which is connected to the power supply terminals of operational amplifiers U1A, U1B and U2A respectively, and is used to connect to an external power supply.

7. The three operational amplifier subtraction circuit device according to claim 3, characterized in that, It also includes a multimeter test interface, which is connected to the connection points between each component and is used to connect a multimeter.

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