A PFC output voltage regulating device, converter and power electronic equipment

Abstract

The utility model discloses a kind of PFC output voltage regulating device, converter and power electronic equipment, device includes the voltage sampling module for collecting the sampling value of PFC control circuit output voltage, for generating adjustable setting voltage of support analog potentiometer and digital-analog converter setting voltage module, for proportionally superimposed dynamic reference voltage by sampling value and adjustable setting voltage voltage superimposed module, for generating the drive signal of switch tube according to dynamic reference voltage and PFC control unit current sampling signal, the ac voltage sampling signal of PFC control unit PWM control module;The device generates dynamic reference signal by sampling voltage and setting voltage superposition, realizes the flexible control of PFC circuit output voltage, simplifies voltage regulation procedure, promotes the slow start of PFC circuit voltage start and anti-interference ability.

Description

Technical Field

[0001] This utility model relates to the field of power electronics technology, and in particular to a PFC output voltage regulation device, converter and power electronic equipment. Background Technology

[0002] Existing PFC circuits typically use a fixed reference voltage and an error signal from the sampled voltage to control the output voltage. Adjusting the output voltage requires changing the feedback network parameters and adjusting the resistor voltage division ratio, resulting in slow dynamic response and poor flexibility. Furthermore, hardware adjustments are necessary, making real-time control difficult. In addition, in applications with wide input voltage ranges and multiple mode switching scenarios, traditional methods require complex compensation circuits, increasing cost and design complexity. Summary of the Invention

[0003] The technical problem to be solved by this utility model is to propose a PFC output voltage regulation device based on the superposition principle. This device superimposes the sampled voltage and the set voltage to generate a dynamic reference signal, thereby realizing flexible control of the PFC circuit output voltage, simplifying the voltage regulation process, and improving the slow start-up and anti-interference capability of the PFC circuit voltage.

[0004] To solve the above-mentioned technical problems, this utility model provides a PFC output voltage regulation device, including a voltage sampling module for acquiring the sampled value V_sense of the output voltage of the PFC control circuit, a setting voltage module for generating an adjustable setting voltage V_set that supports analog potentiometers and digital-to-analog converters, a voltage superposition module for proportionally superimposing the sampled value V_sense and the adjustable setting voltage V_set to generate a dynamic reference voltage V_ref, and a PWM control module for generating a drive signal for the switching transistor based on the dynamic reference voltage V_ref, the current sampling signal I_sense of the PFC control unit, and the AC voltage sampling signal V_AC of the PFC control unit. The output terminals of the voltage sampling module and the setting voltage module are connected to the input terminal of the voltage superposition module, and the output terminal of the voltage superposition module is connected to the input terminal of the PWM control module.

[0005] Preferably, the voltage setting module includes an operational amplifier, and the MCU output PWM voltage terminal is connected to the non-inverting input terminal of the operational amplifier through the operational amplifier input voltage circuit. The operational amplifier output terminal is used to generate an adjustable setting voltage V_set that supports analog potentiometers and digital-to-analog converters.

[0006] Preferably, the operational amplifier input voltage circuit includes a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, a seventh capacitor C7, and an eighth capacitor C8. The eighth resistor R8, the ninth resistor R9, and the tenth resistor R10 are connected in series to form the main input path. One end of the seventh resistor R7, the seventh capacitor C7, and the eighth capacitor C8 is connected to the input terminal of the eighth resistor R8, the ninth resistor R9, and the tenth resistor R10, respectively. The other end of the seventh resistor R7, the seventh capacitor C7, and the eighth capacitor C8 is connected in parallel and then connected to the ground wire.

[0007] Preferably, the voltage superposition module includes a first operational amplifier U2A, a second operational amplifier U2B, a first resistor R1, a second resistor R2, a fourth resistor R4, a fifth resistor R5, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, and a sixth capacitor C6; the non-inverting input terminal of the second operational amplifier U2B is connected to one end of the second resistor R2, one end of the sixth capacitor C6, one end of the first resistor R1, and the output terminal of the voltage sampling module; the second resistor R2 and the sixth capacitor C6 are connected in parallel, and their other ends are both grounded; the operational output terminal of the second operational amplifier U2B is connected to the non-inverting input terminal of the first operational amplifier U2A through the fifth resistor R5; the second operational amplifier... The inverting input terminal of the first operational amplifier U2B is connected to the operational output terminal and one end of the fifth resistor R5. The other end of the fifth resistor R5 is connected to the output terminal of the voltage setting module through the fourth resistor R4. The negative power supply terminal of the first operational amplifier U2A is grounded. The positive power supply terminal of the first operational amplifier U2A is connected to the positive power supply, one end of the fourth capacitor C4, and one end of the second capacitor C2. The fourth capacitor C4 and the second capacitor C2 are connected in parallel, and the other end of their parallel connection is grounded. The operational output terminal of the first operational amplifier U2A is connected to the inverting input terminal of the first operational amplifier U2A and grounded through the third capacitor C3. The operational output terminal of the first operational amplifier U2A is connected to the input terminal of the PWM control module.

[0008] Preferably, the PWM control module includes a PFC control unit, which includes a current sampling signal input terminal and an AC voltage sampling signal input terminal.

[0009] To solve the above-mentioned technical problems, this utility model also discloses a converter, including the PFC output voltage regulation device described above.

[0010] To solve the above-mentioned technical problems, this utility model also discloses a power electronic device, including the aforementioned PFC output voltage regulation device.

[0011] With the above-described device, the PFC output voltage regulation device includes a voltage sampling module for acquiring the sampled value V_sense of the PFC control circuit output voltage, a setting voltage module for generating an adjustable setting voltage V_set that supports analog potentiometers and digital-to-analog converters, a voltage superposition module for proportionally superimposing the sampled value V_sense and the adjustable setting voltage V_set to generate a dynamic reference voltage V_ref, and a PWM control module for generating a drive signal for the switching transistor based on the dynamic reference voltage V_ref, the PFC control unit current sampling signal I_sense, and the PFC control unit AC voltage sampling signal V_AC. The output terminals of the voltage sampling module and the setting voltage module are connected to the input terminal of the voltage superposition module, and the output terminal of the voltage superposition module is connected to the input terminal of the PWM control module. This device superimposes the sampled voltage and the setting voltage to generate a dynamic reference signal, realizing flexible control of the PFC circuit output voltage, simplifying the voltage regulation process, and improving the PFC circuit's voltage start-up soft start and anti-interference capability. Attached Figure Description

[0012] Figure 1 This is the overall circuit diagram of a PFC output voltage regulation device according to the present invention. Detailed Implementation

[0013] To make the objectives, technical solutions, and advantages of this utility model clearer, the present utility model will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely for explaining the present utility model and are not intended to limit the present utility model.

[0014] Example 1

[0015] Please see Figure 1 , Figure 1 This is an overall circuit diagram of a PFC output voltage regulation device according to the present invention;

[0016] This embodiment discloses a PFC output voltage regulation device, including a voltage sampling module 10 for acquiring the sampled value V_sense of the output voltage of the PFC control circuit, a setting voltage module 30 for generating an adjustable setting voltage V_set that supports analog potentiometers and digital-to-analog converters, a voltage superposition module 20 for proportionally superimposing the sampled value V_sense and the adjustable setting voltage V_set to generate a dynamic reference voltage V_ref, and a PWM control module 40 for generating a drive signal for the switching transistor based on the dynamic reference voltage V_ref, the current sampling signal I_sense of the PFC control unit, and the AC voltage sampling signal V_AC of the PFC control unit. The output terminals of the voltage sampling module 10 and the setting voltage module 30 are connected to the input terminals of the voltage superposition module 20, and the output terminal of the voltage superposition module 20 is connected to the input terminal of the PWM control module 40.

[0017] Example 2

[0018] This embodiment is based on embodiment one. In this embodiment, the voltage setting module 30 includes an operational amplifier U3B. The MCU output PWM voltage terminal is connected to the non-inverting input terminal of the operational amplifier U3B through the operational amplifier input voltage circuit. The operational amplifier output terminal of the operational amplifier U3B is used to generate an adjustable setting voltage V_set that supports analog potentiometers and digital-to-analog converters.

[0019] The operational amplifier input voltage circuit includes a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, a seventh capacitor C7, and an eighth capacitor C8. The eighth resistor R8, the ninth resistor R9, and the tenth resistor R10 are connected in series to form the main input path. One end of the seventh resistor R7, the seventh capacitor C7, and the eighth capacitor C8 is connected to the input terminal of the eighth resistor R8, the ninth resistor R9, and the tenth resistor R10, respectively. The other end of the seventh resistor R7, the seventh capacitor C7, and the eighth capacitor C8 is connected in parallel and then connected to the ground wire.

[0020] The voltage superposition module 20 includes a first operational amplifier U2A, a second operational amplifier U2B, a first resistor R1, a second resistor R2, a fourth resistor R4, a fifth resistor R5, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, and a sixth capacitor C6. The non-inverting input terminal of the second operational amplifier U2B is connected to one end of the second resistor R2, one end of the sixth capacitor C6, one end of the first resistor R1, and the output terminal of the voltage sampling module. The second resistor R2 and the sixth capacitor C6 are connected in parallel, and their other ends are both grounded. The operational output terminal of the second operational amplifier U2B is connected to the non-inverting input terminal of the first operational amplifier U2A through the fifth resistor R5. The inverting input terminal of U2B is connected to the operational output terminal and one end of the fifth resistor R5. The other end of the fifth resistor R5 is connected to the output terminal of the voltage setting module through the fourth resistor R4. The negative power supply terminal of the first operational amplifier U2A is grounded. The positive power supply terminal of the first operational amplifier U2A is connected to the positive power supply, one end of the fourth capacitor C4, and one end of the second capacitor C2. The fourth capacitor C4 and the second capacitor C2 are connected in parallel, and the other end of their parallel connection is grounded. The operational output terminal of the first operational amplifier U2A is connected to the inverting input terminal of the first operational amplifier U2A and grounded through the third capacitor C3. The operational output terminal of the first operational amplifier U2A is connected to the input terminal of the PWM control module.

[0021] PWM control module 40 includes a PFC control unit, which includes a current sampling signal input terminal and an AC voltage sampling signal input terminal.

[0022] The specific work process is as follows:

[0023] The voltage module 30 converts the PWM wave into a voltage signal to form a set voltage V_set. This set voltage V_set is then divided by resistors R1 and R2 to obtain the sampled value V_sense from the voltage sampling module 10, which is output to resistor R5. The V_set voltage is then output to resistor R4. Resistors R4 and R5 form a superposition network, which proportionally superimposes the sampled value V_sense with the adjustable set voltage V_set to generate a dynamic reference voltage V_ref. The dynamic reference voltage V_ref, the PFC control unit current sampling signal I_sense, and the PFC control unit AC voltage sampling signal V_AC are modulated by the PWM control module 40 to control the duty cycle of the PFC chip's PWM output, thereby adjusting the PFC output voltage.

[0024] Example 3

[0025] This embodiment discloses a converter, including the PFC output voltage regulation device described in Embodiment 1 or Embodiment 2.

[0026] Example 4

[0027] This embodiment discloses a power electronic device, including the PFC output voltage regulation device described in Embodiment 1 or Embodiment 2.

[0028] This PFC output voltage regulator generates a dynamic reference signal by superimposing the sampled voltage and the set voltage, enabling flexible control of the PFC circuit output voltage, simplifying the voltage regulation process, and improving the PFC circuit's voltage start-up and anti-interference capabilities.

[0029] It should be understood that the above are merely preferred embodiments of the present utility model and should not be construed as limiting the patent scope of the present utility model. Any equivalent structural or procedural transformations made based on the contents of the present utility model specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of the present utility model.

Claims

1. A PFC output voltage regulation device, characterized in that, The system includes a voltage sampling module for acquiring the sampled value V_sense of the output voltage of the PFC control circuit, a setting voltage module for generating an adjustable setting voltage V_set that supports analog potentiometers and digital-to-analog converters, a voltage superposition module for proportionally superimposing the sampled value V_sense and the adjustable setting voltage V_set to generate a dynamic reference voltage V_ref, and a PWM control module for generating a drive signal for the switching transistor based on the dynamic reference voltage V_ref, the current sampling signal I_sense of the PFC control unit, and the AC voltage sampling signal V_AC of the PFC control unit. The output terminals of the voltage sampling module and the setting voltage module are connected to the input terminal of the voltage superposition module, and the output terminal of the voltage superposition module is connected to the input terminal of the PWM control module.

2. The PFC output voltage regulating device according to claim 1, characterized in that, The voltage setting module includes an operational amplifier U3B. The MCU output PWM voltage terminal is connected to the non-inverting input terminal of the operational amplifier U3B through the operational amplifier input voltage circuit. The operational amplifier output terminal of the operational amplifier U3B is used to generate an adjustable setting voltage V_set that supports analog potentiometers and digital-to-analog converters.

3. The PFC output voltage regulating device according to claim 2, characterized in that, The operational amplifier input voltage circuit includes a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, a seventh capacitor C7, and an eighth capacitor C8. The eighth resistor R8, the ninth resistor R9, and the tenth resistor R10 are connected in series to form the main input path. One end of the seventh resistor R7, the seventh capacitor C7, and the eighth capacitor C8 is connected to the input terminal of the eighth resistor R8, the ninth resistor R9, and the tenth resistor R10, respectively. The other end of the seventh resistor R7, the seventh capacitor C7, and the eighth capacitor C8 is connected in parallel and then connected to the ground wire.

4. The PFC output voltage regulating device according to claim 3, characterized in that, The voltage superposition module includes a first operational amplifier U2A, a second operational amplifier U2B, a first resistor R1, a second resistor R2, a fourth resistor R4, a fifth resistor R5, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, and a sixth capacitor C6. The non-inverting input terminal of the second operational amplifier U2B is connected to one end of the second resistor R2, one end of the sixth capacitor C6, one end of the first resistor R1, and the output terminal of the voltage sampling module. The second resistor R2 and the sixth capacitor C6 are connected in parallel, and their other ends are both grounded. The operational output terminal of the second operational amplifier U2B is connected to the non-inverting input terminal of the first operational amplifier U2A through the fifth resistor R5. The inverting input terminal of U2B is connected to the operational output terminal and one end of the fifth resistor R5. The other end of the fifth resistor R5 is connected to the output terminal of the voltage setting module through the fourth resistor R4. The negative power supply terminal of the first operational amplifier U2A is grounded. The positive power supply terminal of the first operational amplifier U2A is connected to the positive power supply, one end of the fourth capacitor C4, and one end of the second capacitor C2. The fourth capacitor C4 and the second capacitor C2 are connected in parallel, and the other end of their parallel connection is grounded. The operational output terminal of the first operational amplifier U2A is connected to the inverting input terminal of the first operational amplifier U2A and grounded through the third capacitor C3. The operational output terminal of the first operational amplifier U2A is connected to the input terminal of the PWM control module.

5. The PFC output voltage regulating device according to claim 3, characterized in that, The PWM control module includes a PFC control unit, which includes a current sampling signal input terminal and an AC voltage sampling signal input terminal.

6. A converter, characterized in that, Includes the PFC output voltage regulating device as described in any one of claims 1 to 5.

7. A power electronic device, characterized in that, Includes the PFC output voltage regulating device according to any one of claims 1 to 5.

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