PCB structure for improving high-speed signal quality

Abstract

The utility model discloses a kind of PCB structure for improving high-speed signal signal quality, including the PCB substrate of layer number not less than six and the AC coupling capacitor group being set on PCB substrate, first area is provided with hollow area and the periphery of wrapping in hollow area on PCB substrate, four capacitor pads are provided in hollow area, first area is provided with four reflow ground holes, four reflow ground holes and four capacitor pads are one-to-one corresponding arrangement, such design makes that four reflow ground holes can provide low impedance reference ground plane for high-speed signal, reduce the reflow path of high-speed signal at this place, to ensure that high-speed signal reflow path is short and continuous, in turn reduce the reflection and loss of high-speed signal.

Description

Technical Field

[0001] This utility model relates to the field of circuit board technology, and more specifically, to a PCB structure for improving the quality of high-speed signals. Background Technology

[0002] In modern high-speed digital circuit systems, signal integrity has become a key factor determining system performance. As signal rates evolve to the tens of Gb / s level, even minute impedance discontinuities and changes in return current paths in PCB design can have a significant impact on signal transmission quality.

[0003] AC coupling capacitors are key components for signal integrity management. Also known as DC blocking capacitors, they are used in almost all high-speed serial links. Their main function is to remove the DC bias component in the signal while allowing high-frequency components to pass through smoothly.

[0004] In high-speed PCB design, AC coupling capacitors are used to block the DC component of signals to maintain signal transmission stability. Due to the parasitic parameters and physical structure characteristics of AC coupling capacitors, their location is often an impedance discontinuity point in the signal transmission path. To improve impedance continuity in this area, conventional design methods involve removing one or more planar layers below the AC coupling capacitor and adjusting the number and size of the removed layers through simulation to match the characteristic impedance at that location with the target impedance of the transmission line.

[0005] However, removing the planar layer causes a change in the reference plane of the AC coupling capacitor. When the reference plane below the AC coupling capacitor is removed, the return current must bypass the removed area and find an adjacent intact reference plane as an alternative path. This process increases the length of the return path and the loop area, thereby introducing additional parasitic inductance and impedance fluctuations. The resulting impedance mismatch may exacerbate signal reflection, while the skin effect and dielectric loss of high-frequency components become more pronounced as the path length increases. Utility Model Content

[0006] In order to overcome the shortcomings of the prior art, this utility model provides a PCB structure that improves the quality of high-speed signals and can reduce the reflection and loss of high-speed signals caused by changes in the signal reference plane.

[0007] The technical solution of this utility model is as follows: A PCB structure for improving the quality of high-speed signals includes a PCB substrate with no less than six layers and an AC coupling capacitor bank disposed on the PCB substrate. The PCB substrate is provided with a cutout area and a first area surrounding the cutout area. Four capacitor pads are disposed in the cutout area, and four return ground vias are disposed in the first area. The four return ground vias and the four capacitor pads are disposed in a one-to-one correspondence.

[0008] Furthermore, the AC coupling capacitor bank includes a first AC coupling capacitor and a second AC coupling capacitor, the first AC coupling capacitor being connected to two of the four capacitor pads, and the second AC coupling capacitor being connected to the other two of the four capacitor pads.

[0009] Furthermore, the four reflux boreholes are arranged in a matrix.

[0010] Furthermore, the four capacitor pads are arranged in a matrix.

[0011] Furthermore, the ratio of the aperture a of the return ground hole to the thickness b of the PCB substrate satisfies the following relationship: (a:b)≤(15:1).

[0012] Furthermore, the diameter of the return flow hole is 6 mil, 8 mil, or 10 mil.

[0013] Furthermore, it also includes a ground hole pad, which corresponds to the return ground hole, and the minimum spacing between the outer edge of the ground hole pad and the outer edge of the capacitor pad is greater than or equal to 5 mil.

[0014] According to the above-described solution, the beneficial effects of this utility model are as follows: This utility model provides a PCB structure for improving the quality of high-speed signals, including a PCB substrate with no less than six layers and an AC coupling capacitor bank disposed on the PCB substrate. The PCB substrate has a cutout area and a first area surrounding the cutout area. Four capacitor pads are disposed in the cutout area, and four return ground vias are disposed in the first area. The four return ground vias and the four capacitor pads are disposed in a one-to-one correspondence. This design enables the four return ground vias to provide a low-impedance reference ground plane for high-speed signals, reducing the return path of high-speed signals at this location, thereby ensuring that the return path of high-speed signals is short and continuous, and thus reducing the reflection and loss of high-speed signals. Attached Figure Description

[0015] To more clearly illustrate the technical solutions in the embodiments of this utility model, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0016] Figure 1 This is a schematic diagram of a PCB structure for improving the quality of high-speed signals in an embodiment of this utility model.

[0017] In the diagram, 1 is the PCB substrate; 11 is the cutout area; 12 is the first area; 2 is the capacitor pad; 3 is the reflow ground via; and 4 is the ground via pad. Detailed Implementation

[0018] The embodiments of the present invention will be described in further detail below with reference to the accompanying drawings and examples. The following detailed description of the embodiments and the accompanying drawings are used to illustrate the principles of the present invention by way of example, but should not be used to limit the scope of the present invention, that is, the present invention is not limited to the described embodiments.

[0019] To better understand this utility model, the following description, in conjunction with the accompanying drawings and embodiments, will further illustrate the present utility model:

[0020] In modern high-speed digital circuit systems, signal integrity has become a key factor determining system performance. During PCB design, many high-speed signals incorporate AC coupling capacitors to isolate the DC component of the signal and ensure signal stability.

[0021] AC coupling capacitors, also known as DC blocking capacitors, are used in almost all high-speed serial links. Their main function is to remove the DC bias component in the signal while allowing high-frequency components to pass through smoothly.

[0022] In high-speed PCB design, AC coupling capacitors are used to block the DC component of signals to maintain signal transmission stability. Due to the parasitic parameters and physical structure characteristics of AC coupling capacitors, their location is often an impedance discontinuity point in the signal transmission path. To improve impedance continuity in this area, conventional design methods involve removing one or more planar layers below the AC coupling capacitor and adjusting the number and size of the removed layers through simulation to match the characteristic impedance at that location with the target impedance of the transmission line.

[0023] However, removing the planar layer causes a change in the reference plane of the AC coupling capacitor. When the reference plane below the AC coupling capacitor is removed, the return current must bypass the removed area and find an adjacent intact reference plane as an alternative path. This process increases the length of the return path and the loop area, thereby introducing additional parasitic inductance and impedance fluctuations. The resulting impedance mismatch may exacerbate signal reflection, while the skin effect and dielectric loss of high-frequency components become more pronounced as the path length increases.

[0024] Based on this, the present invention provides a PCB structure for improving the quality of high-speed signals, including a PCB substrate 1 with no less than six layers and an AC coupling capacitor bank disposed on the PCB substrate 1. The PCB substrate 1 is provided with a cutout area 11 and a first area 12 surrounding the cutout area 11. Four capacitor pads 2 are disposed in the cutout area 11, and four return ground vias 3 are disposed in the first area 12. The four return ground vias 3 and the four capacitor pads 2 are disposed in a one-to-one correspondence. This design enables the four return ground vias 3 to provide a low-impedance reference ground plane for high-speed signals, reducing the return path of high-speed signals at this location, thereby ensuring that the return path of high-speed signals is short and continuous, and thus reducing the reflection and loss of high-speed signals.

[0025] Specifically, the hollowed-out area 11 is located directly below the AC coupling capacitor bank and is rectangular in shape. Correspondingly, the first area 12 is rectangular and surrounds the hollowed-out area 11.

[0026] In this embodiment, the AC coupling capacitor bank includes a first AC coupling capacitor and a second AC coupling capacitor, both of which are surface-mount multilayer ceramic capacitors. Four capacitor pads 2 are symmetrically distributed on both sides of the signal transmission path of the AC coupling capacitors. The first AC coupling capacitor is laterally connected across two capacitor pads 2, and the second AC coupling capacitor is laterally connected across the other two capacitor pads 2. Specifically, all four capacitor pads 2 adopt a rectangular structure.

[0027] Preferably, the four return boreholes 3 are distributed in a matrix symmetrical manner.

[0028] The return boreholes 3 are symmetrically distributed in a matrix form, specifically as follows:

[0029] With the center point of the excavated area 11 as the reference, the four return boreholes 3 are mirror-symmetrical along the transverse axis of symmetry.

[0030] With the center point of the excavated area 11 as the reference, the four return holes 3 are mirror-symmetrical along the longitudinal axis of symmetry.

[0031] The diameter of the return ground hole 3 is preferably 6mil~10mil, and the copper plating thickness of the hole wall is not less than 20μm to ensure a low impedance grounding path.

[0032] In this embodiment, the center-to-center spacing between the four return ground holes 3 is determined by the actual size of the AC coupling capacitor, the lead-out method of the AC coupling capacitor, and the size of the hollowed-out area 11 under the AC coupling capacitor.

[0033] The center-to-center spacing (lateral spacing Sx, longitudinal spacing Sy) of the four return boreholes 3 is dynamically adjusted based on the following factors:

[0034] Capacitor package size: For the 0402 package (1.0mm × 0.5mm) AC coupling capacitor, the lateral spacing Sx of the four return ground vias 3 is increased to 85mil (approximately 2.16mm), and the vertical spacing Sy is set to 50mil (approximately 1.27mm); for the smaller 0201 package (0.6mm × 0.3mm), the lateral spacing Sx of the four return ground vias 3 is reduced to 60mil (approximately 1.52mm), and the vertical spacing Sy is reduced to 35mil (approximately 0.89mm) to meet the miniaturization requirements of the capacitor body and pads.

[0035] Outgoing cable method: If a dual-sided microstrip cable outgoing method is adopted, the longitudinal spacing Sy needs to be increased by 10%~15% to reserve a wiring channel; if a bottom-layer buried cable design is adopted, the longitudinal spacing Sy can be slightly reduced.

[0036] Specifically, when a hollowed-out area 11 is set at the bottom of the AC coupling capacitor, the area of ​​the hollowed-out area 11 is greater than or equal to 1.5 times the projected area of ​​the AC coupling capacitor. The return ground hole 3 needs to be moved outward to avoid overlapping with the hollowed-out area 11. The four return ground holes 3 are correspondingly increased in the horizontal spacing Sx and the vertical spacing Sy to avoid the return ground holes 3 and the hollowed-out area 11 overlapping.

[0037] Specifically, for different packaged capacitors, by adjusting the lateral spacing Sx and the vertical spacing Sy of the four return ground holes 3, the four return ground holes 3 are placed as close as possible to the four capacitor pads 2 while meeting the production process requirements.

[0038] In this embodiment, the four capacitor pads 2 are arranged in a matrix.

[0039] Preferably, the ratio of the aperture a of the return ground hole 3 to the thickness b of the PCB substrate 1 satisfies the following relationship: (a:b)≤(15:1).

[0040] Preferably, the diameter of the return hole 3 is 6 mil, 8 mil or 10 mil.

[0041] The PCB structure provided in this embodiment of the present invention for improving the quality of high-speed signals also includes a ground hole pad 4, which is coaxially and correspondingly arranged with the return ground hole 3, and the ground hole pad 4 is circular in shape.

[0042] Specifically, the distance D between the outer circumferential edge of the ground hole pad 4 and the nearest outer edge of the capacitor pad 2 is greater than or equal to 5 mil. Considering manufacturing processes, the minimum distance between the outer edges of the ground hole pad 4 and the capacitor pad 2 should ideally be at least 6 mil. This design reduces manufacturing difficulty and improves production efficiency.

[0043] It should be noted that the indicated orientation or positional relationship is based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship that the product is usually placed in during use, or the orientation or positional relationship that is commonly understood by those skilled in the art, or the orientation or positional relationship that the product is usually placed in during use. It is only for the purpose of facilitating the description of this application and simplifying the description, and is not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation of this application.

[0044] It should be understood that those skilled in the art can make improvements or modifications based on the above description, and all such improvements and modifications should fall within the protection scope of the appended claims.

[0045] The present utility model patent has been described above with reference to the accompanying drawings. Obviously, the implementation of the present utility model patent is not limited to the above-described manner. Any improvements made by adopting the inventive concept and technical solution of the present utility model patent, or the direct application of the inventive concept and technical solution of the present utility model patent to other occasions without modification, are all within the protection scope of the present utility model.

Claims

1. A PCB structure for improving the quality of high-speed signals, characterized in that, The PCB substrate includes a PCB substrate with no less than six layers and an AC coupling capacitor bank disposed on the PCB substrate. The PCB substrate has a cutout area and a first area surrounding the cutout area. Four capacitor pads are disposed in the cutout area, and four return ground vias are disposed in the first area. The four return ground vias and the four capacitor pads are disposed in a one-to-one correspondence.

2. The PCB structure for improving high-speed signal quality as described in claim 1, characterized in that: The AC coupling capacitor bank includes a first AC coupling capacitor and a second AC coupling capacitor, the first AC coupling capacitor being connected to two of the four capacitor pads, and the second AC coupling capacitor being connected to the other two of the four capacitor pads.

3. The PCB structure for improving high-speed signal quality as described in claim 1, characterized in that: The four reflux boreholes are arranged in a matrix.

4. The PCB structure for improving high-speed signal quality as described in claim 1, characterized in that: The four capacitor pads are arranged in a matrix.

5. The PCB structure for improving high-speed signal quality as described in claim 1, characterized in that: The ratio of the aperture a of the return ground hole to the thickness b of the PCB substrate satisfies the following relationship: (a:b)≤(15:1).

6. The PCB structure for improving high-speed signal quality as described in claim 1, characterized in that: The diameter of the return flow hole is 6 mil, 8 mil, or 10 mil.

7. The PCB structure for improving high-speed signal quality as described in claim 1, characterized in that: It also includes ground hole pads, which correspond to the return ground holes, and the minimum spacing between the outer edge of the ground hole pads and the outer edge of the capacitor pads is greater than or equal to 5 mil.

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