Chip module and dual interface card

Abstract

This application relates to the field of dual-interface cards, and discloses a chip module and a dual-interface card. The chip module includes a chip package and a flexible substrate. The flexible substrate includes an upper conductive layer and a lower conductive layer disposed opposite to each other along the thickness direction of the chip module. The upper conductive layer is electrically connected to the lower conductive layer, and the chip package is connected to the upper conductive layer. This improves the reliability of the dual-interface card and reduces its cost.

Description

Technical Field

[0001] This application belongs to the field of dual-interface cards, and particularly relates to a chip module and a dual-interface card. Background Technology

[0002] A dual-interface card is a smart card that integrates two communication interfaces, typically possessing both contact and contactless interfaces, allowing for data exchange with a card reader through different methods. Dual-interface cards can be used for transportation cards, social security cards, bank cards, and more.

[0003] Dual-interface cards consist of a card body and a chip encapsulated within the card body. Currently, dual-interface cards have low reliability and high cost. Utility Model Content

[0004] This application provides a chip module and a dual-interface card, which can improve the reliability of the dual-interface card and reduce its cost.

[0005] On one hand, this application provides a chip module, including: a chip package and a flexible substrate, wherein the flexible substrate includes an upper conductive layer and a lower conductive layer disposed opposite to each other along the thickness direction of the dual interface card, and the upper conductive layer is electrically connected to the lower conductive layer.

[0006] In some embodiments, the chip module further includes a conductive structure that extends through the flexible substrate and connects to the upper conductive layer and the lower conductive layer along the thickness direction.

[0007] In some embodiments, the upper conductive layer includes a plurality of first pads and a plurality of second pads, the first pads and the second pads being in the form of continuous strips, one end of each of the first pads and the second pads being connected to the chip package, and the other end of the first pads being connected to the conductive structure; the second pads include an enlarged portion, the enlarged portion being connected to the antenna.

[0008] In some embodiments, the first pad is disposed circumferentially on the conductive structure.

[0009] In some embodiments, the chip module further includes an adhesive layer located circumferentially to the chip package and connected to the flexible substrate.

[0010] In some embodiments, the chip package includes a chip body, a lead frame, and a packaging layer. The packaging layer covers the chip body and the lead frame. The chip body is located on one side of the lead frame along the thickness direction. The lead frame includes a support portion and a connecting portion. The chip body is mounted on the support portion. The contacts of the chip body are connected to the connecting portion. The side of the support portion and the connecting portion facing away from the chip body is at least partially exposed to the packaging layer.

[0011] In some embodiments, the chip package further includes a connecting wire, the package layer covers the connecting wire, and the connecting wire is connected between the contacts of the chip body and the connecting portion.

[0012] In some embodiments, the chip module further includes a solder layer connected between the support portion and the upper conductive layer, and connected between the connection portion and the upper conductive layer.

[0013] In some embodiments, the solder layer comprises solder.

[0014] In some embodiments, the connecting portion is located on opposite sides of the support portion.

[0015] On the other hand, this application provides a dual-interface card, including a card body, an antenna card body, and a chip module. In the chip module of the above embodiment, the side of the lower conductive layer of the chip module facing away from the chip module is exposed on the card body, and the antenna is connected to the upper conductive layer.

[0016] The chip module and dual-interface card of this application embodiment form a chip module by connecting the chip package to a flexible substrate. Compared with the chip body and substrate connected before packaging in related technologies, this improves the stability of the connection between the chip body and the flexible substrate. The flexible substrate with the upper and lower conductive layers electrically connected does not need to be connected to the connecting wires, which reduces the risk of cracking of the connecting wire solder joints and improves the reliability of the dual-interface card. Attached Figure Description

[0017] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments of this application will be briefly introduced below. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This is a schematic diagram of the structure of a dual-interface card according to some embodiments of this application;

[0019] Figure 2 Show Figure 1 A schematic diagram of the structure of the chip module;

[0020] Figure 3 Show Figure 1 A top view of a chip module;

[0021] Figure 4 Figure 2 Internal wire bonding diagram of the chip package;

[0022] Figure 5 This is a flowchart of a dual-interface card preparation method according to some embodiments of this application.

[0023] Figure label:

[0024] 100. Chip module; 110. Chip package; 120. Flexible substrate; 111. Chip body; 112. Lead frame; 113. Encapsulation layer; 114. Connecting wire; 130. Conductive structure; 121. Upper conductive layer; 122. Lower conductive layer; 123. Insulating layer; 101. First pad; 102. Second pad; 102a. Enlarged portion; 102b. Extension portion; 103. Third pad; 104. Intermediate pad; 110a. Support portion; 110b. Connecting portion; 115. Solder layer; 131. Conductive hole;

[0025] 200, Card body; 201, Mounting slot; 300, Antenna; Z, Thickness direction. Detailed Implementation

[0026] The embodiments of the technical solution of this application will now be described in detail with reference to the accompanying drawings. These embodiments are only used to more clearly illustrate the technical solution of this application and are therefore merely examples, and should not be used to limit the scope of protection of this application.

[0027] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains; the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the application; the terms “comprising” and “having”, and any variations thereof, in the specification, claims, and foregoing description of the drawings are intended to cover non-exclusive inclusion.

[0028] In the description of the embodiments of this application, technical terms such as "first" and "second" are used only to distinguish different objects and should not be construed as indicating or implying relative importance or implicitly specifying the number, specific order, or primary and secondary relationship of the indicated technical features. In the description of the embodiments of this application, "multiple" means two or more, unless otherwise explicitly defined.

[0029] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0030] In the description of the embodiments in this application, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this document generally indicates that the preceding and following related objects have an "or" relationship.

[0031] In the description of the embodiments of this application, the term "multiple" refers to two or more (including two), similarly, "multiple sets" refers to two or more (including two sets), and "multiple pieces" refers to two or more (including two pieces).

[0032] In the description of the embodiments in this application, the technical terms "center," "longitudinal," and "lateral" are used.

[0033] "Length", "Width", "Thickness", "Top", "Bottom", "Front", "Back", "Left", "Right"

[0034] "Vertical", "Horizontal", "Top", "Bottom", "Inner", "Outer", "Clockwise", "Counterclockwise"

[0035] The orientation or positional relationship indicated by "axial", "radial", "circumferential", etc., is based on the orientation or positional relationship shown in the accompanying drawings and is only for the purpose of facilitating the description of the embodiments of this application and simplifying the description. It is not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on the embodiments of this application.

[0036] In the description of the embodiments of this application, unless otherwise expressly specified and limited, technical terms such as "installation," "connection," "joining," and "fixing" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. For those skilled in the art, the specific meaning of the above terms in the embodiments of this application can be understood according to the specific circumstances.

[0037] A dual-interface card is a smart card that integrates two communication interfaces, typically possessing both contact and contactless interfaces, allowing for data interaction with a card reader in different ways. A contact interface involves physical contact between the card's metal contacts and the reader to complete data transmission, offering high security and commonly found in traditional smart cards (such as bank card chips). A contactless interface, based on radio frequency identification (RFID) technology, transmits data via electromagnetic fields without physical contact, offering convenience and speed, suitable for scenarios such as fast payments and access control.

[0038] Dual-interface cards consist of a card body and a chip encapsulated within it. The chip is connected to the substrate on the side facing away from the chip via wire bonding. Metal wires are connected to the substrate using vias, further encapsulating the chip body and substrate before it is installed within the card body. However, dual-interface cards are frequently subjected to bending forces during use. The via connection method makes the chip very susceptible to damage or even breakage during use, affecting the reliability and lifespan of the dual-interface card. Furthermore, the poor robustness of the encapsulation after the substrate and chip are combined results in lower reliability and higher cost for dual-interface cards.

[0039] In view of this, the present application provides a dual-interface card, which connects the chip package to the upper conductive layer of the flexible substrate, thereby improving the connection reliability of the connecting lines in the chip package. Furthermore, the upper conductive layer of the chip package and the flexible substrate does not require vias, further improving the connection reliability between the chip package and the flexible substrate. This improves the overall reliability of the dual-interface card, and the length of the connecting lines can be shortened and low-cost materials can be selected, thus reducing the cost of the dual-interface card.

[0040] like Figures 1 to 4 As shown, this application embodiment provides a dual-interface card including a card body 200, an antenna 300, and a chip module 100. The card body 200 has a mounting slot 201; the antenna 300 is placed inside the card body 200, and a portion of the antenna 300 is accommodated in the mounting slot 201; the chip module 100 is accommodated in the mounting slot 201, and the chip module 100 includes a chip package 110 and a flexible substrate 120 connected to each other. The flexible substrate 120 includes an upper conductive layer 121 and a lower conductive layer 122 disposed opposite to each other along the thickness direction Z of the dual-interface card. The upper conductive layer 121 is conductively connected to the lower conductive layer 122; the chip package 110 is connected to the upper conductive layer 121, and the side of the lower conductive layer 122 facing away from the chip module 100 is exposed in the card body 200; the antenna 300 is connected to the upper conductive layer 121.

[0041] For example, the card body 200 can be a regular shape or an irregular shape. Examples include rectangular, circular, heart-shaped, and ultra-thin strip shapes. The card body 200 can be made of PVC (polyvinyl chloride), PET (polyethylene terephthalate), PLA (polylactic acid), or other materials. In some examples, the card body 200 can be processed using injection molding, stamping, lamination, or other processes.

[0042] In some examples, the card body 200 can be machined to form the mounting groove 201 by means of mechanical milling, laser cutting, die stamping, etc. As an example, the mounting groove 201 can be a regular shape or an irregular shape, such as rectangular, circular, L-shaped, T-shaped, etc.

[0043] Antenna 300 is used to realize the contactless communication function of dual-interface cards. Antenna 300 is a coil or circuit structure of a specific shape made of conductive material and embedded inside the card body 200. Through the coupling effect of electromagnetic field, it transmits energy and exchanges data with an external card reader, enabling dual-interface cards to complete operations such as identification, authentication, and payment without physical contact.

[0044] For example, the antenna 300 can be directly printed onto the insulating layer 123 inside the card body 200 using silver or copper paste through screen printing technology to form the antenna 300 circuit. Alternatively, enameled copper wire can be wound into a loop antenna 300, which can then be embedded into the card body 200 through injection molding or lamination processes. A pre-fabricated flexible antenna 300 (such as an FPC antenna 300) can also be placed inside the card body 200 using thermally conductive adhesive.

[0045] In some examples, the antenna 300 can be in the form of a ring-shaped rectangle, a spirally wound circle, or a multi-loop composite structure. The antenna 300 can be made of copper-based materials, aluminum-based materials, silver paste composite materials, etc.

[0046] Exemplarily, a portion of the antenna 300 is located within the mounting slot 201 for connection to the chip module 100, while another portion of the antenna 300 is located within the thickness of the card body 200. As an example, both ends of the antenna 300 are located within the mounting slot 201. Electrical connection to the chip module 100 is achieved through the ends of the antenna 300.

[0047] The chip module 100 is housed within the mounting slot 201, facilitating the installation of the chip module 100 and the card body 200, as well as the protection of the chip module 100 by the card body 200. Exemplarily, the circumferential direction of the chip module 100 can be bonded to the mounting slot 201. As an example, one surface of the chip module 100 is coplanar with the surface of the card body 200 on the open side of the mounting slot 201.

[0048] Chip module 100 includes a chip package 110, which is a structural component that provides physical protection, electrical connection, and support for the chip body 111. The chip package 110 isolates the chip body 111 from external circuits using encapsulation materials, while simultaneously enabling electrical connection between the chip body 111 and external circuits via pins or pads. For example, the chip package 110 can encapsulate the chip body 111 using thermosetting plastic materials such as epoxy resin, use ceramic materials as the encapsulation shell, or use flexible polymer materials to encapsulate the chip body 111. The connection between the chip body 111 and the flexible substrate 120 via the chip package 110 enhances the protection of the chip body 111.

[0049] For example, the flexible substrate 120 can be a flexible printed circuit board, a flexible copper-clad laminate, a polymer thick film substrate, etc. The flexible substrate 120 can better adapt to the bending environment of the dual interface card, improve the bending resistance at the connection between the chip package 110 and the flexible substrate 120, and improve the reliability of the dual interface card.

[0050] An upper conductive layer 121 and a lower conductive layer 122 are disposed on the upper and lower surfaces of the flexible substrate 120 along the thickness direction Z, for connection with the chip module 100 and external connection. The shapes of the upper conductive layer 121 and the lower conductive layer 122 can be regional, grid-like, contact array, etc.

[0051] In one example, the flexible substrate 120 includes an insulating layer 123, an upper conductive layer 121 and a lower conductive layer 122 connected along the thickness direction Z to two surfaces opposite to the insulating layer 123.

[0052] In one example, the upper conductive layer 121 and the lower conductive layer 122 are connected by a via.

[0053] For example, the chip package 110 can be connected to the upper conductive layer 121 by means of soldering, bonding, or other methods. As an example, the antenna 300 is located on both sides of the chip package 110 and is connected to the upper conductive layer 121 respectively.

[0054] In one example, the lower conductive layer 122 is exposed to the card body 200 for physical contact communication with the card reader, transmitting signals such as power (VCC), ground (GND), and data input / output (I / O).

[0055] In the embodiments of this application, a chip module 100 is formed by connecting the chip package 110 to the flexible substrate 120. Compared with the chip body 111 being connected to the substrate and then packaged in the related technology, the stability of the connection between the chip body 111 and the flexible substrate 120 is improved. The flexible substrate 120, which is electrically connected to the upper and lower conductive layers 122, does not need to be connected to the connecting line 114, which reduces the risk of cracking of the solder joints of the connecting line 114 and improves the reliability of the dual interface card.

[0056] In related technologies, the connection between the chip body 111 and the flexible substrate 120 requires a relatively long and large-diameter connecting line 114, resulting in high costs. In this application, the connecting line 114 within the chip package 110 is shorter and has a smaller diameter, reducing costs. Furthermore, in related technologies, the metal materials of the connecting line 114 and the substrate need to be electroplated with nickel and pure gold to ensure conductivity, while in this application, the connection between the chip package 110 and the flexible substrate 120 can be achieved using reflow soldering and copper plating through vias, further reducing costs.

[0057] Furthermore, in one embodiment of this application, the chip module 100 further includes a conductive structure 130, which extends through the flexible substrate 120 and connects to the upper conductive layer 121 and the lower conductive layer 122 along the thickness direction Z.

[0058] For example, the conductive structure 130 includes a conductive hole 131 and a conductive medium filled in the conductive hole 131. The conductive hole 131 is formed in the flexible substrate 120 along the thickness direction Z and penetrates the upper conductive layer 121, the insulating layer 123 and the lower conductive layer 122 of the flexible substrate 120.

[0059] In one example, the conductive medium may include one or more of electroplated copper, conductive adhesive, and conductive polymer.

[0060] In one example, the conductive hole 131 can be a hole structure in the shape of a cylindrical hole, a waist-shaped hole, a conical hole, etc.

[0061] As an example, the conductive medium may fill the conductive hole 131 or fill it to a height less than the depth of the conductive hole 131.

[0062] For example, the chip module 100 may have multiple conductive structures 130. As an example, the number of conductive structures 130 corresponds to the number of pins or pads in the chip package 110.

[0063] In this embodiment, the conductive structure 130 penetrates the flexible substrate 120 and the upper conductive layer 121 and the lower conductive layer 122, which improves the connection reliability of the upper conductive layer 121 and the lower conductive layer 122, and simplifies the structural complexity of the flexible substrate 120, making it easier to process and manufacture.

[0064] In one embodiment of this application, the upper conductive layer 121 includes a plurality of first pads 101 and a plurality of second pads 102. The first pads 101 and the second pads 102 are in the form of continuous strips. One end of each of the first pads 101 and the second pads 102 is connected to the chip package 110, and the other end of the first pad 101 is connected to the conductive structure 130. The second pad 102 includes an enlarged portion 102a, which is connected to the antenna 300.

[0065] For example, the first pad 101 is connected through the conductive structure 130, the corresponding areas of the upper conductive layer 121 and the lower conductive layer 122. The second pad 102 connects the antenna 300 to the chip package 110.

[0066] In one example, the first pad 101 includes a first end and a second end. The first end is located below the chip package 110 along the thickness direction Z and is connected to the pad of the chip package 110 by adhesive or solder layer 115.

[0067] In another example, the second end of the first pad 101 is disposed in the circumferential direction of the conductive structure 130, and the conductive structure 130 is in contact with the thickness portion of the second end along the thickness direction Z.

[0068] In some examples, the second pad 102 includes a continuously disposed extension 102b and an enlarged portion 102a. The end of the extension 102b is located below the chip package 110 along the thickness direction Z and is connected to the pad of the chip package 110 by adhesive or solder layer 115.

[0069] In another example, along the thickness direction Z, the projected area of ​​the enlarged portion 102a on the insulating layer 123 of the flexible substrate 120 is greater than the projected area of ​​the end of the extension portion 102b on the insulating layer 123 of the flexible substrate 120. The projected area of ​​the enlarged portion 102a on the insulating layer 123 of the flexible substrate 120 is greater than the projected area of ​​the second end of the first pad 101 on the insulating layer 123 of the flexible substrate 120.

[0070] In one embodiment of this application, the connecting portion 110b is located on opposite sides of the support portion 110a.

[0071] In some examples, the upper conductive layer 121 includes five first pads 101, which may be located on both sides of the chip package 110 in a first direction. The five first pads 101 are respectively connected to the ground (GND), power supply (VDD), reset (RST), clock (CLK), data input / output (I / O), and two logic signals (LA / LB) of the chip package 110.

[0072] In other examples, the upper conductive layer 121 includes two second pads 102 located on both sides of the chip package 110 along a first direction. The first direction can be the length or width direction of the dual-interface card, perpendicular to the thickness direction Z.

[0073] The strip-shaped first pad 101 and second pad 102 facilitate insulating the arrangement on the flexible substrate 120, reducing mutual interference. The larger area of ​​the enlarged portion 102a of the second pad 102 contributes to the stability of the antenna 300 connection.

[0074] In one embodiment of this application, the lower conductive layer 122 includes an intermediate disk 104 and a plurality of third pads 103. The third pads 103 are located on the periphery of the intermediate disk 104. The intermediate disk 104 is opposite to the chip package 110. A portion of the third pads 103 are connected to the conductive structure 130.

[0075] For example, the chip package 110 is mounted on the intermediate disk 104. As an example, the chip package 110 is connected to the intermediate disk 104 by a solder layer 115 or an adhesive layer.

[0076] In one example, the lower conductive layer 122 includes six third pads 103, of which five third pads 103 are connected to the first pad 101 via a conductive structure 130. Two third pads 103 are positioned opposite to the second pad 102 along the thickness direction Z. One third pad 103 is simultaneously positioned opposite to both one second pad 102 and one conductive structure 130 along the thickness direction Z.

[0077] Furthermore, in one embodiment of this application, the chip package 110 includes a chip body 111, a lead frame 112, and a packaging layer 113. The packaging layer 113 covers the chip body 111 and the lead frame 112. The chip body 111 is located on one side of the lead frame 112 along the thickness direction Z. The lead frame 112 includes a support portion 110a and a connecting portion 110b. The chip body 111 is mounted on the support portion 110a. The contacts of the chip body 111 are connected to the connecting portion 110b. The side of the support portion 110a and the connecting portion 110b facing away from the chip body 111 is at least partially exposed to the packaging layer 113.

[0078] The chip body 111 is a semiconductor silicon wafer integrating integrated circuits. Transistors, resistors, capacitors, and other components are manufactured on it using semiconductor processes to form a circuit module that enables dual-mode communication. As an example, the chip body 111 can be connected to the lead frame 112 via silver paste.

[0079] The lead frame 112 is a sheet-like structure made of metallic material, formed into a specific geometry through precision stamping or etching processes. For example, the surface of the lead frame 112 can be plated with nickel, gold, or silver to improve conductivity and oxidation resistance. The lead frame 112 serves as an electrical bridge between the chip body 111 and the external conductive layer, provides physical support for the chip, and helps dissipate heat generated during operation.

[0080] Specifically, the lead frame 112 includes a support portion 110a, which serves as a chip carrier platform and is the largest rectangular or circular area on the lead frame 112. The support portion 110a is located in the center of the frame and is used to mount the chip body 111. The chip body 111 is fixed to the surface of the support portion 110a using conductive adhesive or eutectic bonding to ensure the stability of the mechanical connection.

[0081] For example, the connecting portion 110b can be a thin metal strip distributed around the support portion 110a. The number of metal strips can be designed according to the needs of the chip body 111. The connecting portion 110b is used to connect the contacts of the chip body 111 to the conductive structure 130. Each pin of the connecting portion 110b corresponds to a functional signal of the chip.

[0082] As an example, the connector 110b has a circular or elliptical pad on the side facing the chip body 111 for bonding the connection line 114. The side of the connector 110b facing away from the chip body 111 is flush with the bottom of the support portion 110a, and the end of the connector 110b extends to the edge of the chip package 110.

[0083] The lead frame 112 and the chip body 111 can be connected by flip-chip bonding, automatic carrier bonding, flip-chip technology, wire bonding, or other methods.

[0084] The encapsulation layer 113 is a covering structure made of polymer materials or ceramics, etc., and exemplaryly, the encapsulation layer 113 can be formed by molding, lamination or coating processes. In some examples, the encapsulation layer 113 can be made of epoxy molding compound, liquid epoxy resin, polyimide.

[0085] In some examples, a portion of the side of the support portion 110a facing away from the chip body 111 is exposed to the encapsulation layer 113, and the side of the chip package 110 connected to the flexible substrate 120 can be a flat surface. The portion of the support portion 110a exposed to the encapsulation layer 113 serves as a heat dissipation pad connected to the flexible substrate 120; a portion of the side of the connecting portion 110b facing away from the chip body 111 is exposed to the encapsulation layer 113, and the portion of the connecting portion 110b exposed to the encapsulation layer 113 serves as an external pad connected to the flexible substrate 120.

[0086] In this embodiment, the chip body 111 is connected by the lead frame 112 and the chip body 111 is encapsulated by the encapsulation layer 113. The lead frame 112 is not easily deformed under the high temperature of encapsulation, and the encapsulation layer 113 can be molded by injection molding and then baked and cured. The shape and size after curing are easy to control and the encapsulation area is strong and not easily damaged.

[0087] In one embodiment of this application, the chip package 110 further includes a connecting line 114, the packaging layer 113 covers the connecting line 114, and the connecting line 114 is connected between the contacts of the chip body 111 and the connecting portion 110b.

[0088] The connecting wire 114 is a metal wire, connected to the chip body 111 and the connecting portion 110b by wire bonding. Exemplarily, the connecting wire 114 is an aluminum wire or an alloy wire. As an example, when the connecting wire 114 is an alloy wire, the wire diameter of the connecting wire 114 is less than or equal to 25 μm.

[0089] In this embodiment, the connector 114 is encapsulated in the encapsulation layer 113, reducing breakage at the connection point of the connector 114 and improving the overall structural reliability of the chip package. Furthermore, using a lead frame 112 to bond with the connector 114 can reduce the length and diameter of the connector 114, thus lowering costs.

[0090] In one embodiment, the chip package 110 is packaged using DFN packaging technology, QFN packaging technology, or other similar processes. For example, DFN encapsulation is achieved by injection molding and baking curing to form a regular rectangular black shell, which reduces the risk of the connecting line 114 being damaged or broken by external force and greatly improves reliability.

[0091] In addition, in some embodiments of this application, the chip module 100 further includes a solder layer 115, which is connected between the support portion 110a and the upper conductive layer 121, and between the connection portion 110b and the upper conductive layer 121.

[0092] The surface connection between the support part 110a and the upper conductive layer 121 is achieved through the solder layer 115, and the surface connection between the connecting part 110b and the upper conductive layer 121 is achieved through the solder layer 115, thereby increasing the welding contact area and improving the connection stability.

[0093] Furthermore, in some embodiments, the solder layer 115 includes solder. The solder layer 115 can be used to connect the chip package 110 and the upper conductive layer 121 via a reflow soldering process, reducing soldering costs and improving soldering efficiency.

[0094] In one embodiment, the connection portion 110b of the lead frame 112 includes eight pins, of which seven pins are internally connected to corresponding interfaces of the chip body 111. Two pins are used to connect to the two antenna 300 pads (L1 and L2) on the front and back sides of the chip body 111, and five pins are used to connect to the five functional contacts on the front side of the chip body 111. One pin is left unused.

[0095] In some embodiments, the chip module 100 further includes an adhesive layer located circumferentially in the chip package 110 and connected to the chip package 110 and the flexible substrate 120.

[0096] The adhesive layer can be made of epoxy resin, modified acrylic resin, silicone gel, UV adhesive, etc.

[0097] The bonding strength between the chip package 110 and the flexible substrate 120 is improved by circumferentially setting an adhesive layer on the chip package 110.

[0098] like Figures 1 to 5 As shown, some embodiments of this application also provide a method for preparing a dual-interface card, which can be used to obtain the dual-interface card described above. The dual-interface card preparation method includes the following steps S1 to S3.

[0099] S1: Flexible substrate 120 provides electrical connection between chip package 110 and upper and lower conductive layers 122.

[0100] For example, the chip package 110 can be fabricated or purchased directly. The flexible substrate 120 can be fabricated or purchased directly. The chip package 110 is an independently packaged chip structure.

[0101] The flexible substrate 120 includes an upper conductive layer 121 and a lower conductive layer 122, and the upper and lower conductive layers 122 are electrically connected. The upper conductive layer 121 is located on the upper surface of the flexible substrate 120, and the lower conductive layer 122 is located on the lower surface of the flexible substrate 120. As an example, the flexible substrate 120 includes an insulating layer 123, and the upper conductive layer 121 and the lower conductive layer 122 are connected along the thickness direction Z to two opposite surfaces of the insulating layer 123.

[0102] In one example, the upper conductive layer 121 and the lower conductive layer 122 are connected by a via, and a conductive structure 130 is provided in the via to achieve the connection between the upper conductive layer 121 and the lower conductive layer 122.

[0103] S2: Connect the chip package 110, the flexible substrate 120 and the antenna 300 inside the card body 200, and expose the conductive layer of the flexible substrate 120 on the side facing away from the chip package 110 in the card body 200, wherein the chip package 110 and the antenna 300 are respectively connected to the flexible substrate 120.

[0104] For example, by placing the chip package 110, the flexible substrate 120 and the antenna 300 inside the card body 200, the connection between the chip package 110 and the flexible substrate 120 and the connection between the flexible substrate 120 and the antenna 300 can be completed in one go, or the connection between the chip package 110 and the flexible substrate 120 and the connection between the flexible substrate 120 and the antenna 300 can be completed separately.

[0105] In one example, a mounting slot 201 is formed on the card body 200, and the chip package 110 and the flexible substrate 120 are accommodated in the mounting slot 201. A portion of the antenna 300 is placed in the card body 200 circumferentially in the mounting slot 201, and a portion is placed in the mounting slot 201 for connection with the flexible substrate 120.

[0106] In another example, the chip package 110 and the antenna 300 are connected to the same side of the flexible substrate 120.

[0107] S3: The encapsulated card body 200 is used to obtain a dual-interface card.

[0108] For example, the card body 200 can be thermo-press packaged to encapsulate the chip package 110, the flexible substrate 120 and the antenna 300 within the card body 200.

[0109] In one example, the card body 200 can be a multi-layered structure, with a portion of the antenna 300 laid within the multi-layered structure of the card body 200 and another portion extending into the mounting slot 201.

[0110] In related technologies, the chip body 111 is connected to the flexible substrate 120 via a via, and then the chip body 111 and the flexible substrate 120 are co-encapsulated and installed into the card body 200 for connection with the antenna 300. In this manufacturing method, because the chip body 111 is placed on epoxy glass cloth, it is prone to deformation at high temperatures. In order to ensure the connection reliability of the connection line 114 between the chip body 111 and the flexible substrate 120, the encapsulation thickness of the chip body 111 and the flexible substrate 120 is relatively large, the volume is large, and the encapsulation shape is irregular. The encapsulating adhesive is not fully cured, the epoxy glass cloth is easily contaminated, and the connection point of the connection line 114 is prone to detachment and breakage, leading to failure. In contrast, the embodiment of this application improves the protection strength of the chip body 111 by using an independently encapsulated chip package 110. The overall size is smaller, and the connection between the chip package 110 and the flexible substrate 120 is easier, eliminating the need for via connections and resulting in higher connection reliability. This shortens the manufacturing process, improves the product qualification rate, and reduces the risk of failure during mechanical performance testing. The oxidation and corrosion resistance of the chip package 110 is greatly improved.

[0111] The above description is merely a specific implementation of this application. Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, modules, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here. It should be understood that the protection scope of this application is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in this application, and these modifications or substitutions should all be covered within the protection scope of this application.

Claims

1. A chip module, characterized in that, include: Chip package; A flexible substrate includes an upper conductive layer and a lower conductive layer disposed opposite to each other along the thickness direction of a chip module. The upper conductive layer is electrically connected to the lower conductive layer, and the chip package is connected to the upper conductive layer.

2. The chip module according to claim 1, characterized in that, The chip module also includes a conductive structure that extends through the flexible substrate and connects to the upper conductive layer and the lower conductive layer along the thickness direction.

3. The chip module according to claim 2, characterized in that, The upper conductive layer includes a plurality of first pads and a plurality of second pads. The first pads and the second pads are in the form of continuous strips. One end of each of the first pads and the second pads is connected to the chip package, and the other end of the first pad is connected to the conductive structure. The second pad includes an enlarged portion that is connected to the antenna.

4. The chip module according to claim 3, characterized in that, The first pad is disposed circumferentially on the conductive structure.

5. The chip module according to claim 1, characterized in that, The chip module further includes an adhesive layer located circumferentially to the chip package and connected to the flexible substrate.

6. The chip module according to claim 1, characterized in that, The chip package includes a chip body, a lead frame, and a packaging layer. The packaging layer covers the chip body and the lead frame. The chip body is located on one side of the lead frame along the thickness direction. The lead frame includes a support portion and a connecting portion. The chip body is mounted on the support portion, and the contacts of the chip body are connected to the connecting portion. The side of the support portion and the connecting portion facing away from the chip body is at least partially exposed to the encapsulation layer.

7. The chip module according to claim 6, characterized in that, The chip package also includes connecting lines, the package layer covers the connecting lines, and the connecting lines are connected between the contacts of the chip body and the connecting portion.

8. The chip module according to claim 6, characterized in that, The chip module further includes a solder layer, which is connected between the support portion and the upper conductive layer, and between the connection portion and the upper conductive layer.

9. The chip module according to claim 8, characterized in that, The solder layer includes solder.

10. The chip module according to claim 6, characterized in that, The connecting parts are located on opposite sides of the supporting parts.

11. A dual-interface card, characterized in that, include: The card body has an installation slot; An antenna is placed inside the card body, and a portion of the antenna is accommodated in the mounting slot; The chip module according to any one of claims 1 to 10, wherein the side of the lower conductive layer of the chip module facing away from the chip module is exposed on the card body, and the antenna is connected to the upper conductive layer.

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