A shockproof power supply circuit

Abstract

This utility model relates to an anti-surge power supply circuit, including a power supply terminal PC for connecting to an external power source, a PNP transistor Q1, an NPN transistor Q2, and a PNP transistor Q3. The base of PNP transistor Q1 is connected to one end of resistors R10 and R21. The other end of resistor R10 is connected to the power supply terminal PC. The other end of resistor R21 is connected to the negative terminal of Zener diode D3. The positive terminal of Zener diode D3 is grounded. The emitter of PNP transistor Q1 is connected to the power supply terminal PC, and its collector is connected between the collector of NPN transistor Q2 and the base of PNP transistor Q3. The emitter of NPN transistor Q2 is grounded. The emitter of PNP transistor Q3 is connected to the power supply terminal PC, and its collector is connected to the load. This utility model utilizes the fast switching characteristics of transistors. Compared with existing technologies, it can block the conduction of abnormal voltage to downstream loads at the first moment of voltage abnormality, with a fast response speed. At the same time, when the input voltage returns to normal, Q3 can automatically return to the conducting state and restore power supply, improving the convenience of equipment maintenance.

Description

Technical Field

[0001] This utility model belongs to the field of electronic circuit protection technology, and in particular relates to an anti-impact power supply circuit. Background Technology

[0002] In practical applications, the power supply circuits of electronic devices often face the risk of external voltage fluctuations, such as instantaneous overvoltage of the power grid, lightning surges, or back EMF impacts during equipment startup / shutdown. If these abnormally high voltages are directly applied to downstream loads (such as chips, sensors, or precision electronic components), they may cause device breakdown, performance failure, or even permanent damage, seriously affecting the reliability and lifespan of the equipment.

[0003] Currently, common surge protection solutions for power supply circuits mainly use fuses or fused resistors: the circuit is cut off by melting overcurrent, but the response speed is slow (millisecond level), and manual replacement is required after melting, as it cannot be automatically restored. Utility Model Content

[0004] Based on this, and to address the aforementioned technical problems, an anti-impact power supply circuit is provided.

[0005] To solve the above-mentioned technical problems, the present invention adopts the following technical solution:

[0006] An anti-surge power supply circuit is characterized by comprising a power supply terminal PC for connecting to an external power source, a PNP transistor Q1, an NPN transistor Q2, and a PNP transistor Q3. The base of the PNP transistor Q1 is connected to one end of a resistor R10 and a resistor R21. The other end of the resistor R10 is connected to the power supply terminal PC. The other end of the resistor R21 is connected to the negative terminal of a Zener diode D3. The positive terminal of the Zener diode D3 is grounded. The emitter of the PNP transistor Q1 is connected to the power supply terminal PC. The collector is connected between the collector of the NPN transistor Q2 and the base of the PNP transistor Q3. The emitter of the NPN transistor Q2 is grounded. The emitter of the PNP transistor Q3 is connected to the power supply terminal PC. The collector is connected to the load.

[0007] This utility model's anti-surge power supply circuit operates as follows: Under normal voltage input, the voltage reaches the base of Q2, causing Q2 to conduct. Q2's conduction provides a low potential to the base of Q3, allowing Q3 to supply power to the downstream load normally. The protection circuit composed of R10, R21, D3, and PNP transistor Q1 is inactive because it does not trigger the threshold conduction voltage of D3. When the voltage is too high (theoretically exceeding the threshold conduction voltage of D3), it exceeds D3's threshold conduction voltage, causing D3 to conduct. This makes the emitter voltage of Q1 greater than its base voltage, satisfying the conduction condition of Q1, and Q1 conducts. At this time, the circuit signal is mainly divided into three paths: one path goes from the emitter of Q1 to the base, then through R21 and D3; another path goes from the emitter of Q1 to the collector, then through Q2 to ground. The voltage of the last path passing through Q3 is stabilized within a very small range, thus providing high-voltage protection for the downstream circuit and completely blocking the conduction of abnormal voltage to the downstream load, preventing high-voltage surges from damaging the components.

[0008] Among them, by utilizing the fast switching characteristics of transistors, compared with existing technologies, abnormal voltage can be blocked at the first moment of voltage abnormality, with a fast response speed. At the same time, when the input voltage returns to normal, Q3 can automatically restore normal power supply, improving the convenience of equipment maintenance.

[0009] In addition, the conduction threshold voltage of the Zener diode D3 can be precisely selected according to the needs of the scenario, making it widely applicable. Attached Figure Description

[0010] The present invention will now be described in detail with reference to the accompanying drawings and specific embodiments:

[0011] Figure 1 A schematic diagram of the structure of an automotive pedal displacement signal output circuit provided in this application embodiment. Figure 1 ;

[0012] Figure 2 A schematic diagram of the structure of an automotive pedal displacement signal output circuit provided in this application embodiment. Figure 2 . Detailed Implementation

[0013] like Figure 1 and Figure 2 As shown, this application embodiment provides an automotive pedal displacement signal output circuit, including a power supply unit, a Hall sensor U1, an NMOS transistor Q8, a PNP transistor Q10, and an NMOS transistor Q5.

[0014] like Figure 1 and Figure 2 As shown, the power supply unit includes a power supply terminal PC, a ground terminal PB, a PNP transistor Q1, an NPN transistor Q2, a PNP transistor Q3, and an LDO chip U2.

[0015] The power supply terminal PC is used to connect to an external power source, and the grounding terminal PB is grounded.

[0016] The power supply terminal PC is connected to the positive terminal of the reverse connection protection diode D1 to prevent the power supply terminal PC and the ground terminal PB from being reverse connected.

[0017] The negative terminal of the reverse polarity protection diode D1 is grounded through the filter capacitor C1, which serves as a filter.

[0018] The negative terminal of the reverse polarity protection diode D1 is also connected to one end of resistor R10, the emitter of PNP transistor Q1, the base of NPN transistor Q2, and the emitter of PNP transistor Q3.

[0019] The base of PNP transistor Q1 is connected to the other end of resistor R10 and one end of resistor R21. The other end of resistor R21 is connected to the cathode of Zener diode D3, and the anode of Zener diode D3 is grounded. The collector of PNP transistor Q1 is connected between the collector of NPN transistor Q2 and the base of PNP transistor Q3. The emitter of NPN transistor Q2 is grounded. The collector of PNP transistor Q3 is connected to the load via point A. In this embodiment, the load refers to LDO chip U2, PNP transistor Q10, and resistor R14. Specifically, the collector of PNP transistor Q3 is connected via point A to the power supply terminal VIN and enable terminal EN of LDO chip U2, the emitter of PNP transistor Q10, and one end of resistor R14. See [link to documentation]. Figure 2 .

[0020] Among them, PNP transistor Q1, NPN transistor Q2, PNP transistor Q3 and Zener diode D3 play the role of preventing high voltage surges.

[0021] like Figure 1 As shown, when the voltage input to the PC is normal, the power supply voltage passes through the anti-reverse diode D1 and R5 to the base of Q2, Q2 conducts, and Q2 provides a low potential to the base of Q3. At this time, Q3 conducts and supplies power to the downstream load normally. The protection circuit composed of R10, R21, D3 and Q1 does not work because the threshold conduction voltage of D3 of 33V is not triggered.

[0022] When the voltage input to the power supply PC is too high (theoretically greater than 33V), it exceeds the threshold voltage of D3, causing D3 to conduct. This makes the emitter voltage of Q1 greater than the base voltage, satisfying the conduction condition of Q1. Q1 then conducts. At this time, the circuit signal is mainly divided into three paths: one path goes through the emitter of Q1 to the base, then through R21 and D3; another path goes through the emitter of Q1 to the collector, then through Q2 and R11 to ground. Meanwhile, the voltage of the last path through Q3 is stabilized within a very small range (around 8V), thus providing high-voltage protection for the subsequent circuits.

[0023] In this circuit, the base of NPN transistor Q2 is connected to the negative terminal of diode D1 via resistor R5. Resistor R5 serves to limit current. This base is also connected to the negative terminal of Zener diode D5. The positive terminal of Zener diode D5 is grounded. Zener diode D5 serves to stabilize the base voltage of NPN transistor Q2.

[0024] Resistor R11 limits the current and prevents the collector-emitter current from becoming too large when Q2 is turned on, which could burn out Q2.

[0025] Diode D8 is used to prevent excessive reverse current and voltage from Q2.

[0026] like Figure 2 As shown, the collector power supply output of PNP transistor Q3 is split into two paths at point A. One path supplies the power supply terminal VIN and enable terminal EN of LDO chip U2, and the other path supplies the emitter of PNP transistor Q10 and resistor R14.

[0027] The grounding terminal GND of the LDO chip U2 is grounded, and the output terminal VOUT is connected to the power supply terminal VDD of the Hall sensor U1 to provide the operating voltage for the Hall sensor U1.

[0028] Capacitor C2 is used to filter the power supply terminal VIN of U2.

[0029] The bidirectional diode D6 serves to improve power and enable bidirectional conduction.

[0030] Capacitor C9 is used to filter the output terminal VOUT of U2.

[0031] The ground terminal GND of Hall sensor U1 is grounded, and the output terminal OUT is connected to the gate of NMOS transistor Q8.

[0032] The output terminal OUT of Hall sensor U1 is also connected to the negative terminal of Zener diode D2, and the positive terminal of Zener diode D2 is grounded. Zener diode D2 plays the role of stabilizing the output voltage of Hall sensor U1. The output terminal OUT of Hall sensor U1 is also current-limited through pull-up resistor R13.

[0033] Capacitors C10 and C5 are used to filter the power supply terminal VDD and the output terminal OUT of U1, respectively.

[0034] The source of NMOS transistor Q8 is grounded, and its drain is connected to the other end of resistor R14. The base of PNP transistor Q10 is connected to the drain of NMOS transistor Q8 via resistor R12, and its collector is connected to the signal output terminal PF. The gate of NMOS transistor Q5 is connected to the drain of NMOS transistor Q8, and its source is grounded. The drain of NMOS transistor Q5 is connected to the signal output terminal PF.

[0035] The output terminal OUT of Hall sensor U1 outputs a pedal position signal, the voltage of which changes with the pedal opening. When this voltage is input to the gate of NMOS transistor Q8, if the conduction condition is met, NMOS transistor Q8 conducts, pulling down the base voltage of PNP transistor Q10, causing PNP transistor Q10 to conduct. This results in a high potential output through signal output terminal PF. In this case, NMOS transistor Q5 is cut off. When the voltage of the pedal position signal output by Hall sensor U1 does not meet the conduction condition of NMOS transistor Q8, PNP transistor Q10 cannot conduct. In this case, NMOS transistor Q5 meets the conduction condition and can output a low potential through signal output terminal PF. Therefore, signal output terminal PF can output a PWM signal.

[0036] Resistor R14 is a pull-up resistor, providing pull-up protection. Resistor R12 is a current-limiting resistor, preventing excessive current through the base of Q10, providing current-limiting protection. Resistor R3 and capacitor C4 are used to prevent high-frequency oscillation in the Q5 circuit. Resistor R1 is used to prevent excessive conduction current in Q10, providing current-limiting protection. Inductors L1 and L2 are two-stage inductors for energy storage, providing filtering. Capacitors C7 and C8 provide filtering. Diode D11 provides voltage regulation and clamping. Thermistor T1 is used to prevent overcurrent at the signal output terminal PF.

[0037] The power supply terminal of Hall sensor U1 is also connected to the programming terminal PE via fuse F1. The output terminal of Hall sensor U1 is also connected to the programming terminal PD, which is used to program Hall sensor U1 in the initial stage. In order to avoid the programming terminal PE from affecting the output voltage of LDO chip U2, the programming terminal PE is disconnected by blowing fuse F1 after programming is completed.

[0038] Diode D4 is used to filter out EMC interference.

[0039] As can be seen from the above, the automotive pedal displacement signal output circuit provided in this application embodiment is controlled by Hall sensor U1 and transistors (NMOS transistor Q8, PNP transistor Q10, and NMOS transistor Q5). The voltage output by Hall sensor U1 directly drives the on / off state of NMOS transistor Q8, thereby controlling the alternating conduction of PNP transistor Q10 and NMOS transistor Q5. Finally, a PWM signal (alternating high / low potential output) corresponding to the pedal displacement is generated at the signal output terminal, effectively meeting the needs of automotive electronic systems to develop towards digitalization and high precision.

[0040] In addition, the surge protection power supply circuit, composed of components such as the power supply PC, PNP transistor Q1, NPN transistor Q2, and PNP transistor Q3, operates as follows: under normal voltage input, the voltage passes through the reverse protection diode D1 and R5 to the base of Q2, causing Q2 to conduct. Q2's conduction provides a low potential to the base of Q3, allowing Q3 to supply power to the downstream load normally. The protection circuit composed of R10, R21, D3, and PNP transistor Q1 does not operate because the threshold conduction voltage of 33V for D3 is not triggered. When the voltage input to the power supply PC is too high (theoretically...),... When the voltage exceeds 33V, the threshold voltage of D3 is exceeded, causing D3 to conduct. This makes the emitter voltage of Q1 greater than the base voltage, satisfying the conduction condition of Q1. Q1 then conducts. At this time, the circuit signal is mainly divided into three paths: one path goes through the emitter of Q1 to the base, then through R21 and D3; another path goes through the emitter of Q1 to the collector, then through Q2 and R11 to ground. Meanwhile, the voltage of the last path through Q3 is stabilized within a very small range (around 8V), thus providing high-voltage protection for the subsequent circuit and completely blocking the conduction of abnormal voltage to the subsequent load, preventing high-voltage surges from damaging the devices.

[0041] Among them, by utilizing the fast switching characteristics of transistors, compared with existing technologies, abnormal voltage can be blocked at the first moment of voltage abnormality, with a fast response speed. At the same time, when the input voltage returns to normal, Q3 can automatically restore normal power supply, improving the convenience of equipment maintenance.

[0042] The conduction threshold voltage of the Zener diode D3 can be precisely selected according to the needs of the scenario, making it widely applicable.

[0043] However, those skilled in the art should recognize that the above embodiments are only used to illustrate the present utility model and are not intended to limit the present utility model. Any changes or modifications to the above embodiments within the scope of the essential spirit of the present utility model will fall within the scope of the claims of the present utility model.

Claims

1. A surge protected power supply circuit, characterized by, The device includes a power supply terminal PC for connecting to an external power source, a PNP transistor Q1, an NPN transistor Q2, and a PNP transistor Q3. The base of the PNP transistor Q1 is connected to one end of a resistor R10 and a resistor R21. The other end of the resistor R10 is connected to the power supply terminal PC. The other end of the resistor R21 is connected to the negative terminal of a Zener diode D3. The positive terminal of the Zener diode D3 is grounded. The emitter of the PNP transistor Q1 is connected to the power supply terminal PC, and the collector is connected between the collector of the NPN transistor Q2 and the base of the PNP transistor Q3. The emitter of the NPN transistor Q2 is grounded, and the emitter of the PNP transistor Q3 is connected to the power supply terminal PC. The collector is connected to the load.

2. A surge protected power supply circuit as claimed in claim 1, wherein, It also includes a reverse connection protection diode D1, the positive terminal of which is connected to the power supply terminal PC, and the negative terminal is connected to the resistor R10, the emitter of the PNP transistor Q1, the base of the NPN transistor Q2, and the emitter of the PNP transistor Q3.

3. A surge protected power supply circuit as defined in claim 1, wherein It also includes a filter capacitor C1, one end of which is connected to the negative terminal of the reverse polarity protection diode D1, and the other end is grounded.

4. The surge-resistant power supply circuit according to claim 1, characterized in that, The base of the NPN transistor Q2 is connected to the negative terminal of the reverse polarity protection diode D1 via a current-limiting resistor R5. The base is also connected to the negative terminal of the Zener diode D5, and the positive terminal of the Zener diode D5 is grounded.

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