An adaptive gate drive device

By using the detection module, control module, and drive module of the adaptive gate drive device, closed-loop control of the power semiconductor device is realized, solving the problems of switching loss and voltage and current overshoot, and improving the performance and reliability of the device.

CN224385485UActive Publication Date: 2026-06-19CHINA ELECTRIC POWER RESEARCH INSTITUTE CO LTD +2

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
CHINA ELECTRIC POWER RESEARCH INSTITUTE CO LTD
Filing Date
2025-04-27
Publication Date
2026-06-19

AI Technical Summary

Technical Problem

In existing technologies, power semiconductor devices cannot simultaneously suppress switching losses and voltage/current overshoot under all operating conditions, and open-loop control lacks universality.

Method used

An adaptive gate drive device is adopted, including a detection module, a control module, and a drive module. The control parameters are adjusted in real time through a closed-loop control method, and the drive process is refined according to the voltage and current changes of the power semiconductor device.

🎯Benefits of technology

It reduces switching losses in power semiconductor devices, suppresses voltage and current overshoot, and improves device lifespan and reliability.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application provides an adaptive gate drive device. The drive device can include a detection module, a control module and a drive module. The detection module outputs a first voltage rising signal, a first voltage falling signal, a second signal rising signal and a second voltage falling signal to the control module. The control module outputs a plurality of turn-on control signals and a plurality of turn-off control signals to the drive module. The drive module drives a power semiconductor device. The application adopts a closed-loop control mode. When the working voltage and current of the power semiconductor device change, the control parameters are adjusted in real time during the turn-on or turn-off process, the switching loss of the power semiconductor device is reduced, the low-voltage current overshoot of the power semiconductor device can be realized, and the failure of the power semiconductor device is avoided.
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Description

Technical Field

[0001] This application relates to the field of power semiconductor device driving technology, and specifically to an adaptive gate driving device. Background Technology

[0002] Power semiconductor devices, represented by insulated-gate bipolar transistors (IGBTs) and metal-oxide-semiconductor field-effect transistors (MOSFETs), are the core components of power electronic power conversion devices and are widely used in small household appliances, electric vehicles, rail transportation, smart grids, aerospace and other fields.

[0003] As the carrier of signal transmission and implementation, the drive device controls the switching on and off of power semiconductor devices, and also protects and optimizes their performance. The losses of power semiconductor devices account for a significant proportion of the total losses in power electronic power conversion devices, reaching up to 40% in some applications. Reducing the losses of power semiconductor devices offers numerous benefits, such as lowering the temperature rise of the power module housing the devices, improving its lifespan and reliability, or increasing the switching frequency of the devices, thereby increasing the power density of the power module.

[0004] Increasing the switching speed of power semiconductor devices can effectively reduce their switching losses; however, it also introduces extremely high voltage and current overshoot, which can easily damage the devices. While staged control of the power semiconductor device's switching process (i.e., the turn-on and turn-off processes) can suppress voltage and current overshoot and reduce switching losses, the parameters of power semiconductor devices from different manufacturers vary significantly, and the duration of each stage of the switching process also differs. Furthermore, factors such as bus voltage, load current, and temperature all significantly affect the switching process, making open-loop control lack universality.

[0005] The driving devices provided by related technologies employ an open-loop control method, driving power semiconductor devices through a control module and a drive module. Typically, control parameters for the turn-on or turn-off process, including drive current and timing, are pre-set and fixed, and these parameters do not adjust with changes in the actual operating conditions of the power semiconductor device. When the operating voltage and current of the power semiconductor device change, if the pre-set control parameters are still used during the turn-off process, it will lead to higher switching losses in the power semiconductor device and is prone to high voltage and current overshoot. Utility Model Content

[0006] To address the problem that existing power semiconductor devices struggle to simultaneously suppress switching losses and voltage / current overshoot under all operating conditions, this application provides an adaptive gate drive device, which may include a detection module, a control module, and a drive module.

[0007] The detection module is used to output a first voltage rise signal, a first voltage fall signal, a second signal rise signal, and a second voltage fall signal based on the first voltage of the gate and the second voltage between the first and second electrodes in the power semiconductor device.

[0008] The control module is used to: output multiple turn-on control signals based on the drive signal, the first voltage rise signal, and the second voltage fall signal; and output multiple turn-off control signals based on the drive signal, the first voltage fall signal, and the second voltage rise signal.

[0009] The driver module is used to drive power semiconductor devices according to multiple turn-on control signals and multiple turn-off control signals.

[0010] In some possible implementations, the detection module includes a first input unit, a second input unit, a first output unit, and a second output unit. The first input unit is connected to a gate and is also connected to a first output unit. The second input unit is connected to a first gate and is also connected to a second output unit.

[0011] The first input unit is used to: acquire the first voltage and output the first voltage change rate based on the first voltage.

[0012] The second input unit is used to: acquire the second voltage and output the second voltage change rate based on the second voltage.

[0013] The first output unit is used to output a first voltage rise signal and a first voltage fall signal according to the first voltage change rate.

[0014] The second output unit is used to output a second voltage rise signal and a second voltage fall signal according to the second voltage change rate.

[0015] For example, when the first voltage rises, the first voltage change rate is positive, the first voltage rise signal is a high-level signal, and the first voltage fall signal is a low-level signal.

[0016] When the first voltage drops, the first voltage change rate is negative; the first voltage rise signal is a low-level signal; and the first voltage drop signal is a high-level signal.

[0017] When the first voltage remains constant, the rate of change of the first voltage is zero, and both the first voltage rise signal and the first voltage fall signal are low-level signals.

[0018] Optionally, when the second voltage rises, the rate of change of the second voltage is positive, the second voltage rise signal is a high-level signal, and the second voltage fall signal is a low-level signal.

[0019] When the second voltage drops, the rate of change of the second voltage is negative; when the second voltage rises, the signal is a low-level signal; when the second voltage falls, the signal is a high-level signal.

[0020] When the second voltage remains constant, the rate of change of the second voltage is zero, and both the second voltage rise signal and the second voltage fall signal are low-level signals.

[0021] In some other possible implementations, the control module includes an on control unit and an off control unit.

[0022] The activation control unit is used to: perform logical operations on the first voltage rise signal and the second voltage fall signal when the drive signal is a high-level signal, identify the second voltage fall phase, and reduce the number of high-level signals among multiple activation control signals during the second voltage fall phase.

[0023] The shutdown control unit is used to: perform logical operations on the first voltage drop signal and the second voltage rise signal when the drive signal is a low-level signal, identify the second voltage rise phase, and reduce the number of high-level signals among multiple shutdown control signals during the second voltage rise phase.

[0024] In another possible implementation, the driver module includes an enable driver unit and a disable driver unit.

[0025] The turn-on drive unit is used to output a turn-on drive current to the power semiconductor device according to multiple turn-on control signals.

[0026] The shutdown drive unit is used to output a shutdown drive current to the power semiconductor device according to multiple shutdown control signals.

[0027] Furthermore, the turn-on drive unit includes multiple first current control branches, and the turn-off drive unit includes multiple second current control branches.

[0028] The first terminals of each of the multiple first current control branches are connected to receive a first operating voltage. Alternatively, the first terminals of each of the multiple first current control branches are used to receive multiple first operating voltages in a one-to-one correspondence.

[0029] The second terminal of each of the multiple first current control branches is connected to the first terminal of each of the multiple second current control branches, serving as the output terminal of the drive module.

[0030] The second terminals of each of the multiple second current control branches are connected to receive a second operating voltage. Alternatively, the second terminals of each of the multiple second current control branches are used to receive multiple second operating voltages in a one-to-one correspondence.

[0031] Optionally, the first current control branch and / or the second current control branch are variable current branches, which include a first controllable switch and a current source connected in series.

[0032] The first current control branch and / or the second current control branch are variable voltage branches, each comprising a second controllable switch and a first resistor connected in series. Alternatively,

[0033] The first current control branch and / or the second current control branch are variable resistor branches, and the variable resistor branch includes a third controllable switch and a second resistor.

[0034] Optionally, the control module can be a field-programmable gate array (FPGA) or a complex programmable logic device (CPLD).

[0035] For example, the first input unit and the second input unit employ differentiating circuits.

[0036] The first output unit includes a first digital-to-analog converter circuit and a first processing chip. The input terminal of the first digital-to-analog converter circuit is used to receive a first voltage, the output terminal of the first digital-to-analog converter circuit is connected to the input terminal of the first processing chip, and the output terminal of the first processing chip is connected to the control module.

[0037] The second output unit includes a second digital-to-analog converter circuit and a second processing chip. The input terminal of the second digital-to-analog converter circuit is used to receive a second voltage, the output terminal of the second digital-to-analog converter circuit is connected to the input terminal of the second processing chip, and the output terminal of the second processing chip is connected to the control module.

[0038] Compared with the prior art, the beneficial effects of this application are as follows:

[0039] The adaptive gate driving device provided in this application may include a detection module, a control module, and a driving module. The detection module outputs a first voltage rise signal, a first voltage fall signal, a second voltage rise signal, and a second voltage fall signal based on a first voltage at the gate and a second voltage between the first and second electrodes of the power semiconductor device. The control module outputs multiple turn-on control signals based on the driving signal, the first voltage rise signal, and the second voltage fall signal, and outputs multiple turn-off control signals based on the driving signal, the first voltage fall signal, and the second voltage rise signal. The driving module drives the power semiconductor device based on the multiple turn-on control signals and the multiple turn-off control signals. It can be seen that this application adopts a closed-loop control method, using the detection module, control module, and driving module to drive the power semiconductor device. When the operating voltage and current of the power semiconductor device change, the switching losses of the power semiconductor device are reduced by adjusting the control parameters in real time during the turn-on or turn-off process. Furthermore, low voltage and current overshoot of the power semiconductor device can be achieved, thereby preventing the failure of the power semiconductor device.

[0040] When the drive signal is high, the turn-on control unit in this application can perform logical operations on the first voltage rise signal and the second voltage fall signal to identify the second voltage fall phase, and reduce the number of high-level signals among the multiple turn-on control signals during the second voltage fall phase. When the drive signal is low, the turn-off control unit can perform logical operations on the first voltage fall signal and the second voltage rise signal to identify the second voltage rise phase, and reduce the number of high-level signals among the multiple turn-off control signals during the second voltage rise phase. It can be seen that this application can automatically identify different stages in the power semiconductor device's turn-on process and adjust different drive currents for different stages to achieve refined driving, which not only reduces the switching losses of the power semiconductor device but also suppresses voltage and current overshoot. Attached Figure Description

[0041] To more clearly illustrate the technical solutions in this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0042] Figure 1 This is a schematic structural diagram of an adaptive gate driving device in an embodiment of this application;

[0043] Figure 2 This is a schematic structural diagram of the detection module in an embodiment of this application;

[0044] Figure 3This is a schematic structural diagram of the control module in one embodiment of this application;

[0045] Figure 4 This is a schematic structural diagram of a driver module in an embodiment of this application;

[0046] Figure 5a This is another schematic structural diagram of the driving module in an embodiment of this application;

[0047] Figure 5b This is another schematic structural diagram of the driving module in an embodiment of this application;

[0048] Figure 5c This is another schematic structural diagram of the driving module in an embodiment of this application;

[0049] Figure 6 This is another schematic structural diagram of the adaptive gate driving device in the embodiments of this application;

[0050] Figure 7 This is a schematic diagram of the waveforms of the relevant voltages during the turn-on and turn-off processes of the semiconductor power device in the embodiments of this application. Detailed Implementation

[0051] The technical solutions in this application will now be described with reference to the accompanying drawings.

[0052] The terms "first," "second," etc., used in the specification, embodiments, claims, and drawings of this application are for distinguishing purposes only and should not be construed as indicating or implying relative importance or order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion.

[0053] It should be understood that in this application, "at least one (item)" means one or more, and "more than" means two or more. "And / or" is used to describe the relationship between related objects, indicating that three relationships can exist. For example, "A and / or B" can represent three cases: only A exists, only B exists, and both A and B exist simultaneously, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one (item) of a, b, or c can represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.

[0054] This application provides an adaptive gate driving device that can be used to drive power semiconductor devices. The power semiconductor device can be a voltage-controlled semiconductor device. In the embodiments of this application, the power semiconductor device can be a silicon-based or silicon carbide-based insulated gate bipolar transistor (IGBT), or a silicon-based or silicon carbide-based metal-oxide-semiconductor field-effect transistor (MOSFET). Besides IGBTs and MOSFETs, the driving device 100 provided in this application can also be used to drive other voltage-controlled power semiconductor devices. In this embodiment, a MOSFET is used as an example.

[0055] like Figure 1 As shown, the drive device 100 may include a detection module 10, a control module 20, and a drive module 30.

[0056] The detection module 10 is used to output a first voltage rise signal (represented by Vgs_on), a first voltage fall signal (represented by Vgs_off), a second voltage rise signal (represented by Vds_off), and a second voltage fall signal (represented by Vds_on) based on the first voltage of the gate of the power semiconductor device (which can be represented by Vgs), the second voltage fall signal (represented by Vgs_off), and the second voltage rise signal (represented by Vds_on) between the first terminal (which can be the drain of a MOSFET or the collector of an IGBT) and the second terminal (which can be the source of a MOSFET or the emitter of an IGBT).

[0057] The control module 20 is used to: output multiple turn-on control signals (which can be represented by Von) based on the drive signal (which can be a pulse width modulation signal, or simply a PWM modulation signal), the first voltage rise signal Vgs_on, and the second voltage fall signal Vds_on; and output multiple turn-off control signals (which can be represented by Voff) based on the drive signal, the first voltage fall signal Vds_off, and the second voltage rise signal Vds_off.

[0058] The drive module 30 is used to drive a power semiconductor device (i.e., a MOSFET) according to multiple turn-on control signals and multiple turn-off control signals.

[0059] In some possible implementations, such as Figure 2As shown, the detection module 10 includes a first input unit 11, a second input unit 12, a first output unit 13, and a second output unit 14. The first input unit 11 is connected to the gate and is also connected to the first output unit 13. The second input unit 12 is connected to the first gate and is also connected to the second output unit 14.

[0060] The first input unit 11 is used to: acquire the first voltage Vgs, and output the first voltage change rate (which can be represented by Vgsd) based on the first voltage Vgs.

[0061] The second input unit 12 is used to: acquire the second voltage Vds, and output the second voltage change rate (which can be represented by Vdsd) based on the second voltage Vds.

[0062] The first output unit 13 is used to output a first voltage rise signal Vgs_on and a first voltage fall signal Vgs_off according to the first voltage change rate Vgsd.

[0063] The second output unit 14 is used to output a second voltage rise signal Vds_off and a second voltage fall signal Vds_on according to the second voltage change rate Vdsd.

[0064] For example, the first input unit 11 and the second input unit 12 may employ a differentiating circuit.

[0065] The first output unit 13 includes a first digital-to-analog converter circuit and a first processing chip. The input terminal of the first digital-to-analog converter circuit is used to receive a first voltage, the output terminal of the first digital-to-analog converter circuit is connected to the input terminal of the first processing chip, and the output terminal of the first processing chip is connected to the control module.

[0066] The second output unit 14 includes a second digital-to-analog converter circuit and a second processing chip. The input terminal of the second digital-to-analog converter circuit is used to receive a second voltage, the output terminal of the second digital-to-analog converter circuit is connected to the input terminal of the second processing chip, and the output terminal of the second processing chip is connected to the control module.

[0067] For example, when the first voltage Vgs rises, the first voltage change rate Vgsd is a positive voltage, the first voltage rise signal Vgs_on is a high-level signal, and the first voltage fall signal Vgs_off is a low-level signal.

[0068] When the first voltage Vgs decreases, the first voltage change rate Vgsd is a negative voltage, the first voltage rise signal Vgs_on is a low-level signal, and the first voltage fall signal Vgs_off is a high-level signal.

[0069] When the first voltage Vgs remains constant, the first voltage change rate Vgsd is zero, and both the first voltage rise signal Vgs_on and the first voltage fall signal Vgs_off are low-level signals.

[0070] Optionally, when the second voltage Vds rises, the second voltage change rate Vdsd is a positive voltage, the second voltage rise signal Vds_off is a high-level signal, and the second voltage fall signal Vds_on is a low-level signal.

[0071] When the second voltage Vds decreases, the second voltage change rate Vdsd is negative, the second voltage rise signal Vds_off is low, and the second voltage fall signal Vds_on is high.

[0072] When the second voltage Vds remains constant, the rate of change of the second voltage Vdsd is zero, and both the second voltage rise signal Vds_off and the second voltage fall signal Vds_on are low-level signals.

[0073] In some other possible implementations, such as Figure 3 As shown, the control module 20 includes an on control unit 21 and an off control unit 22.

[0074] The turn-on control unit 21 is used to: perform logical operations on the first voltage rise signal Vgs_on and the second voltage fall signal Vds_on when the drive signal is a high-level signal, identify the second voltage fall stage, and reduce the number of high-level signals among the multiple turn-on control signals during the second voltage fall stage.

[0075] In this embodiment, when the drive signal is high, if the first voltage rise signal Vgs_on is low and the second voltage fall signal Vds_on is high, it can be identified that this is the second voltage fall stage. Among the multiple turn-on control signals output by the control module 20, some are high and some are low. In other stages, all multiple turn-on control signals can be high until the drive signal becomes low. During this process, all multiple turn-off control signals are low.

[0076] The shutdown control unit 22 is used to: perform logical operations on the first voltage drop signal Vgs_off and the second voltage rise signal Vds_off when the drive signal is a low-level signal, identify the second voltage rise phase, and reduce the number of high-level signals among the multiple shutdown control signals during the second voltage rise phase.

[0077] In this embodiment, when the drive signal is low, if the first voltage drop signal Vgs_off is low and the second voltage rise signal Vds_off is high, it can be identified that this is the second voltage rise stage. Among the multiple turn-off control signals output by the control module 20, some are high and some are low. In other stages, all multiple turn-off control signals can be high until the drive signal becomes high. During this process, all multiple turn-on control signals are low.

[0078] In another possible implementation, such as Figure 4 As shown, the drive module 30 includes an on drive unit 31 and an off drive unit 32.

[0079] The turn-on drive unit 31 is used to output a turn-on drive current to the power semiconductor device according to multiple turn-on control signals.

[0080] The shutdown drive unit 32 is used to output a shutdown drive current to the power semiconductor device according to multiple shutdown control signals.

[0081] Furthermore, such as Figures 5a to 5c As shown, the turn-on drive unit 31 includes multiple first current control branches 310, and the turn-off drive unit 32 includes multiple second current control branches 320. In this embodiment, the example is that the turn-on drive unit 31 includes three first current control branches 310, and the turn-off drive unit 32 includes three second current control branches 320.

[0082] like Figure 5a and Figure 5c As shown, the first terminals of each of the multiple first current control branches 310 are connected to receive a first operating voltage (which can be represented by VCC). Alternatively, as... Figure 5b As shown, the first terminal of each of the multiple first current control branches 310 is used to receive multiple first operating voltages (which can be represented by Von1, Von2, and Von3) in a one-to-one correspondence.

[0083] The second terminal of each of the multiple first current control branches 310 and the first terminal of each of the multiple second current control branches 320 are connected to serve as the output terminal of the drive module 30.

[0084] like Figure 5a and Figure 5c As shown, the second terminals of each of the multiple second current control branches 320 are connected to receive a second operating voltage (which can be represented by VEE). Alternatively, as... Figure 5b As shown, the second terminal of each of the multiple second current control branches 320 is used to receive multiple second operating voltages (which can be represented by Voff1, Voff2, and Voff3) in a one-to-one correspondence.

[0085] Optionally, the first current control branch 310 and / or the second current control branch 320 are variable current branches. Alternatively, the first current control branch 310 and / or the second current control branch 320 are variable voltage branches, or the first current control branch 310 and / or the second current control branch 320 are variable resistance branches.

[0086] In the embodiments of this application, such as Figure 5a As shown, the first current control branch 310 and the second current control branch 320 are variable current branches. The variable current branch includes a first controllable switch S1 and a current source I connected in series.

[0087] Optional, see reference Figure 5a The turn-on drive unit 31 may also include resistors R10 and R20. Multiple first current control branches 310 are connected in parallel and then connected in series with resistor R10, and multiple second current control branches 320 are connected in parallel and then connected in series with resistor R20.

[0088] like Figure 5b As shown, the first current control branch 310 and the second current control branch 320 are variable voltage branches. The variable voltage branch includes a second controllable switch S2 and a first resistor R1 connected in series.

[0089] like Figure 5c As shown, the first current control branch 310 and the second current control branch 320 are variable resistor branches. The variable resistor branch includes a third controllable switch S3 and a second resistor R2.

[0090] During the turn-on process of the power semiconductor device, after receiving the drive signal, the control module 20 outputs the maximum turn-on drive current to accelerate the turn-on process of the power semiconductor device. By detecting the first and second voltages, it is determined that the power semiconductor device has entered the second voltage drop phase, and the turn-on drive current is reduced to reduce current overshoot. After the second voltage drop phase ends, the turn-on drive current is further increased to accelerate the rise of the first voltage to the maximum turn-on voltage, thereby reducing the turn-on loss of the power semiconductor device.

[0091] During the turn-off process of the power semiconductor device, after receiving the drive signal, the control module 20 outputs the maximum turn-off drive current to accelerate the turn-off process. By detecting the first and second voltages, it is determined that the power semiconductor device has entered the second voltage rise phase. The turn-off drive current is then reduced to minimize voltage overshoot. After the second voltage rise phase ends, the turn-off current is further increased to accelerate the drop of the second voltage to the minimum turn-off voltage, thereby reducing the turn-off losses of the power semiconductor device.

[0092] The embodiments of this application provide, for example, a variable resistor branch, and offer the following: Figure 6 The drive unit 100 shown is described below. The following section addresses the drive unit 100. Figure 6 The working principle of the drive device 100 shown in the figure is described below:

[0093] refer to Figure 7 At time t0, the drive signal Vdriver changes from a low level signal to a high level signal, and the power semiconductor device enters the turn-on stage. Multiple turn-on control signals are all high level signals, and multiple turn-off control signals are all low level signals. The turn-on current of the power semiconductor device is at its maximum, which speeds up the turn-on speed of the power semiconductor device.

[0094] At time t1, the first voltage rise signal Vgs_on is low and the second voltage fall signal Vds_on is high. The first voltage Vgs and the second voltage Vds enter the second voltage fall process. Among the multiple turn-on control signals, some are high and some are low, reducing the turn-on current of the power semiconductor device and thus mitigating current overshoot. Figure 7 It can be seen that the first voltage of the power semiconductor device rises to the Miller plateau voltage Vmp at time t1.

[0095] At time t2, the first voltage rise signal Vgs_on is a high-level signal or the second voltage fall signal Vds_on is a low-level signal, exiting the second voltage fall phase. Multiple turn-on control signals are all high-level signals, increasing the turn-on current of the power semiconductor device and accelerating the rise of the first voltage of the power semiconductor device to the first operating voltage VCC.

[0096] At time t3, the drive signal Vdriver goes low, the power semiconductor device enters the turn-off phase, multiple turn-on control signals are all low, and multiple turn-off control signals are all high. The turn-off current of the power semiconductor device is at its maximum, which speeds up the turn-off speed of the power semiconductor device.

[0097] At time t4, the first voltage drop signal Vgs_off is a low-level signal and the second voltage rise signal Vds_off is a high-level signal, entering the second voltage rise process. Among the multiple turn-off control signals, some are high-level signals and some are low-level signals. The turn-off current of the power semiconductor device decreases, thereby reducing the second voltage overshoot.

[0098] At time t5, the first voltage drop signal Vgs_off is high or the second voltage rise signal Vds_off is low, exiting the second voltage rise process. Multiple turn-off control signals are all high, the turn-off current of the power semiconductor device increases, and the first voltage drops to the second operating voltage VEE.

[0099] The above are merely embodiments of this application and are not intended to limit this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application shall be included within the scope of the claims of this application pending approval.

Claims

1. An adaptive gate drive apparatus, characterized by, It includes a detection module, a control module, and a drive module; The detection module is used to output a first voltage rise signal, a first voltage fall signal, a second signal rise signal, and a second voltage fall signal based on the first voltage of the gate and the second voltage between the first and second electrodes in the power semiconductor device. The control module is configured to: output multiple turn-on control signals based on the drive signal, the first voltage rise signal, and the second voltage fall signal; and output multiple turn-off control signals based on the drive signal, the first voltage fall signal, and the second voltage rise signal. The driving module is used to drive the power semiconductor device according to the plurality of turn-on control signals and the plurality of turn-off control signals.

2. The drive apparatus according to claim 1, characterized by The detection module includes a first input unit, a second input unit, a first output unit, and a second output unit; the first input unit is connected to the gate, the first input unit is also connected to the first output unit, the second input unit is connected to the first gate, and the second input unit is also connected to the second output unit. The first input unit is used to: acquire the first voltage and output a first voltage change rate based on the first voltage; The second input unit is used to: acquire the second voltage and output a second voltage change rate based on the second voltage; The first output unit is configured to: output the first voltage rise signal and the first voltage fall signal according to the first voltage change rate; The second output unit is used to output the second voltage rise signal and the second voltage fall signal according to the second voltage change rate.

3. The driving device according to claim 2, characterized in that, When the first voltage rises, the rate of change of the first voltage is positive; the first voltage rise signal is a high-level signal; and the first voltage fall signal is a low-level signal. When the first voltage drops, the rate of change of the first voltage is negative, the signal when the first voltage rises is a low-level signal, and the signal when the first voltage falls is a high-level signal. When the first voltage remains constant, the rate of change of the first voltage is zero, and both the first voltage rise signal and the first voltage fall signal are low-level signals.

4. The driving device according to claim 2, characterized in that, When the second voltage rises, the rate of change of the second voltage is positive, the signal of the second voltage rise is a high-level signal, and the signal of the second voltage fall is a low-level signal; When the second voltage drops, the rate of change of the second voltage is negative; the signal when the second voltage rises is a low-level signal; and the signal when the second voltage falls is a high-level signal. When the second voltage remains constant, the rate of change of the second voltage is zero, and both the second voltage rise signal and the second voltage fall signal are low-level signals.

5. The drive apparatus according to claim 1, characterized by The control module includes an on control unit and an off control unit; The activation control unit is configured to: when the drive signal is a high-level signal, perform logical operations on the first voltage rise signal and the second voltage fall signal, identify the second voltage fall phase, and reduce the number of high-level signals in the plurality of activation control signals during the second voltage fall phase; The shutdown control unit is configured to: when the drive signal is a low-level signal, perform logical operations on the first voltage drop signal and the second voltage rise signal, identify the second voltage rise phase, and reduce the number of high-level signals among the plurality of shutdown control signals during the second voltage rise phase.

6. The drive apparatus according to claim 1, characterized by The driving module includes an activation driving unit and a deactivation driving unit; The turn-on drive unit is used to: output a turn-on drive current to the power semiconductor device according to the plurality of turn-on control signals; The shutdown drive unit is used to output a shutdown drive current to the power semiconductor device according to the plurality of shutdown control signals.

7. The drive apparatus according to claim 6, characterized by The turn-on drive unit includes multiple first current control branches, and the turn-off drive unit includes multiple second current control branches. The first terminals of each of the multiple first current control branches are connected to receive a first operating voltage; or, the first terminals of each of the multiple first current control branches are used to receive multiple first operating voltages in a one-to-one correspondence. The second terminal of each of the multiple first current control branches is connected to the first terminal of each of the multiple second current control branches, serving as the output terminal of the drive module; The second terminals of each of the multiple second current control branches are connected to receive a second operating voltage; or, the second terminals of each of the multiple second current control branches are used to receive multiple second operating voltages in a one-to-one correspondence.

8. The driving device according to claim 7, characterized in that, The first current control branch and / or the second current control branch are variable current branches, and the variable current branch includes a first controllable switch and a current source connected in series; The first current control branch and / or the second current control branch are variable voltage branches, wherein the variable voltage branch includes a second controllable switch and a first resistor connected in series; or... The first current control branch and / or the second current control branch are variable resistor branches, and the variable resistor branch includes a third controllable switch and a second resistor.

9. The drive apparatus according to claim 1, characterized by The control module uses a field-programmable gate array (FPGA) or a complex programmable logic device (CPLD).

10. The driving device according to claim 2, characterized in that, The first input unit and the second input unit employ a differentiating circuit; The first output unit includes a first digital-to-analog converter circuit and a first processing chip; the input terminal of the first digital-to-analog converter circuit is used to receive the first voltage, the output terminal of the first digital-to-analog converter circuit is connected to the input terminal of the first processing chip, and the output terminal of the first processing chip is connected to the control module. The second output unit includes a second digital-to-analog converter circuit and a second processing chip; The input terminal of the second digital-to-analog converter circuit is used to receive the second voltage, the output terminal of the second digital-to-analog converter circuit is connected to the input terminal of the second processing chip, and the output terminal of the second processing chip is connected to the control module.