Monitoring device for power transformers

Abstract

The utility model discloses a monitoring device of power transformer relates to transformer technical field to solve the low monitoring efficiency of power transformer, not comprehensive problem in prior art. Monitoring device, include: the connector connection between bottom plate and top plate, bottom plate has at least integrated direct current acquisition circuit, open circuit, open circuit and power supply circuit, top plate has at least integrated main chip, 485 communication circuit, timing circuit, storage circuit and ethernet circuit, the output of direct current acquisition circuit, the signal output of open circuit all are connected with the signal input of main chip, the signal output of main chip is connected with the signal input of open circuit, direct current acquisition includes multiple 4 20mA acquisition circuit and multiple variable acquisition circuit, every 4 20mA acquisition circuit all are connected with main chip, every variable acquisition circuit all are connected with main chip. The utility model is used for improving the comprehensive nature and monitoring efficiency of power transformer monitoring.

Description

Technical Field

[0001] This utility model relates to the field of transformer technology, and in particular to a monitoring device for power transformers. Background Technology

[0002] Traditional power transformer monitoring relies heavily on manual data reading, which makes it difficult to achieve real-time dynamic monitoring and results in a lag in operation and maintenance response.

[0003] Existing monitoring devices have limitations in signal acquisition. They can usually only support the acquisition of a single type of signal and cannot flexibly accommodate different signals output by multiple sensors. This makes it difficult to comprehensively obtain transformer operating status parameters and affects the comprehensiveness of monitoring.

[0004] Meanwhile, the existing devices have a relatively dispersed functional module design and low hardware integration, which not only increases the complexity of installation and maintenance, but also makes it difficult to flexibly expand the data acquisition channels according to actual needs. In addition, some devices lack standardized digital communication interfaces, making it difficult to connect with modern communication networks and smart grid systems, resulting in low data transmission efficiency, which further restricts the improvement of monitoring efficiency.

[0005] The aforementioned problems make it difficult for traditional monitoring methods to meet the needs for efficient and comprehensive monitoring of power transformers. Utility Model Content

[0006] The purpose of this invention is to provide a monitoring device for power transformers, which improves the comprehensiveness and efficiency of power transformer monitoring.

[0007] To achieve the above objectives, this utility model provides the following technical solution:

[0008] This utility model provides a monitoring device for power transformers, comprising:

[0009] The bottom plate and the top plate are connected by connectors;

[0010] The base plate integrates at least a DC acquisition circuit, an input circuit, an output circuit, and a power supply circuit; the top plate integrates at least a main chip, a 485 communication circuit, a timing circuit, a storage circuit, and an Ethernet circuit.

[0011] The DC acquisition circuit, the input circuit, the output circuit, and the top plate are all connected to the power supply circuit;

[0012] The 485 communication circuit, the timing circuit, the storage circuit, and the Ethernet circuit are all connected to the main chip;

[0013] The output terminal of the DC acquisition circuit and the signal output terminal of the input circuit are both connected to the signal input terminal of the main chip; the signal output terminal of the main chip is connected to the signal input terminal of the output circuit.

[0014] The DC acquisition circuit includes multiple 4-20mA acquisition circuits and multiple variable acquisition circuits; each of the 4-20mA acquisition circuits is connected to the main chip; each of the variable acquisition circuits is connected to the main chip.

[0015] Optionally, the 4-20mA acquisition circuit includes: a first resistor, a second resistor, a third resistor, a first capacitor, a second capacitor, and a third capacitor;

[0016] Wherein, the first end of the first resistor and the first end of the second resistor are both connected to the positive input terminal of the 4-20mA acquisition circuit;

[0017] The second end of the first resistor and the first end of the third resistor are both connected to the negative input terminal of the 4-20mA acquisition circuit;

[0018] The first terminal of the first capacitor and the first terminal of the second capacitor are both connected to the second terminal of the second resistor;

[0019] The first terminal of the third capacitor and the second terminal of the second capacitor are both connected to the second terminal of the third resistor;

[0020] The second terminal of the first capacitor is connected to the second terminal of the third capacitor.

[0021] Optionally, the variable acquisition circuit includes: a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a first jumper, a second jumper, a third jumper, a fourth capacitor, a fifth capacitor, and a sixth capacitor;

[0022] Wherein, the first end of the fourth resistor and the first end of the first jumper are both connected to the negative input terminal of the variable acquisition circuit;

[0023] The second end of the fourth resistor and the first end of the fifth resistor are both connected to the second end of the first jumper.

[0024] The first end of the sixth resistor, the first end of the seventh resistor, and the first end of the eighth resistor are all connected to the positive input terminal of the variable acquisition circuit;

[0025] The second end of the sixth resistor and the second end of the fifth resistor are both connected to the first end of the second jumper; the second end of the second jumper is connected to a reference voltage.

[0026] The second end of the seventh resistor is connected to the first end of the third jumper, and the second end of the third jumper and the first end of the ninth resistor are both connected to the second end of the first jumper.

[0027] The first terminal of the fourth capacitor, the first terminal of the fifth capacitor, and the positive output terminal of the variable acquisition circuit are all connected to the second terminal of the eighth resistor; the second terminal of the fourth capacitor is connected to the first terminal of the sixth capacitor.

[0028] The second terminal of the fifth capacitor, the second terminal of the sixth capacitor, and the negative output terminal of the variable acquisition circuit are all connected to the second terminal of the ninth resistor.

[0029] Optionally, the 485 communication circuit includes multiple 485 communication sub-circuits;

[0030] The 485 communication sub-circuit includes: a first optocoupler, a second optocoupler, an inverter, a 485 transceiver chip, a tenth resistor, an eleventh resistor, a twelfth resistor, and a thirteenth resistor; the first optocoupler includes a first light-emitting diode and a first phototransistor; the second optocoupler includes a second light-emitting diode and a second phototransistor;

[0031] The collector of the first phototransistor is connected to the first power supply voltage through the tenth resistor; the emitter of the first phototransistor is grounded.

[0032] The positive terminal of the first light-emitting diode is connected to the second power supply voltage, the negative terminal of the first light-emitting diode is connected to the first end of the eleventh resistor, and the second end of the eleventh resistor is connected to the 485 transceiver chip.

[0033] The first signal terminal of the 485 communication sub-circuit is connected to the node between the collector of the first phototransistor and the tenth resistor.

[0034] The negative terminal of the second light-emitting diode is connected to the first end of the twelfth resistor, and the second end of the twelfth resistor is connected to the second signal terminal of the 485 communication sub-circuit; the positive terminal of the second light-emitting diode is connected to the first power supply voltage.

[0035] The collector of the second phototransistor is connected to the first end of the thirteenth resistor, the second end of the thirteenth resistor is connected to the second power supply voltage, and the emitter of the second phototransistor is grounded.

[0036] The collector of the second phototransistor is also connected to the input of the inverter; the output of the inverter is simultaneously connected to the 485 transceiver chip.

[0037] Optionally, the input circuit includes multiple input sub-circuits; the multiple input sub-circuits share a common cathode;

[0038] The input sub-circuit includes: a third optocoupler, a first diode, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, and a seventh capacitor; the third optocoupler includes a third phototransistor and a third light-emitting diode;

[0039] The first end of the fourteenth resistor and the first end of the seventh capacitor are both connected to the collector of the third phototransistor, and the second end of the seventh capacitor and the emitter of the third phototransistor are both grounded; the second end of the fourteenth resistor is connected to the power supply voltage, and the first end of the fourteenth resistor is also connected to the main chip.

[0040] The positive terminal of the third light-emitting diode, the first terminal of the fifteenth resistor, and the first terminal of the first diode are all connected to the first terminal of the sixteenth resistor, and the second terminal of the sixteenth resistor is connected to the switch input point of the input circuit.

[0041] The negative terminal of the third light-emitting diode, the second terminal of the fifteenth resistor, and the second terminal of the first diode are all connected to the first terminal of the seventeenth resistor, and the second terminal of the seventeenth resistor is connected to the common negative terminal.

[0042] Optionally, the output circuit includes multiple output sub-circuits;

[0043] The output sub-circuit includes: an eighteenth resistor, a fourth optocoupler, a second diode, and a relay; the fourth optocoupler includes at least a fourth light-emitting diode and a fourth phototransistor.

[0044] The positive terminal of the fourth LED is connected to the first end of the eighteenth resistor, and the second end of the eighteenth resistor is connected to the third power supply voltage; the negative terminal of the fourth LED is connected to the signal terminal of the output circuit.

[0045] The collector of the fourth phototransistor is connected to the fourth power supply voltage. The negative terminal of the second diode and the first terminal of the relay coil are both connected to the emitter of the fourth phototransistor. The second terminal of the relay coil is connected to the positive terminal of the second diode.

[0046] Optionally, the power supply circuit integrates at least an AC-DC converter, a first low-dropout linear regulator, a second low-dropout linear regulator, and a DC-DC converter.

[0047] The input terminal of the AC-DC converter is connected to an external power supply; the input terminals of the first low-dropout linear regulator and the DC-DC converter are both connected to the output terminal of the AC-DC converter; the output terminal of the first low-dropout linear regulator is connected to the main chip.

[0048] The first voltage output terminal of the DC-DC converter is connected to the output circuit;

[0049] The second voltage output terminal of the DC-DC converter is connected to the input terminal of the second low-dropout linear regulator; the third voltage output terminal of the second low-dropout linear regulator is connected to the 485 transceiver chip.

[0050] Optionally, the main chip integrates at least an Ethernet MAC;

[0051] The Ethernet circuit includes an Ethernet PHY chip and an RJ45 interface; the RJ45 interface has a built-in network transformer; the Ethernet MAC is communicatively connected to the Ethernet PHY chip, and the Ethernet PHY chip is coupled to the network transformer.

[0052] Optionally, the main chip also integrates an SPI controller;

[0053] The storage circuit includes at least a non-volatile memory chip; the SPI controller is connected to the non-volatile memory chip.

[0054] Optionally, the timing circuit includes at least an RTC chip, a backup battery, a crystal oscillator, and a third diode;

[0055] The crystal oscillator and the main chip are both connected to the RTC chip;

[0056] The backup battery is connected to the RTC chip via the third diode.

[0057] The beneficial effects of this utility model are as follows: Compared with the prior art, the power transformer monitoring device of this utility model solves the problems of traditional monitoring devices through modular design and functional integration: the base plate and top plate are connected by connectors to realize modular assembly, reduce the planar circuit area, and improve the convenience of installation and maintenance and expandability; the power supply circuit integrated in the base plate supplies power to each module, the input circuit is used to receive external switching signals (such as relay status), and the output circuit is used to output control signals (such as driving alarm devices). The DC acquisition circuit includes multiple 4-20mA acquisition circuits to adapt to standard current output sensors and collect parameters such as temperature and pressure. The DC acquisition circuit also includes multiple variable acquisition circuits to be compatible with various DC signals, expand the acquisition types, and solve the problem of single signal acquisition; the main chip integrated in the top plate serves as the core processing unit to receive and analyze the acquired signals. The 485 communication circuit and Ethernet circuit provide standardized digital interfaces to achieve efficient connection with external networks and smart grid systems. The timing circuit provides timestamps to facilitate data timing analysis, and the storage circuit is used to cache data to avoid loss. Through hardware integration and standardized communication, the comprehensiveness and efficiency of monitoring are improved. Attached Figure Description

[0058] The accompanying drawings, which are included to provide a further understanding of the present invention and constitute a part of this invention, illustrate exemplary embodiments of the present invention and, together with the description thereof, serve to explain the present invention and do not constitute an undue limitation thereof. In the drawings:

[0059] Figure 1 A circuit block diagram of a power transformer monitoring device provided in one embodiment of the present invention;

[0060] Figure 2 A schematic diagram of the circuit structure of a 4-20mA acquisition circuit provided for one embodiment of this utility model;

[0061] Figure 3 A schematic diagram of the circuit structure of a variable acquisition circuit provided in one embodiment of the present invention;

[0062] Figure 4 A schematic diagram of the circuit structure of a 485 communication sub-circuit provided for one embodiment of the present invention;

[0063] Figure 5 A schematic diagram of the circuit structure of an on-response sub-circuit provided in one embodiment of the present utility model;

[0064] Figure 6 A schematic diagram of the circuit structure of the output sub-circuit provided in one embodiment of this utility model;

[0065] Figure 7 A schematic diagram of the circuit structure of a timing circuit provided in one embodiment of the present invention;

[0066] Figure 8 A schematic diagram of the Ethernet circuit structure provided in one embodiment of this utility model.

[0067] 10 - DC acquisition circuit; 20 - Input circuit; 30 - Output circuit; 40 - Power supply circuit; 50 - Main chip; 60 - 485 communication circuit; 61 - 485 interface; 70 - Timing circuit; 80 - Storage circuit; 90 - Ethernet circuit. Detailed Implementation

[0068] To facilitate a clear description of the technical solutions of the embodiments of this utility model, the terms "first" and "second" are used in the embodiments of this utility model to distinguish identical or similar items with essentially the same function and effect. For example, the first threshold and the second threshold are only used to distinguish different thresholds and do not limit their order. Those skilled in the art will understand that the terms "first" and "second" do not limit the quantity or execution order, and the terms "first" and "second" are not necessarily different.

[0069] It should be noted that in this utility model, the terms "exemplary" or "for example" are used to indicate examples, illustrations, or descriptions. Any embodiment or design scheme described as "exemplary" or "for example" in this utility model should not be construed as being more preferred or advantageous than other embodiments or design schemes. Specifically, the use of terms such as "exemplary" or "for example" is intended to present the relevant concepts in a specific manner.

[0070] In this invention, "at least one" means one or more, and "more than one" means two or more. "And / or" describes the relationship between the related objects, indicating that three relationships can exist.

[0071] like Figure 1 As shown, this utility model embodiment provides a monitoring device for a power transformer, which may include: a base plate and a top plate; the base plate and the top plate are connected by connectors;

[0072] The baseboard integrates at least a DC acquisition circuit 10, an input circuit 20, an output circuit 30, and a power supply circuit 40; the topboard integrates at least a main chip 50, a 485 communication circuit 60, a timing circuit 70, a storage circuit 80, and an Ethernet circuit 90.

[0073] The DC acquisition circuit 10, the input circuit 20, the output circuit 30, and the top plate are all connected to the power supply circuit 40;

[0074] The 485 communication circuit 60, timing circuit 70, storage circuit 80, and Ethernet circuit 90 are all connected to the main chip 50;

[0075] The output terminal of the DC acquisition circuit 10 and the signal output terminal of the input circuit 20 are both connected to the signal input terminal of the main chip 50; the signal output terminal of the main chip 50 is connected to the signal input terminal of the output circuit 30.

[0076] The DC acquisition circuit includes multiple 4-20mA acquisition circuits and multiple variable acquisition circuits; each 4-20mA acquisition circuit is connected to the main chip; each variable acquisition circuit is connected to the main chip.

[0077] Understandably, the baseboard also integrates a 485 interface 61, which is connected to the 485 communication circuit 60. The circuit structure of the 485 interface can be found in relevant technologies and will not be elaborated here.

[0078] For example Figure 2The 4-20mA acquisition circuit includes: a first resistor R1, a second resistor R2, a third resistor R3, a first capacitor C1, a second capacitor C2, and a third capacitor C3; wherein, the first terminal of the first resistor R1 and the first terminal of the second resistor R2 are both connected to the positive input terminal DC1+ of the 4-20mA acquisition circuit; the second terminal of the first resistor R1 and the first terminal of the third resistor R3 are both connected to the negative input terminal DC1- of the 4-20mA acquisition circuit; the first terminal of the first capacitor C1 and the first terminal of the second capacitor C2 are both connected to the second terminal of the second resistor R2; the first terminal of the third capacitor C3 and the second terminal of the second capacitor C2 are both connected to the second terminal of the third resistor R3; the second terminal of the first capacitor C1 is connected to the second terminal of the third capacitor C3 and the second terminal of the first capacitor C1 is grounded; the first terminal of the second capacitor C2 is also connected to the positive output terminal of the 4-20mA acquisition circuit, and the second terminal of the second capacitor C2 is also connected to the negative output terminal of the 4-20mA acquisition circuit.

[0079] The 4-20mA acquisition circuit in this embodiment differs from the 4-20mA acquisition circuit in the prior art in several aspects:

[0080] (1) In terms of core component composition, this utility model only includes passive components such as 3 resistors (R1, R2, R3) and 3 capacitors (C1, C2, C3), and no active devices such as operational amplifiers; while the circuits in the prior art not only have passive components such as sampling resistors and capacitors, but also include active components such as integrated operational amplifiers (e.g., LM324, used to form voltage follower circuits and voltage amplification circuits) and matching peripheral resistors.

[0081] (2) In terms of signal processing, this utility model directly samples and filters the 4-20mA signal through a passive network composed of resistors and capacitors. The output signal (e.g., AIN1+, AIN1-) is directly taken from both ends of capacitor C2 without active signal conditioning (e.g., amplification, or following). The existing 4-20mA acquisition circuit first obtains the signal through a sampling circuit, then uses an operational amplifier to achieve voltage following (to increase input impedance) and voltage amplification (to enhance weak signals), and then transmits the signal to the microprocessor after active conditioning.

[0082] (3) In terms of circuit complexity, the structure of this utility model is extremely simple, with few components (only 6 components) and no hierarchical design; the existing 4-20mA acquisition circuit structure is relatively complex, including operational amplifiers and their peripheral circuits, forming a multi-level signal processing link of sampling-following-amplification, with a large number of components.

[0083] As can be seen from the above, the advantages of this 4-20mA acquisition circuit are: 1) Lower hardware cost: It eliminates active components such as operational amplifiers (e.g., LM324) and their associated peripheral components, significantly reducing component procurement costs. Simultaneously, fewer components reduce material and processing costs for PCB layout, offering a clear advantage, especially in mass production. 2) Higher reliability and stability: Passive components (resistors, capacitors) have better anti-interference capabilities and environmental adaptability than active components (operational amplifiers). In harsh environments common in industrial settings such as high temperatures, vibrations, and electromagnetic interference, passive circuits exhibit lower failure rates and more stable signal transmission, reducing module failures caused by active component failures. 3) Significantly reduced power consumption: No additional power supply is required for active components such as operational amplifiers; the entire acquisition circuit consumes almost no power, reducing the overall power consumption of the module and making it suitable for power-sensitive scenarios (e.g., battery-powered portable devices or low-power industrial systems). 4) Smaller size and higher integration: The simplified circuit structure reduces component space requirements, facilitating miniaturized module design, adapting to confined installation environments in industrial settings, and improving module deployment flexibility. 5) More convenient debugging and maintenance: It eliminates the complicated debugging steps such as gain calibration and bias voltage adjustment of operational amplifier circuits. During on-site assembly and later maintenance, it is only necessary to check whether the connection and parameters of passive components are normal, which reduces the technical requirements of operators and shortens the debugging and maintenance time.

[0084] In summary, the 4-20mA acquisition circuit in this embodiment of the present invention has significant advantages in terms of cost, reliability, and power consumption by simplifying the structure and reducing active components, and is especially suitable for industrial automation scenarios with high requirements for economy and stability.

[0085] For example Figure 3 The variable acquisition circuit includes: fourth resistor R4, fifth resistor R5, sixth resistor R6, seventh resistor R7, eighth resistor R8, ninth resistor R9, first jumper JP1, second jumper JP2, third jumper JP3, fourth capacitor C4, fifth capacitor C5 and sixth capacitor C6.

[0086] Among them, the first end of the fourth resistor R4 and the first end of the first jumper JP1 are both connected to the negative input terminal DC4- of the variable acquisition circuit;

[0087] The second end of the fourth resistor R4 and the first end of the fifth resistor R5 are both connected to the second end of the first jumper JP1.

[0088] The first terminal of the sixth resistor R6, the first terminal of the seventh resistor R7, and the first terminal of the eighth resistor R8 are all connected to the positive input terminal DC4+ of the variable acquisition circuit.

[0089] The second terminals of the sixth resistor R6 and the fifth resistor R5 are both connected to the first terminal of the second jumper JP2; the second terminal of the second jumper JP2 is connected to the reference voltage VREF.

[0090] The second end of the seventh resistor R7 is connected to the first end of the third jumper JP3. The second end of the third jumper JP3 and the first end of the ninth resistor R9 are both connected to the second end of the first jumper JP1.

[0091] The first terminal of the fourth capacitor C4, the first terminal of the fifth capacitor C5, and the positive output terminal AIN4+ of the variable acquisition circuit are all connected to the second terminal of the eighth resistor R8; the second terminal of the fourth capacitor C4 is connected to the first terminal of the sixth capacitor C6.

[0092] The second terminal of the fifth capacitor C5, the second terminal of the sixth capacitor C6, and the negative output terminal AIN4- of the variable acquisition circuit are all connected to the second terminal of the ninth resistor R9.

[0093] Specifically, a jumper (JP) is a pluggable shorting device on a circuit board used to change the circuit connection. It consists of two pins (two ends) and a shorting cap (or metal plate). The two pins are the first end and the second end, respectively. When the shorting cap is on the pins, an electrical connection is established between the two ends; removing the shorting cap disconnects the connection. A jumper has a two-end structure; essentially, it is a two-point (two-end) control switch, changing the circuit path by shorting / opening (e.g., if JP1 is shorted, R4 and R5 are connected in parallel; if it is open, R4 is connected alone).

[0094] Figure 3 The variable acquisition circuit has two operating modes. The first operating mode is the 4-20mA acquisition mode (short-circuit JP3 and JP1, disconnect JP2). Current sampling logic: JP1 is short-circuited → R4 and R5 are connected in parallel (reducing the total resistance to adapt to 4-20mA high current sampling); JP3 is short-circuited → R7 is short-circuited, and R6 and R8 form the main sampling path; the 4-20mA current flows in from DC4+, through R6, R5 / R4 (parallel), and R9 back to DC4-, generating a voltage difference across R5 / R4 (parallel). After being filtered by C4-C6, the voltage is output from AIN4+ and AIN4- to the ADC in the main chip.

[0095] In addition, C4, C5, and C6 form a π-type filter network to filter out high-frequency interference in the industrial field (such as inverter and relay noise) and ensure a clean signal.

[0096] Next, we will provide an example of the application of the 4-20mA acquisition mode in power transformers, such as online monitoring of oil conservator / oil chromatography: An oil level transmitter (outputting 4-20mA) is installed in the "oil conservator" (oil tank) of the power transformer to monitor the transformer oil level in real time. When the oil level is abnormal (such as low oil level triggering an oil shortage alarm, or high oil level indicating a cooling system failure), the 4-20mA signal is transmitted to the backend, triggering protection devices (such as early warning or triggering backup cooling).

[0097] For example, cooling system flow monitoring: the flow transmitter of the transformer cooling fan / oil pump outputs 4-20mA, reflecting the circulation flow of the cooling medium (oil / air). If the flow rate is lower than the threshold (e.g., 4mA corresponds to "low flow"), the system will automatically issue an alarm to prevent the transformer from overheating and being damaged due to insufficient cooling.

[0098] The 4-20mA acquisition mode is used for real-time, continuous monitoring of key non-temperature parameters (oil level, flow rate), providing basic data for transformer condition assessment and fault early warning. The 4-20mA signal has strong anti-interference capabilities and long transmission distances, adapting to the long-distance cabling requirements in industrial settings and ensuring stable and reliable parameter monitoring.

[0099] The second operating mode is the PT100 acquisition mode (disconnect JP3 and JP1, short-circuit JP2). Three-wire temperature measurement logic: JP2 short-circuit → VREF is connected to the circuit, providing excitation voltage for the PT100; JP1 is disconnected → R4 is connected alone (to increase input impedance and adapt to the slight resistance changes of the PT100); JP3 is disconnected → R7 is connected, forming a bridge voltage divider circuit with R6 and R9; in the three-wire connection of the PT100, two wires are connected to the R6 and R9 sides (to cancel out wire resistance), and the third wire is connected to the VREF side. By detecting the voltage difference in the bridge circuit, the resistance of the PT100 is calculated (and thus the temperature is calculated). The signal is filtered and output by AIN4+ / -.

[0100] Next, we will provide an example of the application of PT100 acquisition mode in circuit transformers, such as winding / core temperature monitoring: PT100 temperature sensors (three-wire system) are pre-embedded in the transformer windings and core to directly measure the temperature of the core heat-generating components. When the winding temperature approaches 100℃ (or the manufacturer-set threshold), the system triggers an overload warning, automatically adjusts the load, or activates backup cooling to prevent insulation material aging and shorten equipment lifespan.

[0101] For example, a PT100 is installed in the transformer tank / radiator to monitor the upper oil temperature. The oil temperature data is combined with the winding temperature (e.g., if the oil temperature is too high but the winding temperature is normal, it may be a cooling system fault; conversely, it may be due to excessive load) to help determine the root cause of the fault.

[0102] The purpose of the PT100 acquisition mode is to accurately measure the temperature of key components of the transformer, which is the core basis for judging the thermal condition and overload risk of the equipment. The PT100 has high accuracy (±0.1℃) and good linearity, and is suitable for the strict requirements of power systems for temperature monitoring. It is directly related to transformer life management and overload protection logic.

[0103] The advantages of switching between the two modes are: 1) Hardware reuse and lower cost: One circuit covers two sensors (4-20mA transmitter + PT100), eliminating the need to design separate acquisition modules for each sensor. For example, a power transformer needs to simultaneously measure oil level (4-20mA) and winding temperature (PT100) (here, "simultaneously" does not mean that the same circuit acquires two signals at the same time, but rather that the system level achieves real-time collaborative monitoring of the two types of signals through parallel operation of multiple circuits, time-division multiplexing, and buffering). Using a variable circuit can reduce hardware investment by more than 50%. 2) Only one set of wiring needs to be reserved at the same monitoring point (such as the top of the transformer). By switching between the two sensors via jumpers, there is no need to lay separate wiring for 4-20mA and PT100, reducing on-site construction work. 3) Adaptability to multiple scenarios: The monitoring requirements of power transformers are complex: Newly commissioned equipment may first be equipped with a 4-20mA oil level transmitter (rapid deployment); during later upgrades, it can be switched to PT100 temperature monitoring via jumpers (higher accuracy); the variable circuit supports the operation strategy of initial use and flexible upgrades later, without the need to replace hardware. Understandably, if a 4-20mA transmitter fails, a PT100 can be temporarily connected for emergency use (e.g., using a PT100 to replace oil temperature measurement to assist in fault diagnosis), improving the system's resilience against failures. 4) Precisely adapts to signal characteristics. 4-20mA mode: Parallel resistor (JP1 shorted) reduces total resistance, preventing high current from burning out the circuit; the absence of VREF simplifies the signal chain, allowing the "voltage difference" of the 4-20mA signal to be sampled directly and stably, ensuring acquisition accuracy in high-current scenarios. PT100 mode: Disconnecting the parallel resistor (JP1 disconnected) increases input impedance, adapting to the "high resistance, weak resistance change" of the PT100; connecting VREF to construct a bridge voltage divider amplifies the small resistance change into a measurable voltage difference, solving the problem of weak and difficult-to-acquire PT100 signals. 5) Temperature (PT100) and non-temperature parameters (4-20mA, such as oil level and flow rate) collected by the two modes can be analyzed collaboratively in real time at the system level: If the 4-20mA oil level reading is abnormal (low oil level) and the PT100 temperature reading is abnormal (high temperature) → "cooling system failure" is prioritized (low oil level leads to insufficient cooling and temperature spike); if the 4-20mA flow rate is normal, but the PT100 temperature reading is abnormal → internal winding fault (such as short circuit) is directly identified. Mode switching enables the system to have multi-parameter collaborative diagnostic capabilities, improving fault diagnosis efficiency.

[0104] Additionally, it should be noted that simultaneously setting up independent 4-20mA acquisition circuits and variable acquisition circuits (capable of both 4-20mA and PT100 acquisition modes) in the system offers several advantages:

[0105] I. Functional division of labor and reliability assurance.

[0106] (1) Priority protection of core parameters.

[0107] An independent 4-20mA acquisition circuit can be specifically used to monitor the most core and critical 4-20mA parameters of power transformers (such as main oil flow rate and main winding cooling system flow rate). These parameters are crucial for the safe operation of transformers. The independent circuit can avoid the instability and continuous acquisition of core 4-20mA parameters due to operations such as switching the variable acquisition circuit mode (such as instantaneous fluctuations when switching to PT100 mode) or failure of the variable circuit itself. It is equivalent to providing "double insurance" for critical parameters and improving system reliability.

[0108] The 4-20mA mode of the acquisition circuit can be used as an auxiliary or extension to acquire 4-20mA signals from relatively minor or different locations (such as the flow rate of the backup cooling branch), thus achieving complementary functions.

[0109] (2) Fault isolation.

[0110] If the variable acquisition circuit fails (such as a damaged mode switching circuit), the independent 4-20mA acquisition circuit can still operate normally, ensuring uninterrupted monitoring of the core 4-20mA parameters. Conversely, the variable acquisition circuit can also temporarily take over part of the 4-20mA acquisition task when the independent 4-20mA acquisition circuit fails (if the system allows mode switching), achieving a certain degree of redundancy and reducing the risk of parameter loss in the overall system due to a single type of acquisition circuit failure.

[0111] II. Performance and accuracy requirements.

[0112] (1) High-precision data acquisition requirements.

[0113] For certain 4-20mA signals that require extremely high acquisition accuracy and response speed (such as the high-precision signal from a transformer oil temperature transmitter after special calibration), a dedicated 4-20mA acquisition circuit can be specifically optimized in terms of hardware (e.g., using higher-precision sampling resistors and lower-noise filtering circuits) and software algorithms (dedicated filtering and calibration programs) to meet stringent performance requirements. Variable acquisition circuits, however, adapt to both modes, and may involve some compromises in hardware and software, making it difficult to achieve optimal optimization for any single mode (such as 4-20mA). In such cases, a dedicated circuit can demonstrate its advantages.

[0114] The variable acquisition circuit needs to accommodate both PT100 and PT100 modes. Its circuit parameters (such as resistance and capacitance) in the 4-20mA mode need to balance the requirements of both modes. In contrast, the independent 4-20mA acquisition circuit can be designed entirely around the characteristics of the 4-20mA signal to achieve more accurate and efficient acquisition.

[0115] (2) Multi-channel parallel requirements.

[0116] Power transformers may have multiple 4-20mA sensors with different locations and functions (such as oil level sensors, multiple cooling branch flow sensors, etc.). Independent 4-20mA acquisition circuits can be designed as multi-channel parallel acquisition architectures, efficiently acquiring multiple 4-20mA signals simultaneously, with low interference between channels and flexible control. Although variable acquisition circuits can also perform time-division acquisition, their efficiency and flexibility are inferior to independent multi-channel 4-20mA acquisition circuits in multi-channel, high-concurrency acquisition scenarios.

[0117] III. Ease of design and debugging.

[0118] A standalone 4-20mA acquisition circuit has a single function and clear logic. Its hardware design (such as PCB layout and EMC design) and software debugging (calibration programs and filtering algorithms) are relatively simple and straightforward, allowing engineers to quickly complete development and verification. A variable acquisition circuit, on the other hand, involves switching between two modes, requiring consideration of mode-switching circuit compatibility and parameter adaptation in different modes, thus increasing complexity. When the system has a large number of standard 4-20mA acquisition requirements, using a standalone circuit for the main task and a variable circuit for handling special and complex requirements makes the overall design clearer and debugging easier.

[0119] During later maintenance and upgrades, troubleshooting and functional upgrades (such as optimizing the acquisition algorithm) of the independent 4-20mA acquisition circuit can be carried out independently without affecting the variable acquisition circuit and related functions of PT100 mode, thus reducing maintenance difficulty and risk.

[0120] IV. Cost and Resource Optimization.

[0121] (1) Cost balance.

[0122] From a cost perspective, a standalone 4-20mA acquisition circuit can adopt a relatively mature and low-cost general-purpose solution (due to its single function) to meet a large number of conventional 4-20mA acquisition needs. A variable acquisition circuit is used for special monitoring points with complex requirements (which may connect to both 4-20mA transmitters and PT100 sensors), thus optimizing the overall cost while meeting system functional requirements. Using variable acquisition circuits exclusively would be more expensive due to their complex design, and for many conventional 4-20mA acquisition scenarios, the PT100 mode function of the variable circuit would be redundant, leading to resource waste and increased costs.

[0123] (2) Rational allocation of resources.

[0124] System resources, such as the main chip and processing power, are limited. An independent 4-20mA acquisition circuit can allocate resources selectively (e.g., occupying a fixed ADC channel and processing thread) to ensure the timeliness and stability of core 4-20mA parameter acquisition; a variable acquisition circuit allocates resources on demand (dynamically adjusting when switching between PT100 mode and 4-20mA mode), achieving better utilization of system resources and avoiding the impact of variable circuit resource contention on core parameter acquisition.

[0125] In summary, the combination of an independent 4-20mA acquisition circuit and a variable acquisition circuit can complement each other in terms of reliability, performance, design and debugging, and cost, thereby building a more complete, flexible and efficient power transformer parameter acquisition system to meet the complex and ever-changing industrial application needs.

[0126] For example, a 485 communication circuit includes multiple 485 communication sub-circuits; see [link to relevant documentation]. Figure 4 The 485 communication sub-circuit includes: a first optocoupler T1, a second optocoupler T2, an inverter N1, a 485 transceiver chip U1, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, and a thirteenth resistor R13; the first optocoupler T1 includes a first light-emitting diode and a first phototransistor; the second optocoupler T2 includes a second light-emitting diode and a second phototransistor;

[0127] The collector of the first phototransistor is connected to the first power supply voltage of 3.3VCC through the tenth resistor R10; the emitter of the first phototransistor is grounded.

[0128] The positive terminal of the first LED is connected to the second power supply voltage VCC1, the negative terminal of the first LED is connected to the first end of the eleventh resistor R11, and the second end of the eleventh resistor R11 is connected to the transceiver chip U1 (RO pin layer, i.e., the receiver output terminal).

[0129] The first signal terminal SIN of the 485 communication sub-circuit is connected to the node between the collector of the first phototransistor and the tenth resistor R10.

[0130] The negative terminal of the second LED is connected to the first end of the twelfth resistor R12, and the second end of the twelfth resistor R12 is connected to the second signal terminal SOT of the 485 communication sub-circuit; the positive terminal of the second LED is connected to the first power supply voltage 3.3VCC.

[0131] The collector of the second phototransistor is connected to the first end of the thirteenth resistor R13, the second end of the thirteenth resistor R13 is connected to the second power supply voltage VCC1, and the emitter of the second phototransistor is grounded.

[0132] The collector of the second phototransistor is also connected to the input of inverter N1; the output of inverter N1 is simultaneously connected to the transceiver chip.

[0133] The VCC pin of the transceiver chip U1 is connected to the second power supply voltage VCC1. The B and A pins of the transceiver chip U1 are used as differential signal ports on the 485 bus side and are connected to the external 485 bus (such as 4851B and 4851A).

[0134] The working principle of the 485 circuit in this embodiment can be divided into two core processes: signal isolation and conversion, and transmit / receive enable control, as detailed below:

[0135] (1) Signal isolation and level conversion (signal transmission between the 485 bus and the main chip).

[0136] Reception process (485 bus → main chip): The differential signal (A / B pin) of the external 485 bus is input to the transceiver chip U1, which is converted into a 5V single-ended signal internally. This signal is electrically isolated by the first optocoupler T1 (including the first light-emitting diode and the first phototransistor) (to prevent bus interference from entering the main chip). The output of the first optocoupler T1 is divided by the tenth resistor R10 and converted into a 3.3V signal, which is transmitted to the main chip through the first signal terminal (SIN) to complete the reception.

[0137] Transmission process (main chip → 485 bus): The 3.3V level transmission signal output by the main chip is transmitted to the twelfth resistor R12 of the second optocoupler T2 via the second signal terminal (SOT), driving the second light-emitting diode to emit light; the second phototransistor conducts when exposed to light, converts the signal to a 5V level and transmits it to the driver input terminal DI of the transceiver chip U1; the transceiver chip U1 converts the 5V level signal into a differential signal and outputs it to the external 485 bus through the A / B pin, completing the transmission.

[0138] (2) Transmit and receive enable control (the core function of the inverter).

[0139] Inverter N1 controls the RE (receive enable) and DE (transmit enable) terminals of the transceiver chip, enabling seamless transmission and reception without program control. The collector signal of the second phototransistor (reflecting the transmission state level) is input to inverter N1. Inverter N1 generates RE / DE control signals through level inversion logic (e.g., a high input level results in a low output level, and a low input level results in a high output level). When receiving is required, inverter N1 outputs a low level to the RE terminal and a high level to the DE terminal (or an enable level adapted according to the chip logic), switching transceiver chip U1 to receive mode and allowing bus signals to be transmitted to the main chip. When transmitting is required, inverter N1 outputs a high level to the DE terminal and a low level to the RE terminal, switching transceiver chip to transmit mode and allowing main chip signals to be transmitted to the bus.

[0140] Because the inverter's logic is a fixed hardware circuit characteristic (no need for the main chip program to dynamically adjust the level), switching can be triggered simply by a preset external signal (such as the input state of the second optocoupler), thus achieving automatic transmit / receive switching without program control.

[0141] In summary, the 485 circuit in this embodiment of the present invention achieves level conversion and anti-interference through optocoupler isolation, and controls the transmit and receive enable through the hardware logic of the inverter. This not only ensures the electrical isolation safety between the bus and the main chip, but also simplifies the transmit and receive switching process by replacing program control with fixed hardware logic, thus adapting to the stability and real-time requirements of industrial scenarios.

[0142] It should be noted that the 485 circuit in this embodiment uses an inverter instead of a transistor in a traditional 485 circuit, which is superior to the traditional adaptive 485 circuit in terms of control speed, anti-interference, integration, and compatibility. Although existing RS485 circuits do not require additional control signals for adaptive transmission and reception, the external control design in this embodiment is more suitable for industrial scenarios with stringent requirements for real-time performance and stability (such as high-reliability communication for power transformers), especially in high-frequency signal transmission and strong interference environments. It should be explained that external control refers to the adaptive transmission and reception control relative to the traditional adaptive 485 circuit. The core concept is that the switching of the receive enable terminal (RE) and driver output enable terminal (DE) of the 485 transceiver chip is not automatically triggered by the level characteristics of the transmitted data signal (such as TXD), but is actively controlled through an independent external control signal path. Specifically, in this embodiment, the input signal of the inverter comes from the collector of the second phototransistor (an optocoupler isolation signal associated with the second signal terminal SOT), and this signal, after being processed by the inverter, directly drives the RE / DE terminals of the transceiver chip. This control signal is independent of the main signal chain for transmitting data (such as the data transmitted at the SOT end). It needs to be actively adjusted by external logic (such as the dedicated control signal of the main chip or the preset level), rather than switching the RE / DE state by automatically linking the high and low levels of the TXD port to the transistor to turn on / off, as is the case with existing technologies.

[0143] For example, an input circuit may include multiple input sub-circuits; multiple input sub-circuits may share a common cathode; see also Figure 5 The input sub-circuit includes: a third optocoupler T3, a first diode D1, a fourteenth resistor R14, a fifteenth resistor R15, a sixteenth resistor R16, a seventeenth resistor R17, and a seventh capacitor C7; the third optocoupler T3 includes a third phototransistor and a third light-emitting diode;

[0144] The first terminal of the fourteenth resistor R14 and the first terminal of the seventh capacitor C7 are both connected to the collector of the third phototransistor. The second terminal of the seventh capacitor C7 and the emitter of the third phototransistor are both grounded. The second terminal of the fourteenth resistor R14 is connected to the power supply voltage VCC, and the first terminal of the fourteenth resistor R14 is also connected to the main chip.

[0145] The positive terminal of the third LED, the first terminal of the fifteenth resistor R15, and the first terminal of the first diode D1 are all connected to the first terminal of the sixteenth resistor R16. The second terminal of the sixteenth resistor R16 is connected to the switch input point K9 of the input circuit.

[0146] The negative terminal of the third LED, the second terminal of the fifteenth resistor R15, and the second terminal of the first diode D1 are all connected to the first terminal of the seventeenth resistor R17. The second terminal of the seventeenth resistor R17 is connected to the common negative terminal COM.

[0147] Specifically, an input circuit (also known as a digital input acquisition circuit) is a circuit used to convert the states of external switches (such as relay contacts or the on / off state of manual switches) into electrical signals that can be recognized by electronic devices (i.e., the main chip). In this device, it specifically refers to the circuit that acquires 24V DC digital input signals. Through a common cathode design of multiple input sub-circuits (sharing a common negative terminal COM), it achieves status monitoring of multiple external digital inputs (such as external acquisition points like K9), providing basic signals for the control and protection of the equipment.

[0148] The working principle of the input sub-circuit can be divided into two stages: external signal triggering and signal conversion and transmission. External signal triggering (24V DC signal input): (1) When the external 24V DC signal is input from the switch input point K9, the current path is: acquisition point K9 → sixteenth resistor R16 (current limiting, protecting subsequent components) → positive terminal of the third LED (input terminal of the third optocoupler) → negative terminal of the third LED → seventeenth resistor R17 (current limiting, stabilizing the loop current) → common negative terminal COM, forming a complete loop. At this time, the third LED emits light because there is current passing through it. (2) Signal conversion and transmission (optocoupler isolation and level conversion): After the third LED emits light, the output terminal of the third optocoupler (third phototransistor) is turned on by light, forming a collector-emitter path. The collector of the third phototransistor is connected to the power supply voltage VCC (default high potential) through the fourteenth resistor R14. After it is turned on, the collector potential is pulled down (i.e., point KR9 becomes low potential). The seventh capacitor C7 acts as a filter capacitor to filter out high-frequency interference and ensure the stability of the potential signal. After the main chip detects a low potential at point KR9, it determines that the external switch K9 is in the ON state. If the external 24V signal is disconnected (no input to K9), the third LED does not emit light, the phototransistor is cut off, and point KR9 remains at a high potential due to the pull-down resistor R14. The main chip recognizes this as an OFF state, thus completing the acquisition and transmission of the switch signal. Furthermore, the fifteenth resistor R15 (which functions as a voltage divider / current limiter) and the first diode D1 (which functions as reverse protection) further stabilize the circuit, preventing damage to the optocoupler from reverse voltage or overcurrent.

[0149] Compared with the single input circuit in the prior art, the input sub-circuit in this embodiment of the utility model has the following advantages: 1) The single-channel circuit contains only a few basic components. Compared with the complex design of operational amplifier + dual optocouplers + multi-level protection in traditional input circuits, the number of components is reduced by more than half, significantly reducing hardware costs and PCB layout area. It is especially suitable for multi-channel acquisition scenarios and has obvious advantages in mass production. 2) The common cathode design reduces wiring complexity (no need to set a negative terminal for each channel separately), making it suitable for scenarios that require simultaneous monitoring of multiple switching quantities. 3) There is no self-testing operational amplifier circuit and complex logic judgment. The signal transmission path is short (only optocoupler isolation + level conversion). The delay (μs level) from external signal input to main chip recognition is much lower than that of the prior art (requiring operational amplifier processing and fault judgment, ms level), making it suitable for switching quantity acquisition with high real-time requirements.

[0150] For example, an output circuit may include multiple output sub-circuits; see [link to documentation]. Figure 6 The output sub-circuit includes: the eighteenth resistor R18, the fourth optocoupler T4 (e.g., the TLP187 model optocoupler), the second diode D2, and the relay BY; the fourth optocoupler T4 includes at least the fourth light-emitting diode and the fourth phototransistor;

[0151] The positive terminal of the fourth LED is connected to the first end of the eighteenth resistor R18, and the second end of the eighteenth resistor R18 is connected to the third power supply voltage VCC; the negative terminal of the fourth LED is connected to the signal terminal OUT5 of the output circuit; the main chip can control the circuit where the LED is located by controlling the level state of OUT5 (such as outputting a low level), thereby controlling the working state of the optocoupler.

[0152] The collector of the fourth phototransistor is connected to the fourth power supply voltage 24V. The negative terminal of the second diode D2 and the positive terminal 02 of the relay BY coil are both connected to the emitter of the fourth phototransistor. The negative terminal 01 of the relay BY coil is connected to the positive terminal of the second diode D2. The moving contact 03 of the relay BY is connected to the first output terminal BY11 of the output sub-circuit, and the normally closed contact 04 of the relay BY is connected to the second output terminal BY12 of the output sub-circuit.

[0153] The following explains the working principle of the open sub-circuit by combining the two states of the relay being engaged and disengaged:

[0154] 1. The relay is not engaged (initial state).

[0155] The main chip does not control OUT5, optocoupler T4 is not conducting, 24V+ cannot be transmitted to the relay coil, and there is no current in the coil. At this time, moving contact 03 is connected to normally closed contact 04, and the external circuit maintains the default path via BY12.

[0156] 2. Relay is engaged (trigger state).

[0157] The main chip controls the output signal of OUT5, which turns on the optocoupler T4. The 24V+ voltage is transmitted through the optocoupler to the positive terminal 02 of the coil, and then through the coil, the negative terminal 01 of the coil, and the diode D2 to form a circuit. The coil is energized and generates electromagnetic force. The electromagnetic force causes the moving contact 03 to disconnect from the normally closed contact 04 and connect to the normally open contact. The external circuit is connected to the trigger path via BY11 to realize the switching output.

[0158] Compared to traditional single-output circuits, the output sub-circuit in this embodiment contains only four basic components (optocoupler, resistor, and diode). Compared to the traditional IGBT + relay + multi-stage drive circuit in output circuits, the number of components is reduced by more than 80%, significantly reducing hardware costs and PCB layout area, making it particularly suitable for multi-output scenarios. 2) The absence of complex timing control (e.g., coordination of IGBT and relay operation) and precision components (e.g., isolation transformer, RC network) reduces the risk of inter-module compatibility failures and precision component failures; the isolation characteristics of the opto-MOS type optocoupler and the protection design of the freewheeling diode further enhance the circuit's anti-interference capability.

[0159] For example, the power supply circuit integrates at least an AC-DC converter, a first low-dropout linear regulator (e.g., AMS1117), a second low-dropout linear regulator, and a DC-DC converter; wherein the input terminal of the AC-DC converter is connected to an external power supply; the input terminals of the first low-dropout linear regulator and the DC-DC converter are both connected to the output terminal of the AC-DC converter; and the output terminal of the first low-dropout linear regulator is connected to the main chip.

[0160] The first voltage output terminal of the DC-DC converter (e.g., outputting 24V voltage) is connected to the output circuit to supply power to the high-voltage side of the relays and each optocoupler;

[0161] The second voltage output terminal (e.g., outputting 5V voltage) of the DC-DC converter is connected to the input terminal of the second low-dropout linear regulator (e.g., AMS1117); the third voltage output terminal of the second low-dropout linear regulator is connected to the 485 transceiver chip.

[0162] Understandably, the voltage output terminal of the first low-dropout linear regulator (e.g., outputting 3.3V voltage) is also connected to the corresponding circuit in the monitoring device of the power transformer, and the voltage output terminal of the second low-dropout linear regulator is also connected to the corresponding circuit in the monitoring device of the power transformer. These power supply relationships are conventional power supply relationships and can be referred to relevant technologies, which will not be elaborated here.

[0163] For example, the main chip integrates at least an Ethernet MAC; see [link / reference]. Figure 7The Ethernet circuit includes an Ethernet PHY chip and an RJ45 interface; the RJ45 interface has a built-in network transformer; the Ethernet MAC is connected to the Ethernet PHY chip for communication, and the Ethernet PHY chip is coupled to the network transformer.

[0164] Specifically, the MAC layer is a sublayer of the data link layer in the Ethernet protocol stack. The division of labor between the MAC layer and the PHY layer is as follows: the MAC layer is responsible for processing logical data frames (such as Ethernet frame format and address identification); the PHY layer (physical layer chip) is responsible for processing electrical signal transmission (such as differential signal conversion and cable driving).

[0165] Advantages of MAC integrated into the main chip: 1) Hardware integration: Modern MCUs (such as STM32 and ARM Cortex series) integrate the MAC module inside the chip, eliminating the need for an external MAC chip (such as DM9000), reducing PCB area and cost. 2) Protocol processing efficiency: The chip's CPU can directly access the MAC through the internal bus, accelerating the transmission and reception of data frames.

[0166] For example, the main chip also integrates multiple ADCs (analog-to-digital converters). Each ADC is used to connect to a corresponding 4-20mA acquisition circuit or multiple variable acquisition circuits. Since the ADC is a conventional circuit, the circuit structure and corresponding circuit connection relationship will not be described in detail here.

[0167] For example, the main chip also integrates an SPI controller; the storage circuit includes at least a non-volatile memory chip (e.g., model: W25Q64 (8MB SPI Flash)); the SPI controller is connected to the non-volatile memory chip.

[0168] For example, see Figure 8 The timing circuit includes at least an RTC chip (e.g., PCF8563), a backup battery (e.g., CR1220 battery), a crystal oscillator, and a third diode; the crystal oscillator (e.g., 32.768kHz) and the main chip are both connected to the RTC chip; the backup battery is connected to the RTC chip through the third diode.

[0169] Although the present invention has been described herein in conjunction with various embodiments, those skilled in the art will understand and implement other variations of the disclosed embodiments by reviewing the accompanying drawings, the disclosure, and the appended claims in carrying out the claimed invention. In the claims, the word "comprising" does not exclude other components or steps, and "a" or "an" does not exclude a plurality. A single processor or other unit can implement several functions listed in the claims. While different dependent claims may recite certain measures, this does not mean that these measures cannot be combined to produce good results.

[0170] Although the present invention has been described in conjunction with specific features and embodiments, it is obvious that various modifications and combinations can be made therein without departing from the spirit and scope of the present invention. Accordingly, this specification and drawings are merely exemplary descriptions of the present invention as defined by the appended claims, and are considered to cover any and all modifications, variations, combinations, or equivalents within the scope of the present invention. Clearly, those skilled in the art can make various alterations and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if such modifications and modifications of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention also intends to include such modifications and modifications.

Claims

1. A monitoring device for a power transformer, characterized in that, It includes a base plate and a top plate, and the base plate and the top plate are connected by connectors; The base plate integrates at least a DC acquisition circuit, an input circuit, an output circuit, and a power supply circuit; the top plate integrates at least a main chip, a 485 communication circuit, a timing circuit, a storage circuit, and an Ethernet circuit. The DC acquisition circuit, the input circuit, the output circuit, and the top plate are all connected to the power supply circuit; The 485 communication circuit, the timing circuit, the storage circuit, and the Ethernet circuit are all connected to the main chip; The output terminal of the DC acquisition circuit and the signal output terminal of the input circuit are both connected to the signal input terminal of the main chip; the signal output terminal of the main chip is connected to the signal input terminal of the output circuit. The DC acquisition circuit includes multiple 4-20mA acquisition circuits and multiple variable acquisition circuits; each of the 4-20mA acquisition circuits is connected to the main chip; each of the variable acquisition circuits is connected to the main chip.

2. The monitoring device for power transformers according to claim 1, characterized in that, The 4-20mA acquisition circuit includes: a first resistor, a second resistor, a third resistor, a first capacitor, a second capacitor, and a third capacitor; Wherein, the first end of the first resistor and the first end of the second resistor are both connected to the positive input terminal of the 4-20mA acquisition circuit; The second end of the first resistor and the first end of the third resistor are both connected to the negative input terminal of the 4-20mA acquisition circuit; The first terminal of the first capacitor and the first terminal of the second capacitor are both connected to the second terminal of the second resistor; The first terminal of the third capacitor and the second terminal of the second capacitor are both connected to the second terminal of the third resistor; The second terminal of the first capacitor is connected to the second terminal of the third capacitor.

3. The monitoring device for power transformers according to claim 1, characterized in that, The variable acquisition circuit includes: a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a first jumper, a second jumper, a third jumper, a fourth capacitor, a fifth capacitor, and a sixth capacitor; Wherein, the first end of the fourth resistor and the first end of the first jumper are both connected to the negative input terminal of the variable acquisition circuit; The second end of the fourth resistor and the first end of the fifth resistor are both connected to the second end of the first jumper. The first end of the sixth resistor, the first end of the seventh resistor, and the first end of the eighth resistor are all connected to the positive input terminal of the variable acquisition circuit; The second end of the sixth resistor and the second end of the fifth resistor are both connected to the first end of the second jumper; the second end of the second jumper is connected to a reference voltage. The second end of the seventh resistor is connected to the first end of the third jumper, and the second end of the third jumper and the first end of the ninth resistor are both connected to the second end of the first jumper. The first terminal of the fourth capacitor, the first terminal of the fifth capacitor, and the positive output terminal of the variable acquisition circuit are all connected to the second terminal of the eighth resistor; the second terminal of the fourth capacitor is connected to the first terminal of the sixth capacitor. The second terminal of the fifth capacitor, the second terminal of the sixth capacitor, and the negative output terminal of the variable acquisition circuit are all connected to the second terminal of the ninth resistor.

4. The monitoring device for power transformers according to claim 1, characterized in that, The 485 communication circuit includes multiple 485 communication sub-circuits; The 485 communication sub-circuit includes: a first optocoupler, a second optocoupler, an inverter, a 485 transceiver chip, a tenth resistor, an eleventh resistor, a twelfth resistor, and a thirteenth resistor; the first optocoupler includes a first light-emitting diode and a first phototransistor; the second optocoupler includes a second light-emitting diode and a second phototransistor; The collector of the first phototransistor is connected to the first power supply voltage through the tenth resistor; the emitter of the first phototransistor is grounded. The positive terminal of the first light-emitting diode is connected to the second power supply voltage, the negative terminal of the first light-emitting diode is connected to the first end of the eleventh resistor, and the second end of the eleventh resistor is connected to the 485 transceiver chip. The first signal terminal of the 485 communication sub-circuit is connected to the node between the collector of the first phototransistor and the tenth resistor. The negative terminal of the second light-emitting diode is connected to the first end of the twelfth resistor, and the second end of the twelfth resistor is connected to the second signal terminal of the 485 communication sub-circuit; the positive terminal of the second light-emitting diode is connected to the first power supply voltage. The collector of the second phototransistor is connected to the first end of the thirteenth resistor, the second end of the thirteenth resistor is connected to the second power supply voltage, and the emitter of the second phototransistor is grounded. The collector of the second phototransistor is also connected to the input of the inverter; the output of the inverter is simultaneously connected to the 485 transceiver chip.

5. The monitoring device for power transformers according to claim 1, characterized in that, The input circuit includes multiple input sub-circuits; Multiple input sub-circuits share a common cathode; The input sub-circuit includes: a third optocoupler, a first diode, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, and a seventh capacitor; The third optocoupler includes a third phototransistor and a third light-emitting diode; The first end of the fourteenth resistor and the first end of the seventh capacitor are both connected to the collector of the third phototransistor, and the second end of the seventh capacitor and the emitter of the third phototransistor are both grounded; the second end of the fourteenth resistor is connected to the power supply voltage, and the first end of the fourteenth resistor is also connected to the main chip. The positive terminal of the third light-emitting diode, the first terminal of the fifteenth resistor, and the first terminal of the first diode are all connected to the first terminal of the sixteenth resistor, and the second terminal of the sixteenth resistor is connected to the switch input point of the input circuit. The negative terminal of the third light-emitting diode, the second terminal of the fifteenth resistor, and the second terminal of the first diode are all connected to the first terminal of the seventeenth resistor, and the second terminal of the seventeenth resistor is connected to the common negative terminal.

6. The monitoring device for power transformers according to claim 1, characterized in that, The output circuit includes multiple output sub-circuits; The output sub-circuit includes: an eighteenth resistor, a fourth optocoupler, a second diode, and a relay; the fourth optocoupler includes at least a fourth light-emitting diode and a fourth phototransistor. The positive terminal of the fourth LED is connected to the first end of the eighteenth resistor, and the second end of the eighteenth resistor is connected to the third power supply voltage; the negative terminal of the fourth LED is connected to the signal terminal of the output circuit. The collector of the fourth phototransistor is connected to the fourth power supply voltage. The negative terminal of the second diode and the first terminal of the relay coil are both connected to the emitter of the fourth phototransistor. The second terminal of the relay coil is connected to the positive terminal of the second diode.

7. The monitoring device for a power transformer according to claim 4, characterized in that, The power supply circuit integrates at least an AC-DC converter, a first low-dropout linear regulator, a second low-dropout linear regulator, and a DC-DC converter. The input terminal of the AC-DC converter is connected to an external power supply; the input terminals of the first low-dropout linear regulator and the DC-DC converter are both connected to the output terminal of the AC-DC converter; the output terminal of the first low-dropout linear regulator is connected to the main chip. The first voltage output terminal of the DC-DC converter is connected to the output circuit; The second voltage output terminal of the DC-DC converter is connected to the input terminal of the second low-dropout linear regulator; the third voltage output terminal of the second low-dropout linear regulator is connected to the 485 transceiver chip.

8. The monitoring device for a power transformer according to claim 7, characterized in that, The main chip integrates at least an Ethernet MAC; The Ethernet circuit includes an Ethernet PHY chip and an RJ45 interface; the RJ45 interface has a built-in network transformer; the Ethernet MAC is communicatively connected to the Ethernet PHY chip, and the Ethernet PHY chip is coupled to the network transformer.

9. The monitoring device for a power transformer according to claim 8, characterized in that, The main chip also integrates an SPI controller; The storage circuit includes at least a non-volatile memory chip; the SPI controller is connected to the non-volatile memory chip.

10. The monitoring device for a power transformer according to claim 9, characterized in that, The timing circuit includes at least an RTC chip, a backup battery, a crystal oscillator, and a third diode; The crystal oscillator and the main chip are both connected to the RTC chip; The backup battery is connected to the RTC chip via the third diode.

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