A multiplexer and communication device

Abstract

The embodiment of the present application discloses a kind of multiplexer and communication equipment, the multiplexer includes a transmitting port, at least one receiving port, at least one antenna port, filter set and switch.The fixed end of switch is connected with the first TDD filter in filter set, the first free end of switch is connected with the output end of the second TDD filter in filter set, and the second free end of switch is connected with one of receiving port;Transmitting port is connected with the input end of FDD transmitting filter in filter set and the input end of second TDD filter, and the output end of FDD receiving filter in filter set is connected with one of receiving port;The output end of FDD transmitting filter, the input end of FDD receiving filter and the first TDD filter are respectively connected with one of antenna port.Using the embodiment of the present application can improve port multiplexing rate and reduce circuit area under the premise of ensuring the reliable work of FDD and TDD.

Description

Technical Field

[0001] This application relates to the field of communication technology, and more particularly to a multiplexer and a communication device. Background Technology

[0002] Full-duplex technology is divided into Time Division Duplexing (TDD) and Frequency Division Duplexing (FDD). In devices that simultaneously support TDD and FDD, FDD and TDD systems are prone to mutual interference, especially in the TDD receive time slot. Because the FDD transmit (TX) channel operates continuously, the nonlinear spurious signals generated by the FDD transmit signal can easily interfere with the TDD receive frequency band, thus affecting the normal operation of the TDD receiver (RX). Therefore, to avoid the impact of FDD transmission on TDD reception, multiple filters within a multiplexer are often needed to suppress signals in the corresponding frequency band. Furthermore, the multiplexer needs to provide different transmit ports for the FDD and TDD systems to improve the isolation between TDD and FDD, ensuring that FDD transmit spurious signals do not leak into the TDD receive path and affect the TDD received signal in the TDD receive time slot.

[0003] However, setting up two different transmit ports for TDD and FDD systems can easily lead to too many circuit interfaces, increased circuit wiring, and larger circuit area, thereby increasing the manufacturing cost of the equipment.

[0004] Therefore, how to improve the multiplexing rate of the transmit port and reduce the circuit area while ensuring the reliable operation of FDD and TDD is an urgent problem to be solved. Summary of the Invention

[0005] This application provides a multiplexer and communication device that can improve the multiplexing rate of the transmit port and reduce the circuit area while ensuring the reliable operation of FDD and TDD.

[0006] In a first aspect, embodiments of this application provide a multiplexer, which includes a transmit port, at least one receive port, at least one antenna port, a filter bank, and a switch; the filter bank includes a frequency division duplex (FDD) transmit filter, an FDD receive filter, a first time division duplex (TDD) filter, and a second TDD filter; wherein, the fixed terminal of the switch is connected to the first TDD filter, the first free terminal of the switch is connected to the output terminal of the second TDD filter, and the second free terminal of the switch is connected to one of the at least one receive port; the transmit port is connected to the input terminals of the FDD transmit filter and the second TDD filter, and the output terminal of the FDD receive filter is connected to one of the at least one receive port; the output terminal of the FDD transmit filter, the input terminal of the FDD receive filter, and the first TDD filter are respectively connected to one of the at least one antenna port.

[0007] In this embodiment, the conventional multiplexer structure is improved. The multiplexer in this embodiment has only one transmit port, allowing the transmit paths of TDD and FDD systems to share a single transmit port. Furthermore, the multiplexer in this embodiment adds a switch between the TDD transmit path and the TDD receive path. This switch may include a fixed terminal and two free terminals (e.g., a first free terminal and a second free terminal), which can be located in the TDD transmit path and the TDD receive path, respectively. By switching the fixed terminal of the switch between the first and second free terminals, the switching between TDD transmit and receive can be achieved. Based on the above multiplexer architecture, when TDD is in the transmit time slot, the second free terminal of the switch is connected to the fixed terminal. At this time, due to the physical isolation between the first and second free terminals, a series of nonlinear spurious signals generated by the FDD transmit signal at the transmit port cannot leak into the TDD receive path, avoiding the influence of FDD transmit on TDD receive. Meanwhile, considering the high switching frequency of the switch in practical applications—that is, the fixed end rapidly switching between the first and second free ends—there is a certain possibility that FDD spurious signals may leak into the TDD receiving path via the first and second free ends. Therefore, in this embodiment, the multiplexer is equipped with an additional TDD filter (e.g., a second TDD filter) between the first free end and the transmit port to suppress signals outside the TDD band and prevent FDD transmit signals generated at the transmit port from entering the TDD transmit path. Thus, compared to existing technologies where TDD and FDD cannot share a transmit port, resulting in too many interfaces, complex circuitry, and large circuit area, this embodiment, through improvements to the multiplexer structure, allows both FDD and TDD systems to share a single transmit port while ensuring reliable operation. This improves the transmit port reuse rate, reduces circuit wiring and area, further lowers manufacturing costs, and meets user needs.

[0008] In one possible implementation, when the first free end of the switch is connected to the fixed end: the second TDD filter is used to receive the TDD transmission signal output from the transmit port, and to suppress signals outside the TDD transmission frequency band, and outputs the TDD transmission signal to the first TDD filter; the first TDD filter is used to suppress signals outside the TDD transmission frequency band, and outputs the TDD transmission signal to the antenna port; the frequency band of the TDD transmission signal is within the TDD transmission frequency band; when the second free end of the switch is connected to the fixed end: the first TDD filter is used to receive the TDD reception signal input from the antenna port, and to suppress signals outside the TDD reception frequency band, and outputs the TDD reception signal to the reception port; the frequency band of the TDD reception signal is within the TDD reception frequency band.

[0009] In this embodiment, switching between TDD transmission and reception can be achieved by switching the fixed terminal of the switch between the first free terminal and the second free terminal. When the first free terminal is connected to the fixed terminal, the TDD system is in the transmission time slot. At this time, the second TDD filter can receive the TDD transmission signal output from the transmission port, suppress signals outside the TDD transmission frequency band, and output the TDD transmission signal to the first TDD filter via the first free terminal and the fixed terminal. Subsequently, the first TDD filter suppresses signals outside the TDD transmission frequency band and finally outputs the signal to the corresponding antenna port for transmission. When the second free terminal of the switch is connected to the fixed terminal, the TDD system is in the reception time slot. At this time, the first TDD filter receives the TDD reception signal input from the antenna port, suppresses signals outside the TDD reception frequency band, and outputs the TDD reception signal to the corresponding reception port via the fixed terminal and the second free terminal. Thus, this embodiment, through improvements to the multiplexer architecture, ensures reliable operation of TDD transmission and reception when FDD and TDD systems share a single transmission port, meeting user requirements.

[0010] In one possible implementation, the second TDD filter is specifically used to suppress signals in the first frequency band and output the TDD transmission signal to the first TDD filter; the first TDD filter is specifically used to suppress signals in the second and third frequency bands and output the TDD transmission signal to the antenna port; the first frequency band, the second frequency band, and the third frequency band are all outside the TDD transmission frequency band.

[0011] In this embodiment, both the first TDD filter and the second TDD filter in the multiplexer can suppress signals outside the TDD transmission frequency band, and the frequency bands they suppress can be different. Thus, this embodiment can suppress multiple interference signals outside the TDD transmission frequency band using multiple TDD filters, thereby ensuring the suppression effect on interference signals, ensuring the normal operation of TDD transmission, and reducing the implementation difficulty of a single filter.

[0012] In one possible implementation, the filter bank further includes a third TDD filter; the input of the third TDD filter is connected to the second free terminal of the switch, and the output of the third TDD filter is connected to one of the at least one receiving ports.

[0013] The first TDD filter is specifically used to suppress signals in the second and third frequency bands and output the TDD received signal to the third TDD filter; the third TDD filter is used to suppress signals in the fourth frequency band and output the TDD received signal to the receiving port; the second, third, and fourth frequency bands are all outside the TDD receiving frequency band.

[0014] In this embodiment, in addition to the first TDD filter, an additional TDD filter (e.g., a third TDD filter) can be added to the TDD receiving path. The input terminal of the third TDD filter is connected to the second free terminal of the switch, and the output terminal is connected to the corresponding receiving port. Both the first and third TDD filters can suppress signals outside the TDD receiving frequency band, and the frequency bands they suppress can be different. Thus, this embodiment can suppress multiple interference signals outside the TDD receiving frequency band using multiple TDD filters, thereby ensuring the suppression effect on interference signals, ensuring the normal operation of TDD reception, and reducing the implementation difficulty of a single filter.

[0015] In some possible embodiments, the second and third TDD filters described above can be bandpass filters or bandstop filters. A bandpass filter is a filter that allows most frequency components within a certain range to pass through, but attenuates most other frequency components to a very low level; this is the opposite of the concept of a bandstop filter. A bandstop filter is a filter that allows most frequency components to pass through, but attenuates most other frequency components within a certain range to a very low level; this is the opposite of the concept of a bandpass filter.

[0016] In one possible implementation, the number of the at least one receiving port is one, and the receiving port is connected to the output of the FDD receiving filter and the second free end of the switch, respectively.

[0017] The receiving port is used to receive the FDD received signal output by the FDD receiving filter; when the second free terminal of the switch is connected to the fixed terminal, the receiving port is also used to receive the TDD received signal output by the first TDD filter.

[0018] In this embodiment, the multiplexer may include only one receiving port, which can be connected to the second free terminal of both the FDD receiving filter and the switch. This receiving port can be used to receive the FDD received signal output from the FDD filter and the TDD received signal output from the first TDD filter. Thus, this embodiment, while achieving shared transmitting ports, further improves the multiplexer structure by refining the multiplexer structure, ensuring reliable operation of both FDD and TDD while achieving shared receiving ports for both TDD and FDD, thereby increasing the multiplexing rate of the receiving ports and further reducing circuit wiring and circuit area.

[0019] In one possible implementation, the number of the at least one receiving port is one, and the receiving port is connected to the output of the FDD receiving filter and the output of the third TDD filter, respectively.

[0020] The receiving port is used to receive the FDD received signal output by the FDD receiving filter; when the second free terminal of the switch is connected to the fixed terminal, the receiving port is also used to receive the TDD received signal output by the third TDD filter.

[0021] In this embodiment, the multiplexer may include only one receiving port, which can be connected to both the FDD receiving filter and the third TDD filter. This receiving port can be used to receive the FDD received signal output from the FDD filter and the TDD received signal output from the third TDD filter. Thus, this embodiment, while achieving shared transmitting ports, further improves the multiplexer structure by refining the multiplexer structure, ensuring reliable operation of both FDD and TDD while achieving shared receiving ports for TDD and FDD, thereby increasing the multiplexing rate of the receiving ports and further reducing circuit wiring and circuit area.

[0022] In one possible implementation, the at least one receiving port includes an FDD receiving port and a TDD receiving port, the FDD receiving port being connected to the output of the FDD receiving filter, and the TDD receiving port being connected to the second free end of the switch.

[0023] The FDD receiving port is used to receive the FDD receiving signal output by the FDD receiving filter; when the second free terminal of the switch is connected to the fixed terminal, the TDD receiving port is used to receive the TDD receiving signal output by the first TDD filter.

[0024] In this embodiment, the multiplexer may include two receiving ports: an FDD receiving port connected to an FDD receiving filter, and a TDD receiving port connected to a second free end. The FDD receiving port is used to receive the FDD received signal output from the FDD filter, and the TDD receiving port is used to receive the TDD received signal output from the first TDD filter. Thus, this embodiment increases the isolation between TDD transmission and FDD reception by setting two independent receiving ports, avoiding interference between the TDD transmitted signal and the FDD received signal.

[0025] In one possible implementation, the at least one receiving port includes an FDD receiving port and a TDD receiving port, the FDD receiving port being connected to the output of the FDD receiving filter, and the TDD receiving port being connected to the output of the third TDD filter.

[0026] The FDD receiving port is used to receive the FDD receiving signal output by the FDD receiving filter; when the second free terminal of the switch is connected to the fixed terminal, the TDD receiving port is used to receive the TDD receiving signal output by the third TDD filter.

[0027] In this embodiment, the multiplexer may include two receiving ports: an FDD receiving port connected to an FDD receiving filter, and a TDD receiving port connected to a third TDD filter. The FDD receiving port receives the FDD received signal output from the FDD filter, and the TDD receiving port receives the TDD received signal output from the third TDD filter. Thus, this embodiment increases the isolation between TDD transmission and FDD reception by providing two independent receiving ports, preventing interference between the TDD transmitted signal and the FDD received signal.

[0028] In one possible implementation, the number of at least one antenna port is one, and the antenna port is connected to the output of the FDD transmit filter, the input of the FDD receive filter, and the first TDD filter, respectively.

[0029] In this embodiment, the multiplexer may include an antenna port, which can be connected to an FDD transmit filter, an FDD receive filter, and a first TDD filter, respectively, to transmit corresponding FDD transmit signals and TDD transmit signals, and to receive FDD receive signals and TDD receive signals. Thus, this embodiment, in addition to achieving shared transmit ports, further achieves shared TDD and FDD antenna ports, improving the antenna port multiplexing rate and further reducing circuit wiring and circuit area.

[0030] In one possible implementation, the at least one antenna port includes a first antenna port and a second antenna port; the first antenna port is connected to the output of the FDD transmit filter and the input of the FDD receive filter, and the second antenna port is connected to the first TDD filter.

[0031] In this embodiment, the multiplexer may include two antenna ports: a first antenna port and a second antenna port. The first antenna port can be connected to an FDD transmit filter and an FDD receive filter for transmitting and receiving FDD transmit and receive signals. The second antenna port is connected to a first TDD filter for transmitting and receiving TDD transmit and receive signals. Thus, this embodiment increases the isolation between TDD and FDD by using two independent antenna ports, ensuring normal transmission and reception of both TDD and FDD signals, while simultaneously reducing the suppression level and implementation complexity of the filters.

[0032] In one possible implementation, the at least one antenna port includes a first antenna port and a second antenna port; the first antenna port is connected to the output of the FDD transmit filter and the first TDD filter, and the second antenna port is connected to the input of the FDD receive filter.

[0033] In this embodiment, the multiplexer may include two antenna ports: a first antenna port and a second antenna port. The first antenna port can be connected to an FDD transmit filter and a first TDD filter for transmitting FDD transmit signals, TDD transmit signals, and receiving TDD receive signals. The second antenna port is connected to an FDD receive filter for receiving FDD receive signals. Thus, this embodiment increases the isolation between TDD and FDD by using two independent antenna ports, ensuring normal transmission and reception of both TDD and FDD signals, while simultaneously reducing the suppression level and implementation complexity of the filters.

[0034] In one possible implementation, the at least one antenna port includes a first antenna port and a second antenna port; the first antenna port is connected to the output of the FDD transmit filter, and the second antenna port is connected to the input of the FDD receive filter and the first TDD filter.

[0035] In this embodiment, the multiplexer may include two antenna ports: a first antenna port and a second antenna port. The first antenna port can be connected to an FDD transmit filter for transmitting FDD signals. The second antenna port is connected to an FDD receive filter and a first TDD filter for receiving FDD receive signals, TDD receive signals, and transmitting TDD transmit signals. Thus, this embodiment increases the isolation between TDD and FDD by using two independent antenna ports, ensuring normal transmission and reception of both TDD and FDD signals, while simultaneously reducing the suppression level and implementation complexity of the filters.

[0036] In one possible implementation, the FDD transmit filter is used to receive the FDD transmit signal output from the transmit port, and to suppress signals outside the FDD transmit frequency band, and output the FDD transmit signal to the antenna port; the frequency band of the FDD transmit signal is within the FDD transmit frequency band; the FDD receive filter is used to receive the FDD receive signal input from the antenna port, and to suppress signals outside the FDD receive frequency band, and output the FDD receive signal to the receive port; the frequency band of the FDD receive signal is within the FDD receive frequency band.

[0037] In this embodiment, regardless of how the switches in the multiplexer are selected to be on, the FDD system can always transmit and receive normally. Thus, this embodiment, through improvements to the multiplexer architecture, allows both FDD and TDD systems to share a single transmit port while ensuring reliable operation. Furthermore, it can also enable FDD and TDD systems to share a single transmit port, or even a single antenna port, significantly reducing circuit wiring and circuit area, lowering manufacturing costs, and meeting user needs.

[0038] Secondly, embodiments of this application provide a communication device, the communication device including a transmitting circuit, a receiving circuit, an antenna system, and a multiplexer as described in any one of the first aspects above; the transmitting circuit is connected to a transmitting port in the multiplexer, the receiving circuit is connected to at least one receiving port in the multiplexer, and the antenna system is connected to at least one antenna port in the multiplexer.

[0039] In one possible implementation, the antenna system includes an antenna, and the number of the at least one antenna port is one; the antenna is connected to the antenna port.

[0040] In one possible implementation, the antenna system includes a first antenna and a second antenna, and the at least one antenna port includes a first antenna port and a second antenna port; the first antenna is connected to the first antenna port, and the second antenna is connected to the second antenna port.

[0041] It should be understood that the communication device provided in the second aspect of this application is consistent with the technical solution of the first aspect of this application. Its specific content and beneficial effects can be found in the multiplexer provided in the first aspect above, and will not be repeated here. This communication device can be a base station with the above-described structure and functions, or it can be a terminal device, such as a smart wearable device, smartphone, tablet computer, laptop computer, etc. Alternatively, the communication device can be a part of a base station or a terminal device. For example, it can be a part composed of a transceiver and an antenna in a base station or terminal device, etc. The embodiments of this application do not specifically limit this aspect.

[0042] Thirdly, embodiments of this application provide a communication method applied to a communication device. The communication device includes a multiplexer, which includes a transmit port, at least one receive port, at least one antenna port, a filter bank, and a switch. The filter bank includes a frequency division duplex (FDD) transmit filter, an FDD receive filter, a first time division duplex (TDD) filter, and a second TDD filter. The fixed terminal of the switch is connected to the first TDD filter, the first free terminal of the switch is connected to the output terminal of the second TDD filter, and the second free terminal of the switch is connected to one of the at least one receive port. The transmit port is connected to the input terminals of the FDD transmit filter and the second TDD filter, and the output terminal of the FDD receive filter is connected to one of the at least one receive port. The output terminal of the FDD transmit filter, the input terminal of the FDD receive filter, and the first TDD filter are respectively connected to one of the at least one antenna port.

[0043] Controlling the first free end of the switch to be connected to the fixed end:

[0044] The second TDD filter receives the TDD transmission signal output from the transmission port, suppresses signals outside the TDD transmission band, and outputs the TDD transmission signal to the first TDD filter.

[0045] The first TDD filter suppresses signals outside the TDD transmission frequency band and outputs the TDD transmission signal to the antenna port; the frequency band of the TDD transmission signal is within the TDD transmission frequency band.

[0046] Controlling the second free end of the switch to be connected to the fixed end:

[0047] The first TDD filter receives the TDD received signal input from the antenna port, suppresses signals outside the TDD received frequency band, and outputs the TDD received signal to the receiving port; the frequency band of the TDD received signal is within the TDD received frequency band.

[0048] It should be understood that the method and process provided in the third aspect of this application are consistent with the technical solution of the first aspect of this application. Its specific content and beneficial effects can be referred to the multiplexer provided in the first aspect above, and will not be repeated here.

[0049] Fourthly, embodiments of this application provide a communication device, which may include a processor and a memory, wherein the memory is used to store program code, and the processor is used to call the program code to implement the functions involved in the communication method flow provided in the third aspect above. The communication device may also include a communication interface for communicating with other devices or communication networks.

[0050] Fifthly, embodiments of this application provide a computer-readable storage medium storing a computer program that, when executed by a processor, implements the functions involved in the communication method flow provided in the third aspect above.

[0051] Sixthly, embodiments of this application provide a computer program that includes instructions that, when executed by a computer, enable the computer to perform the functions involved in the communication method flow provided in the third aspect above.

[0052] In a seventh aspect, embodiments of this application provide a chip including a processor and a communication interface. The processor is used to call and execute instructions from the communication interface. When the processor executes the instructions, the chip performs the functions involved in the communication method flow provided in the third aspect above.

[0053] Eighthly, embodiments of this application provide a chip system including a multiplexer as described in any one of the first aspects, for implementing the functions involved in the communication method flow provided in the third aspect. In one possible design, the chip system further includes a memory for storing program instructions and data necessary for the communication method. This chip system may be composed of chips or may include chips and other discrete devices. Attached Figure Description

[0054] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the embodiments of this application or the background art will be described below.

[0055] Figure 1 This is a schematic diagram of a TDD operation provided in an embodiment of this application.

[0056] Figure 2 This is a schematic diagram of an FDD operation provided in an embodiment of this application.

[0057] Figure 3 This is a schematic diagram of a TDD (Transmit / Receive Duplex) system provided in an embodiment of this application.

[0058] Figure 4 This is a schematic diagram of FDD transmit / receive duplex provided in an embodiment of this application.

[0059] Figure 5a This is a schematic diagram of FDD transmit / receive isolation provided in an embodiment of this application.

[0060] Figure 5b This is a schematic diagram of another FDD transmit / receive isolation provided in an embodiment of this application.

[0061] Figure 6 This is a schematic diagram of a multiplexer structure with a shared transmit port for TDD and FDD provided in an embodiment of this application.

[0062] Figure 7 This is a schematic diagram of interference in a TDD receiving time slot provided in an embodiment of this application.

[0063] Figure 8 This is a schematic diagram of a multiplexer structure that does not share an antenna for TDD and FDD, provided in an embodiment of this application.

[0064] Figure 9 This is a schematic diagram of a multiplexer structure with a shared TDD and FDD antenna provided in an embodiment of this application.

[0065] Figure 10 This is a schematic diagram of a system architecture provided in an embodiment of this application.

[0066] Figure 11This is a schematic diagram of the structure of a multiplexer provided in an embodiment of this application.

[0067] Figure 12 This is a schematic diagram of another multiplexer provided in an embodiment of this application.

[0068] Figure 13 This is a schematic diagram of another type of multiplexer provided in the embodiments of this application.

[0069] Figure 14 This is a schematic diagram of another type of multiplexer provided in the embodiments of this application.

[0070] Figure 15 This is a schematic diagram of another type of multiplexer provided in the embodiments of this application.

[0071] Figure 16a This is a schematic diagram of another type of multiplexer provided in the embodiments of this application.

[0072] Figure 16b This is a schematic diagram of another type of multiplexer provided in the embodiments of this application.

[0073] Figure 17a This is a schematic diagram of another type of multiplexer provided in the embodiments of this application.

[0074] Figure 17b This is a schematic diagram of another type of multiplexer provided in the embodiments of this application.

[0075] Figure 18a This is a schematic diagram of another type of multiplexer provided in the embodiments of this application.

[0076] Figure 18b This is a schematic diagram of another type of multiplexer provided in the embodiments of this application.

[0077] Figure 19a This is a schematic diagram of another type of multiplexer provided in the embodiments of this application.

[0078] Figure 19b This is a schematic diagram of another type of multiplexer provided in the embodiments of this application.

[0079] Figure 20a This is a schematic diagram of another type of multiplexer provided in the embodiments of this application.

[0080] Figure 20b This is a schematic diagram of another type of multiplexer provided in the embodiments of this application.

[0081] Figure 21a This is a schematic diagram of another type of multiplexer provided in the embodiments of this application.

[0082] Figure 21bThis is a schematic diagram of another type of multiplexer provided in the embodiments of this application.

[0083] Figure 22 This is a schematic diagram of the structure of a communication device provided in an embodiment of this application.

[0084] Figure 23 This is a flowchart illustrating a communication method provided in an embodiment of this application. Detailed Implementation

[0085] The embodiments of this application will now be described with reference to the accompanying drawings.

[0086] The terms "first," "second," "third," and "fourth," as well as "first," "second," "third," and "fourth," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish different objects, not to describe a specific order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or apparatuses.

[0087] It should be understood that in this application, "at least one (item)" means one or more, and "more than" means two or more. "And / or" is used to describe the relationship between related objects, indicating that three relationships can exist. For example, "A and / or B" can represent three cases: only A exists, only B exists, and both A and B exist simultaneously, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one (item) of a, b, or c can represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.

[0088] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of the invention. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0089] As used in this specification, the terms "component," "module," "system," etc., are used to refer to computer-related entities, hardware, firmware, combinations of hardware and software, software, or software in execution. For example, a component can be, but is not limited to, a process running on a processor, a processor, an object, an executable file, an execution thread, a program, and / or a computer. As illustrated, applications running on computing devices and computing devices can both be components. One or more components may reside in a process and / or an execution thread, and components may be located on a single computer and / or distributed among two or more computers. Furthermore, these components can be executed from various computer-readable media on which various data structures are stored. Components can communicate, for example, via local and / or remote processes based on signals having one or more data packets (e.g., data from two components interacting with another component between a local system, a distributed system, and / or a network, such as the Internet interacting with other systems via signals).

[0090] First, some of the terms used in this application will be explained to facilitate understanding by those skilled in the art.

[0091] (1) Full-duplex refers to simultaneous two-way communication. Both parties can send and receive data at the same time. Full-duplex technology is further divided into Time Division Duplexing (TDD) and Frequency Division Duplexing (FDD).

[0092] (2) Time Division Duplex (TDD). By allocating different time slots, a TDD system can utilize a single frequency band for transmission and reception. Please refer to [link to relevant documentation]. Figure 1 , Figure 1 This is a schematic diagram illustrating the operation of TDD as provided in an embodiment of this application. Figure 1 As shown, the uplink (i.e., transmit) and downlink (i.e., receive) frequency bands can be the same; however, there is a certain time slot interval between the uplink and downlink. In some TDD systems, uplink and downlink can be allocated equal time slots, but in practical applications, the uplink and downlink time slots can also be asymmetrical.

[0093] (3) Frequency Division Duplex (FDD). An FDD system has two independent communication channels, and sufficient spacing is required between them to ensure that transmission and reception do not interfere with each other. The FDD system must filter or shield the signal to ensure that the transmitter does not affect nearby receivers. See also... Figure 2 , Figure 2 This is a schematic diagram of an FDD operation provided in an embodiment of this application. Figure 2 As shown, an FDD system can transmit and receive simultaneously through two communication channels, but the transmission and reception frequency bands are different, and there is a certain degree of isolation between the two frequency bands.

[0094] (4) Multiplexer. A component that enables multiple channels to share a single port is called a "multiplexer". Duplexers, triplexers, and quadruplexers can all be collectively referred to as "multiplexers". For example, a component that enables two channels to share a single port is called a "duplexer" (such as one transmit and one receive), while a component that enables four channels to share a single port is called a "quadruplexer" (such as two transmit and two receive).

[0095] It should be noted that a typical multiplexer includes a single input port and multiple output ports. However, the multiplexer provided in this embodiment combines multiple filters to support simultaneous operation of multiple frequency bands and multiple standards. Its implementation can be single-input multiple-output, multiple-input multiple-output, etc. Furthermore, the multiplexer provided in this embodiment includes a set of non-superimposed filters, which are combined in a way that ensures they do not load each other, and the outputs are highly isolated. That is, the frequency bands suppressed by the multiple filters are different, and the frequency bands of the output signals are different.

[0096] Please see Figure 3 , Figure 3 This is a schematic diagram of a TDD (Transmit / Receive Duplex) system provided in an embodiment of this application. Figure 3 As shown, in a TDD system, a duplexer may include a filter, an antenna (ANT) port, and a TX / RX port (TX and RX are shared in TDD). The filter is connected to both the antenna port and the TX / RX port. Figure 3 As shown, the TDD system also includes a circulator and a switch. The circulator is connected to the TX / RX port, the power amplifier (PA) in the TDD transmit channel, and one end of the switch. The other end of the switch is connected to the low-noise amplifier (LNA) in the TDD receive channel. The switch is mainly used to switch the TX and RX channels to achieve time-division duplexing. For example, when the switch is closed, the TDD system is in the receive time slot, and the TDD receive signal received by the antenna is filtered before entering the LNA. For example, when the switch is open, the TDD system is in the transmit time slot, and the TDD transmit signal output by the PA is filtered before being transmitted via the antenna. As mentioned above, the TDD receive signal and the TDD transmit signal operate in the same frequency band. Figure 3 The filter shown is used to suppress signals outside the TDD transmit / receive bands to ensure normal transmission and reception.

[0097] Please see Figure 4 , Figure 4 This is a schematic diagram of FDD transmit / receive full-duplex operation provided in an embodiment of this application. Compared to TDD, full-duplexers are typically used in FDD radio applications. For example... Figure 4As shown, in an FDD system, the duplexer consists of two filters, filter 1 and filter 2, combined together. The duplexer also includes an antenna port, a TX port, and an RX port. Filter 1 is the receive filter, and filter 2 is the transmit filter. The input of filter 1 is connected to the antenna port, and its output is connected to the RX port. The RX port is used to connect a receiver, for example, to an LNA in the FDD receive channel. The output of filter 2 is connected to the antenna port, and its input is connected to the TX port. The TX port is used to connect a transmitter, for example, via a circulator to a PA in the FDD transmit channel. Figure 4 As shown, filter 1 and filter 2 share a common node (i.e., antenna port), allowing the device to transmit and receive simultaneously. For example, as shown... Figure 4 As shown, the FDD transmit signal output by PA is filtered by filter 2 and then transmitted via the antenna. For example, as shown... Figure 4 As shown, the FDD received signal from the antenna is filtered by filter 1 before entering the LNA. As mentioned above, the FDD received signal and the FDD transmitted signal operate in different frequency bands. Therefore, in an FDD system, the duplexer design needs to ensure that the passband of each filter does not load the other filter. In particular, the transmit filter needs to have significant suppression of the receive frequency band, ensuring that nonlinear spurious signals from the PA output do not interfere with the receive frequency band. This isolation is often referred to as transmit-receive isolation at the transmit frequency. For example, Figure 4 The filter 1 shown needs to suppress signals outside the FDD receiving frequency band (especially the FDD transmitting frequency band) and output an FDD receiving signal. The filter 2 needs to suppress signals outside the FDD transmitting frequency band (especially the FDD receiving frequency band) and output an FDD transmitting signal, thereby ensuring the normal operation of FDD transmission and reception.

[0098] Please see Figure 5a , Figure 5a This is a schematic diagram of FDD transmit / receive isolation provided in an embodiment of this application. For example... Figure 5a As shown, if the FDD system does not include filters 1 and 2, the nonlinear spurious signals generated by FDD transmission cannot be well suppressed. The power attenuation of spurious signals IM3, IM5, and IM7 compared to the FDD transmitted signal is only 45dB, 50dB, and 55dB, respectively. Among them, the frequency band of spurious signal IM7 hits the FDD receiving frequency band, thereby affecting the FDD received signal and interfering with the normal operation of FDD reception.

[0099] Please see Figure 5b , Figure 5b This is another schematic diagram of FDD transmit / receive isolation provided in an embodiment of this application. For example... Figure 5bAs shown, when the FDD system includes filter 1 and filter 2 as described above, the nonlinear spurious emissions generated by FDD transmission can be well suppressed by filter 1. Figure 5b The spurious signals IM3, IM5, and IM7 shown are compared to Figure 5a There was a further significant reduction in attenuation. Specifically, the power attenuation of spurious signal IM7 compared to the FDD transmitted signal was reduced by 155dB, which has almost no impact on the FDD received signal, ensuring the normal operation of FDD reception. Generally speaking, traditional FDD base stations require transmit-receive isolation of more than 150dBc, especially the signals in the transmit frequency band appearing in the output of the receive filter need to be significantly attenuated to avoid overdrive at the receive front end.

[0100] Furthermore, when a device supports both TDD and FDD standards simultaneously, a tripler is often required. A tripler consists of three combined filters, and its passband loading and isolation targets are the same as those of a duplexer. Please refer to [link / reference]. Figure 6 , Figure 6 This is a schematic diagram of a multiplexer structure with a shared TDD and FDD transmit port provided in an embodiment of this application. Figure 6 As shown, this tripartite converter includes filter 1, filter 2, and filter 3, and adopts a traditional FDD scheme using a single TX port, meaning TDD and FDD share one TX port and one PA port. Figure 6 In the multiplexer structure shown, if TDD is in the receive time slot (switch closed) and the FDD system continues to operate, the PA cannot be turned off. The nonlinear spurious signals output by the PA will leak into the TDD receive path through the closed switch, affecting the normal operation of the TDD receiver and failing to meet system application requirements. For an example, please refer to [link to example]. Figure 7 , Figure 7 This is a schematic diagram of interference in a TDD receiving time slot provided in an embodiment of this application. For example... Figure 7 As shown, the nonlinear spurious signals of the PA can be IM3, IM5, and IM7 in the figure. Since there is no filter between the PA and the receiving path, IM3, IM5, and IM7 are not well suppressed. The frequency band of IM7 hits the TDD frequency band, and IM7 does not have significant attenuation. This can easily lead to an increase in the uplink noise floor of TDD, affecting the operation of TDDRX.

[0101] Therefore, in practical applications, FDD and TDD systems are prone to mutual interference, especially in the TDD receive time slot, where FDD transmit spurious signals can interfere with the TDD receive frequency band. Thus, the total isolation between FDD TX and TDD RX often needs to meet certain requirements before it can be used. To facilitate understanding of the embodiments of this application, the specific technical problems to be solved by this application are further analyzed and proposed. In the prior art, there are various technical solutions for multiplexer structures in TDD+FDD scenarios. Two commonly used solutions are exemplified below.

[0102] Option 1:

[0103] Please see Figure 8 , Figure 8 This is a schematic diagram of a multiplexer structure that does not share an antenna for TDD and FDD, provided in an embodiment of this application. Figure 8 As shown, the multiplexer (or tripeller) includes filter 1, filter 2, and filter 3, as well as two TX ports (TX1 and TX2), two RX ports (RX1 and RX2), and two antenna ports (ANT1 and ANT2). ANT1 is connected to filter 1 and filter 2 in the FDD system, and ANT2 is connected to filter 3 in the TDD system. The output of filter 1 is connected to LNA1 in the FDD receive channel via port RX1. The input of filter 2 is connected to PA1 in the FDD transmit path via port TX1 and circulator 1. Filter 3 is connected to PA2 in the TDD transmit path and LNA2 in the TDD receive path via TX2 / RX2 and circulator 2, respectively. Figure 8 As shown, during the TDD receive time slot (with the switch closed), PA2 stops working and will not generate spurious signals that affect TDD reception. Simultaneously, due to sufficient isolation between PA1 and the TDD receive path, it will also not affect TDD reception. Thus, Scheme 1 ensures the normal operation of the TDD receive time slot by setting different TX ports for the FDD and TDD systems.

[0104] Option 2:

[0105] Please see Figure 9 , Figure 9 This is a schematic diagram of a multiplexer structure with a shared TDD and FDD antenna provided in an embodiment of this application. Figure 9 As shown, the multiplexer 9 includes filter 1, filter 2, and filter 3, as well as two TX ports (TX1 and TX2), two RX ports (RX1 and RX2), and one antenna port. The ANT is connected to filter 1 and filter 2 in the FDD and to filter 3 in the TDD. Figure 9 For the specific structure, please refer to the above. Figure 8 The descriptions in the corresponding embodiments will not be repeated here. Figure 9 As shown, during the TDD receive time slot (with the switch closed), PA2 stops working and will not generate spurious signals that affect TDD reception. Simultaneously, due to sufficient isolation between PA1 and the TDD receive path, TDD reception will also not be affected. Thus, Scheme Two ensures the normal operation of the TDD receive time slot by setting different TX ports for the FDD and TDD systems.

[0106] Both Option 1 and Option 2 have the following drawbacks:

[0107] (1) Both FDD and TDD systems have one PA input with two different TX ports. The TX ports cannot be reused, resulting in too many circuit interfaces and system complexity. At the same time, the two independent PAs also prevent the FDD and TDD systems from sharing power, resulting in poor flexibility.

[0108] (2) FDD and TDD systems have different RX ports. The RX ports cannot be reused, resulting in too many circuit interfaces and a complex system.

[0109] Therefore, in order to solve the problem that the current multiplexer structure in the TDD+FDD scenario does not meet the actual business needs, the technical problems that this application actually aims to solve include the following aspects: by improving the multiplexer structure, under the premise of ensuring the reliable operation of FDD and TDD, FDD and TDD can share a single transmit port. Furthermore, FDD and TDD can also share a single receive port, thereby realizing the sharing of PA and LNA, greatly reducing circuit interfaces and wiring, thereby reducing circuit area and lowering manufacturing costs.

[0110] Please see Figure 10 , Figure 10 This is a schematic diagram of a system architecture provided in an embodiment of this application. For example... Figure 10 As shown, the system architecture may include a baseband 21, a transceiver 22, and an antenna system 23 connected in sequence. Figure 10 As shown, the transceiver 22 may include a multiplexer 10. This multiplexer 10 may include only one transmit port, which is connected to the output of the PA (Power Amplifier). This transmit port is used to receive the FDD and TDD transmit signals output by the PA, enabling FDD and TDD to share the transmit port. Furthermore, the multiplexer 10 may also include a receive port, which is connected to the input of the LNA (Low-Level Array Array). This receive port is used to input the FDD and TDD receive signals to the LNA, enabling FDD and TDD to share the receive port. Figure 10 As shown, in some implementations, the input of the PA is connected to a digital-analog (DA) converter module, and the output of the LNA is connected to an analog-digital (AD) converter module.

[0111] Optionally, the multiplexer 10 may also include multiple receivers, which can be connected one-to-one with the inputs of multiple LNAs to achieve sufficient isolation between FDD and TDD reception. For details, please refer to the following embodiments, which will not be elaborated further here. Furthermore, as... Figure 10As shown, the multiplexer 10 may also include one or more antenna ports, which may be connected one-to-one with one or more antennas in the antenna system 23 to receive FDD receive signals and TDD receive signals, and transmit FDD transmit signals and TDD transmit signals through the corresponding antennas.

[0112] It should be noted that the multiplexer 10 provided in this application embodiment can be applied to the field of wireless communication, specifically to communication devices such as base stations and terminal devices. The terminal device can be, for example, a smart wearable device, a smartphone, a tablet computer, a laptop computer, an in-vehicle computer, a server, a server cluster consisting of multiple servers, or a cloud computing service center, etc., and this application embodiment does not specifically limit this. The multiplexer 10 provided in this application embodiment is suitable for communication devices that need to simultaneously support both TDD and FDD standards, such as... Figure 10 As shown, the multiplexer 10 can specifically be located at the end of the transceiver 22 in the communication equipment, used to connect the antenna system 23 with the PA, LNA, etc. This embodiment of the application, through improvements to the multiplexer structure, can achieve multiplexing of a single transmit port for FDD and TDD systems while ensuring reliable operation of both, simplifying hardware implementation, reducing circuit area, and lowering power consumption and cost. Furthermore, it can also achieve multiplexing of a single receive port for FDD and TDD systems, thereby greatly reducing circuit interfaces and circuit area.

[0113] Please see Figure 11 , Figure 11 This is a schematic diagram of the structure of a multiplexer provided in an embodiment of this application. Figure 11 As shown, the multiplexer 10 includes a transmit port, at least one receive port, and at least one antenna port. Specifically, it may include a transmit port 101, N receive ports 102, and M antenna ports 103, where N and M are integers greater than or equal to 1. Figure 11 As shown, the multiplexer 10 also includes a filter bank and a switch 108. Specifically, the filter bank may include an FDD transmit filter 104, an FDD receive filter 105, a first TDD filter 106, and a second TDD filter 107. The switch 108 may include a fixed terminal (i.e.,...) Figure 11 The A end shown), the first free end (i.e. Figure 11 The B end shown) and the second free end (i.e. Figure 11 (C terminal shown). For example, the switch 108 can be a single-pole double-throw switch.

[0114] like Figure 11As shown, terminal A of switch 108 is connected to the first TDD filter 106, terminal B of switch 108 is connected to the output terminal of the second TDD filter 107, and terminal C of switch 108 is connected to one of the N receiving ports 102. Transmit port 101 is connected to the input terminals of the FDD transmit filter 104 and the second TDD filter 107. The output terminal of the FDD receive filter 105 is connected to one of the N receiving ports 102. The output terminal of the FDD transmit filter 104, the input terminal of the FDD receive filter 105, and the first TDD filter 106 are each connected to one of the M antenna ports 103.

[0115] The FDD transmit filter 104 receives the FDD transmit signal output from the transmit port 101, suppresses signals outside the FDD transmit band, and outputs the FDD transmit signal to the antenna port 103. The frequency band of the FDD transmit signal is within the FDD transmit band; for example, if the FDD transmit band is 1-2 GHz, then the frequency band of the FDD transmit signal is within the 1-2 GHz band. The FDD transmit filter 104 suppresses other signals outside the 1-2 GHz band. Other signals (e.g., signals from 3-4 GHz, or signals from 2-3 GHz, such as TDD transmit signals) will be significantly attenuated after passing through the FDD transmit filter 104.

[0116] The FDD receiver filter 105 is used to receive the FDD received signal input from the antenna port 103, suppress signals outside the FDD receiving frequency band, and output the FDD received signal to the receiver port 102. The frequency band of the FDD received signal is within the FDD receiving frequency band. For example, if the FDD receiving frequency band is 3-4 GHz, then the frequency band of the FDD received signal is within the 3-4 GHz frequency band. The FDD receiver filter 105 will suppress other signals outside the 3-4 GHz frequency band. Other signals (such as 1-2 GHz signals, or 2-3 GHz signals, such as TDD transmission signals) will be significantly attenuated after passing through the FDD receiver filter 105.

[0117] When terminal A and terminal B of switch 108 are connected:

[0118] The second TDD filter 107 is used to receive the TDD transmission signal output from the transmit port 101, suppress signals outside the TDD transmission frequency band, and output the TDD transmission signal to the first TDD filter 106.

[0119] The first TDD filter 106 is used to suppress signals outside the TDD transmission band and output the TDD transmission signal to the antenna port 103. The frequency band of the TDD transmission signal is within the TDD transmission band; for example, if the TDD transmission band is 2-3 GHz, then the frequency band of the TDD transmission signal is within the 2-3 GHz band. The second TDD filter 107 and the first TDD filter 106 suppress other signals outside the 2-3 GHz band. Other signals (e.g., signals of 1-1.5 GHz or 3-4 GHz, such as FDD transmission signals) are significantly attenuated after passing through the second TDD filter 107 and the first TDD filter 106. The second TDD filter is mainly used to separate the FDD transmission signal and the TDD transmission signal output from the transmission port 101, specifically by suppressing the FDD transmission signal to prevent the FDD transmission signal from flowing into the TDD transmission path.

[0120] Optionally, the second TDD filter 107 can be used to suppress signals outside the first frequency band, and the first TDD filter 106 can be used to suppress signals outside the second and third frequency bands. The first, second, and third frequency bands are all outside the aforementioned TDD transmission frequency bands. For example, if the TDD transmission frequency band is 2-3 GHz, then the first frequency band can be 0-1.5 GHz, the second frequency band can be 1.5-2 GHz, and the third frequency band can be 3-3.5 GHz. Thus, embodiments of this application can suppress interference signals outside multiple TDD transmission frequency bands using multiple TDD filters, thereby ensuring the suppression effect on interference signals, ensuring the normal operation of TDD transmission, and reducing the implementation difficulty of a single filter.

[0121] When terminal A and terminal C of switch 108 are connected:

[0122] The first TDD filter 106 is used to receive the TDD received signal input from the antenna port 103, suppress signals outside the TDD received frequency band, and output the TDD received signal to the receiving port 102. The frequency band of the TDD received signal is within the TDD received frequency band. As mentioned above, the TDD transmission frequency band is the same as the TDD reception frequency band. Taking 2-3 GHz as an example, the frequency band of the TDD received signal is within the 2-3 GHz frequency band. The first TDD filter 106 will suppress other signals outside the 2-3 GHz frequency band. Other signals (e.g., signals from 1-1.5 GHz, or signals from 3-4 GHz, such as FDD transmission signals) will be significantly attenuated after passing through the first TDD filter 106.

[0123] Optionally, the switch 108 can be connected to a corresponding control circuit (not shown in the figure). The control circuit is used to output a control signal. Under the action of the control signal, the switch 108 can connect terminal A to terminal B, or connect terminal A to terminal C, thereby realizing the switching of TDD transmission and reception.

[0124] As described above, the selective conduction of switch 108 between terminals B and C increases the isolation between the FDD and TDD systems. Especially during the TDD receiving time slot (i.e., when terminals A and C are conducting), the physical isolation between terminals B and C effectively prevents FDD transmit spurious signals from leaking into the TDD receiving path, thus avoiding interference with normal TDD reception. Furthermore, considering the high switching frequency of switch 108 in practical applications, there is a possibility that the FDD transmit signal and its corresponding transmit spurious signals may leak through terminal B of switch 108 into the TDD receiving path where terminal C is located. Therefore, the multiplexer 10 provided in this embodiment also includes a second TDD filter 107 between the transmit port 101 and terminal B of the switch. Through the suppression effect of the second TDD filter 107 on the FDD transmit signal, the FDD transmit signal and its corresponding transmit spurious signals are prevented from flowing into the TDD transmit path and leaking into the TDD receiving path through terminals B and C, thus fully ensuring the normal operation of TDD reception.

[0125] In summary, the multiplexer 10 provided in this application embodiment can enable FDD and TDD systems to share a single transmit port while ensuring reliable operation of both systems. This improves the multiplexing rate of the transmit port, reduces circuit wiring and circuit area, further reduces manufacturing costs, and meets user needs.

[0126] Based on the above Figure 11 In conjunction with the description of the corresponding embodiments, the various possible structures of the multiplexer 10 will be described in detail below with reference to the accompanying drawings.

[0127] Example 1: The multiplexer 10 includes a single transmit port, dual receive ports and a single antenna port.

[0128] Please see Figure 12 , Figure 12 This is a schematic diagram of another multiplexer provided in an embodiment of this application. For example... Figure 12 As shown, the multiplexer 10 includes one transmit port, two receive ports, and one antenna port, specifically including transmit port 101, TDD receive port 1021, FDD receive port 1022, and antenna port 103. Figure 12As shown, the multiplexer 10 also includes a filter bank and a switch 108. Specifically, the filter bank may include an FDD transmit filter 104, an FDD receive filter 105, a first TDD filter 106, and a second TDD filter 107. The switch 108 may include terminals A, B, and C. For example, the switch 108 may be a single-pole double-throw switch.

[0129] like Figure 12 As shown, terminal A of switch 108 is connected to the first TDD filter 106, terminal B of switch 108 is connected to the output terminal of the second TDD filter 107, and terminal C of switch 108 is connected to the TDD receiving port 1021. Transmitting port 101 is connected to the input terminals of the FDD transmitting filter 104 and the second TDD filter 107. The output terminal of the FDD receiving filter 105 is connected to the FDD receiving port 1022. The output terminal of the FDD transmitting filter 104, the input terminal of the FDD receiving filter 105, and the first TDD filter 106 are respectively connected to the antenna port 103.

[0130] Furthermore, such as Figure 12 As shown, the input of the transmit port 101 is connected to the output of the PA, the output of the TDD receive port 1021 is connected to the input of the LNA-TDD (i.e., the LNA in the TDD receive path), the output of the FDD receive port 1022 is connected to the input of the LNA-FDD (i.e., the LNA in the FDD receive path), and the antenna port 103 is connected to the antenna 109. The FDD transmit signal and TDD transmit signal of corresponding power generated by the PA can be input into the FDD transmit path and TDD transmit path through the transmit port 101.

[0131] The FDD transmit filter 104 is used to receive the FDD transmit signal output from the transmit port 101, suppress signals outside the FDD transmit frequency band, and output the FDD transmit signal to the antenna port 103.

[0132] Antenna port 103 is used to transmit FDD transmission signals through antenna 109.

[0133] Antenna port 103 is also used to receive FDD received signals via antenna 109.

[0134] FDD receiver filter 105 is used to receive the FDD receive signal input from antenna port 103, suppress signals outside the FDD receive frequency band, and output the FDD receive signal to FDD receiver port 1022.

[0135] The FDD receiver port 1022 is used to input the FDD received signal to the LNA-FDD for amplification and subsequent processing.

[0136] When terminal A and terminal B of switch 108 are connected:

[0137] The second TDD filter 107 is used to receive the TDD transmission signal output from the transmit port 101, suppress signals outside the TDD transmission frequency band, and output the TDD transmission signal to the first TDD filter 106.

[0138] The first TDD filter 106 is used to suppress signals outside the TDD transmission frequency band and output the TDD transmission signal to the antenna port 103.

[0139] Antenna port 103 is used to transmit TDD transmission signals through antenna 109.

[0140] When terminal A and terminal C of switch 108 are connected:

[0141] Antenna port 103 is used to receive TDD received signals through antenna 109.

[0142] The first TDD filter 106 is used to receive the TDD received signal input from the antenna port 103, suppress signals outside the TDD received frequency band, and output the TDD received signal to the TDD received port 1021.

[0143] The TDD receiver port 1021 is used to input the TDD received signal to the LNA-TDD for amplification and subsequent processing.

[0144] Optionally, Figure 12 For details on the functions of each part of the multiplexer 10 shown, please refer to the above. Figure 11 The description of the corresponding embodiments will not be repeated here.

[0145] Optionally, please refer to Figure 13 , Figure 13 This is a schematic diagram of another multiplexer provided in an embodiment of this application. For example... Figure 13 As shown, the filter bank of the multiplexer 10 may also include a third TDD filter 110. The input terminal of the third TDD filter 110 is connected to the C terminal of the switch 108, and the output terminal of the third TDD filter 110 is connected to the TDD receiving port 1021.

[0146] When terminal A and terminal C of switch 108 are connected:

[0147] The first TDD filter 106 is used to receive the TDD received signal input from the antenna port 103, suppress signals outside the TDD received frequency band, and output the TDD received signal to the third TDD filter 110.

[0148] The third TDD filter 110 is used to suppress signals outside the TDD receiving frequency band and output the TDD receiving signal to the TDD receiving port 1021.

[0149] Optionally, the third TDD filter 110 can be used to suppress signals outside the fourth frequency band, and the first TDD filter 106 can be used to suppress signals outside the second and third frequency bands. The second, third, and fourth frequency bands are all outside the aforementioned TDD transmission frequency bands. For example, if the TDD transmission frequency band is 2-3 GHz, then the fourth frequency band can be 3.5-5 GHz, the second frequency band can be 1.5-2 GHz, and the third frequency band can be 3-3.5 GHz. Thus, this embodiment of the application can suppress interference signals outside multiple TDD reception frequency bands using multiple TDD filters, thereby ensuring the suppression effect on interference signals, ensuring the normal operation of TDD reception, and reducing the implementation difficulty of a single filter.

[0150] like Figure 12 and Figure 13 As shown, when FDD and TDD systems share a single transmit port, they can share a single power amplifier (PA), thus achieving power sharing between the two systems. For example, if the PA's maximum output power is 200W, when FDD and TDD are transmitting simultaneously, the PA can allocate 120W of power to FDD and 90W to TDD, or 100W to both systems, and so on. When TDD is in the receive time slot and only FDD is transmitting, the PA can allocate all 200W of power to the FDD system, or allocate 180W of power to the FDD system, thereby achieving flexible power sharing between the FDD and TDD systems and reducing the number of PAs and their cost.

[0151] Example 2: The multiplexer 10 includes a single transmit port, a single receive port, and a single antenna port.

[0152] Please see Figure 14 , Figure 14 This is a schematic diagram of another multiplexer provided in an embodiment of this application. For example... Figure 14 As shown, the multiplexer 10 includes a transmit port, a receive port, and an antenna port, specifically including a transmit port 101, a receive port 102, and an antenna port 103. Figure 14 As shown, the multiplexer 10 also includes a filter bank and a switch 108, as detailed above. Figure 12 The description of the corresponding embodiments will not be repeated here.

[0153] like Figure 12As shown, terminal A of switch 108 is connected to the first TDD filter 106, terminal B of switch 108 is connected to the output terminal of the second TDD filter 107, and terminal C of switch 108 is connected to the receiving port 102. The transmitting port 101 is connected to the input terminals of the FDD transmitting filter 104 and the second TDD filter 107. The output terminal of the FDD receiving filter 105 is connected to the receiving port 102. The output terminal of the FDD transmitting filter 104, the input terminal of the FDD receiving filter 105, and the first TDD filter 106 are respectively connected to the antenna port 103.

[0154] Furthermore, such as Figure 14 As shown, the input terminal of the transmit port 101 is connected to the output terminal of the PA, the output terminal of the receive port 102 is connected to the input terminal of the LNA, and the antenna port 103 is connected to the antenna 109.

[0155] The FDD transmit filter 104 is used to receive the FDD transmit signal output from the transmit port 101, suppress signals outside the FDD transmit frequency band, and output the FDD transmit signal to the antenna port 103.

[0156] Antenna port 103 is used to transmit FDD transmission signals through antenna 109.

[0157] Antenna port 103 is also used to receive FDD received signals via antenna 109.

[0158] FDD receiver filter 105 is used to receive the FDD receive signal input from antenna port 103, suppress signals outside the FDD receive frequency band, and output the FDD receive signal to receiver port 102.

[0159] The receiving port 102 is used to input the FDD received signal to the LNA for amplification and subsequent processing.

[0160] When terminal A and terminal B of switch 108 are connected:

[0161] The second TDD filter 107 is used to receive the TDD transmission signal output from the transmit port 101, suppress signals outside the TDD transmission frequency band, and output the TDD transmission signal to the first TDD filter 106.

[0162] The first TDD filter 106 is used to suppress signals outside the TDD transmission frequency band and output the TDD transmission signal to the antenna port 103.

[0163] Antenna port 103 is used to transmit TDD transmission signals through antenna 109.

[0164] When terminal A and terminal C of switch 108 are connected:

[0165] Antenna port 103 is used to receive TDD received signals through antenna 109.

[0166] The first TDD filter 106 is used to receive the TDD received signal input from the antenna port 103, suppress signals outside the TDD received frequency band, and output the TDD received signal to the receiving port 102.

[0167] The receiving port 102 is used to input the TDD received signal to the LNA for amplification for subsequent processing.

[0168] Optionally, Figure 14 For details on the functions of each part of the multiplexer 10 shown, please refer to the above. Figure 12 The description of the corresponding embodiments will not be repeated here.

[0169] Optionally, please refer to Figure 15 , Figure 15 This is a schematic diagram of another multiplexer provided in an embodiment of this application. For example... Figure 15 As shown, the filter bank of the multiplexer 10 may also include a third TDD filter 110. The input terminal of the third TDD filter 110 is connected to the C terminal of the switch 108, and the output terminal of the third TDD filter 110 is connected to the receiving port 102.

[0170] When terminal A and terminal C of switch 108 are connected:

[0171] The first TDD filter 106 is used to receive the TDD received signal input from the antenna port 103, suppress signals outside the TDD received frequency band, and output the TDD received signal to the third TDD filter 110.

[0172] The third TDD filter 110 is used to suppress signals outside the TDD receiving frequency band and output the TDD receiving signal to the receiving port 102.

[0173] Optionally, Figure 15 For details on the functions of each part of the multiplexer 10 shown, please refer to the above. Figure 13 The description of the corresponding embodiments will not be repeated here.

[0174] like Figure 14 and Figure 15 As shown, in the case where FDD and TDD systems share a single transmit port, the embodiments of this application can further realize the sharing of TDD and FDD receive ports and LNA, thereby improving the multiplexing rate of the receive port and further reducing circuit wiring, circuit area and production costs.

[0175] In addition, such as Figure 14 and Figure 15As shown, when FDD and TDD systems can share a single transmit port and a single receive port, the interface configuration of this multiplexer 10 is similar to that of a traditional FDD multiplexer (such as...). Figure 4 As shown, the multiplexer 10 has one transmit port and one receive port. Therefore, this multiplexer 10 can be fabricated as a separate printed circuit board (PCB), allowing it to be used with both FDD and TDD systems, thus enhancing the multiplexer's flexibility and reusability.

[0176] Example 3: The multiplexer 10 includes a single transmit port, dual receive ports, and dual antenna ports.

[0177] (1) TDD and FDD RX share the same antenna

[0178] Please see Figure 16a , Figure 16a This is a schematic diagram of another multiplexer provided in an embodiment of this application. For example... Figure 16a As shown, the multiplexer 10 includes one transmit port, two receive ports, and two antenna ports, specifically including transmit port 101, TDD receive port 1021, FDD receive port 1022, antenna port 1031, and antenna port 1032. Figure 16a As shown, the multiplexer 10 also includes a filter bank and a switch 108, as detailed above. Figure 12 The description of the corresponding embodiments will not be repeated here.

[0179] like Figure 16a As shown, the output of the FDD transmit filter 104 is connected to the antenna port 1031, and the input of the FDD receive filter 105 and the first TDD filter 106 are connected to the antenna port 1032. The antenna port 1031 is connected to the antenna 1091, and the antenna port 1032 is connected to the antenna 1092. Figure 16a The connection structure of the multiplexer 10 shown can be referred to the above. Figure 12 The description of the corresponding embodiments will not be repeated here.

[0180] Antenna port 1031 is used to receive the FDD transmit signal output by FDD transmit filter 104 and transmit the FDD transmit signal through antenna 1091.

[0181] Antenna port 1032 is used to receive FDD received signals through antenna 1092 and input the FDD received signals to FDD received filter 105.

[0182] When terminal A and terminal B of switch 108 are connected:

[0183] Antenna port 1032 is used to receive the TDD transmission signal output by the first TDD filter 106 and transmit the TDD transmission signal through antenna 1092.

[0184] When terminal A and terminal C of switch 108 are connected:

[0185] Antenna port 1032 is used to receive TDD received signals through antenna 1092 and input the TDD received signals to the first TDD filter 106.

[0186] Optionally, Figure 16a For details on the functions of each part of the multiplexer 10 shown, please refer to the above. Figure 12 The description of the corresponding embodiments will not be repeated here.

[0187] Please see Figure 16b , Figure 16b This is a schematic diagram of another multiplexer provided in an embodiment of this application. For example... Figure 16b As shown, the filter bank of the multiplexer 10 may also include a third TDD filter 110. The input terminal of the third TDD filter 110 is connected to terminal C of the switch 108, and the output terminal of the third TDD filter 110 is connected to the TDD receiving port 1021. The specific function of the third TDD filter 110 can be found above. Figure 13 The description of the corresponding embodiments will not be repeated here.

[0188] (2) TDD and FDD TX share the same antenna

[0189] Please see Figure 17a , Figure 17a This is a schematic diagram of another multiplexer provided in an embodiment of this application. For example... Figure 17a As shown, the multiplexer 10 includes one transmit port, two receive ports, and two antenna ports, specifically including transmit port 101, TDD receive port 1021, FDD receive port 1022, antenna port 1031, and antenna port 1032. Figure 17a As shown, the multiplexer 10 also includes a filter bank and a switch 108, as detailed above. Figure 12 The description of the corresponding embodiments will not be repeated here.

[0190] like Figure 17a As shown, the output of the FDD transmit filter 104 and the first TDD filter 106 are connected to the antenna port 1031, and the input of the FDD receive filter 105 is connected to the antenna port 1032. The antenna port 1031 is connected to the antenna 1091, and the antenna port 1032 is connected to the antenna 1092. Figure 17a The connection structure of the multiplexer 10 shown can be referred to the above. Figure 12The description of the corresponding embodiments will not be repeated here.

[0191] Antenna port 1031 is used to receive the FDD transmit signal output by FDD transmit filter 104 and transmit the FDD transmit signal through antenna 1091.

[0192] Antenna port 1032 is used to receive FDD received signals through antenna 1092 and input the FDD received signals to FDD received filter 105.

[0193] When terminal A and terminal B of switch 108 are connected:

[0194] Antenna port 1031 is used to receive the TDD transmission signal output by the first TDD filter 106 and transmit the TDD transmission signal through antenna 1091.

[0195] When terminal A and terminal C of switch 108 are connected:

[0196] Antenna port 1031 is used to receive TDD received signals through antenna 1091 and input the TDD received signals to the first TDD filter 106.

[0197] Optionally, Figure 17a For details on the functions of each part of the multiplexer 10 shown, please refer to the above. Figure 12 The description of the corresponding embodiments will not be repeated here.

[0198] Please see Figure 17b , Figure 17b This is a schematic diagram of another multiplexer provided in an embodiment of this application. For example... Figure 17b As shown, the filter bank of the multiplexer 10 may also include a third TDD filter 110. The input terminal of the third TDD filter 110 is connected to terminal C of the switch 108, and the output terminal of the third TDD filter 110 is connected to the TDD receiving port 1021. The specific function of the third TDD filter 110 can be found above. Figure 13 The description of the corresponding embodiments will not be repeated here.

[0199] (3) FDD TX and FDD RX share the same antenna

[0200] Please see Figure 18a , Figure 18a This is a schematic diagram of another multiplexer provided in an embodiment of this application. For example... Figure 18a As shown, the multiplexer 10 includes one transmit port, two receive ports, and two antenna ports, specifically including transmit port 101, TDD receive port 1021, FDD receive port 1022, antenna port 1031, and antenna port 1032. Figure 18aAs shown, the multiplexer 10 also includes a filter bank and a switch 108, as detailed above. Figure 12 The description of the corresponding embodiments will not be repeated here.

[0201] like Figure 18a As shown, the output of the FDD transmit filter 104 and the input of the FDD receive filter 105 are connected to the antenna port 1031, and the first TDD filter 106 is connected to the antenna port 1032. The antenna port 1031 is connected to the antenna 1091, and the antenna port 1032 is connected to the antenna 1092. Figure 18a The connection structure of the multiplexer 10 shown can be referred to the above. Figure 12 The description of the corresponding embodiments will not be repeated here.

[0202] Antenna port 1031 is used to receive the FDD transmit signal output by FDD transmit filter 104 and transmit the FDD transmit signal through antenna 1091.

[0203] Antenna port 1031 is also used to receive FDD received signals through antenna 1091 and input the FDD received signals to FDD received filter 105.

[0204] When terminal A and terminal B of switch 108 are connected:

[0205] Antenna port 1032 is used to receive the TDD transmission signal output by the first TDD filter 106 and transmit the TDD transmission signal through antenna 1092.

[0206] When terminal A and terminal C of switch 108 are connected:

[0207] Antenna port 1032 is used to receive TDD received signals through antenna 1092 and input the TDD received signals to the first TDD filter 106.

[0208] Optionally, Figure 18a For details on the functions of each part of the multiplexer 10 shown, please refer to the above. Figure 12 The description of the corresponding embodiments will not be repeated here.

[0209] Please see Figure 18b , Figure 18b This is a schematic diagram of another multiplexer provided in an embodiment of this application. For example... Figure 18b As shown, the filter bank of the multiplexer 10 may also include a third TDD filter 110. The input terminal of the third TDD filter 110 is connected to terminal C of the switch 108, and the output terminal of the third TDD filter 110 is connected to the TDD receiving port 1021. The specific function of the third TDD filter 110 can be found above. Figure 13The description of the corresponding embodiments will not be repeated here.

[0210] Example 4: The multiplexer 10 includes a single transmit port, a single receive port, and dual antenna ports.

[0211] (1) TDD and FDD RX share the same antenna

[0212] Please see Figure 19a , Figure 19a This is a schematic diagram of another multiplexer provided in an embodiment of this application. For example... Figure 19a As shown, the multiplexer 10 includes one transmit port, one receive port, and two antenna ports, specifically including transmit port 101, receive port 102, antenna port 1031, and antenna port 1032. Figure 19a As shown, the multiplexer 10 also includes a filter bank and a switch 108, as detailed above. Figure 14 The description of the corresponding embodiments will not be repeated here.

[0213] like Figure 19a As shown, the output of the FDD transmit filter 104 is connected to the antenna port 1031, and the inputs of the first TDD filter 106 and the FDD receive filter 105 are connected to the antenna port 1032. The antenna port 1031 is connected to the antenna 1091, and the antenna port 1032 is connected to the antenna 1092. Figure 19a The connection structure of the multiplexer 10 shown can be referred to the above. Figure 14 The description of the corresponding embodiments will not be repeated here.

[0214] Antenna port 1031 is used to receive the FDD transmit signal output by FDD transmit filter 104 and transmit the FDD transmit signal through antenna 1091.

[0215] Antenna port 1032 is used to receive FDD received signals through antenna 1092 and input the FDD received signals to FDD received filter 105.

[0216] When terminal A and terminal B of switch 108 are connected:

[0217] Antenna port 1032 is used to receive the TDD transmission signal output by the first TDD filter 106 and transmit the TDD transmission signal through antenna 1092.

[0218] When terminal A and terminal C of switch 108 are connected:

[0219] Antenna port 1032 is used to receive TDD received signals through antenna 1092 and input the TDD received signals to the first TDD filter 106.

[0220] Optionally, Figure 19a For details on the functions of each part of the multiplexer 10 shown, please refer to the above. Figure 14 The description of the corresponding embodiments will not be repeated here.

[0221] Please see Figure 19b , Figure 19b This is a schematic diagram of another multiplexer provided in an embodiment of this application. For example... Figure 19b As shown, the filter bank of the multiplexer 10 may also include a third TDD filter 110. The input terminal of the third TDD filter 110 is connected to the C terminal of the switch 108, and the output terminal of the third TDD filter 110 is connected to the receiving port 102. The specific function of the third TDD filter 110 can be found above. Figure 15 The description of the corresponding embodiments will not be repeated here.

[0222] (2) TDD and FDD TX share the same antenna

[0223] Please see Figure 20a , Figure 20a This is a schematic diagram of another multiplexer provided in an embodiment of this application. For example... Figure 20a As shown, the multiplexer 10 includes one transmit port, one receive port, and two antenna ports, specifically including transmit port 101, receive port 102, antenna port 1031, and antenna port 1032. Figure 20a As shown, the multiplexer 10 also includes a filter bank and a switch 108, as detailed above. Figure 14 The description of the corresponding embodiments will not be repeated here.

[0224] Antenna port 1031 is used to receive the FDD transmit signal output by FDD transmit filter 104 and transmit the FDD transmit signal through antenna 1091.

[0225] Antenna port 1032 is used to receive FDD received signals through antenna 1092 and input the FDD received signals to FDD received filter 105.

[0226] When terminal A and terminal B of switch 108 are connected:

[0227] Antenna port 1031 is used to receive the TDD transmission signal output by the first TDD filter 106 and transmit the TDD transmission signal through antenna 1091.

[0228] When terminal A and terminal C of switch 108 are connected:

[0229] Antenna port 1031 is used to receive TDD received signals through antenna 1091 and input the TDD received signals to the first TDD filter 106.

[0230] Optionally, Figure 20a For details on the functions of each part of the multiplexer 10 shown, please refer to the above. Figure 14 The description of the corresponding embodiments will not be repeated here.

[0231] Please see Figure 20b , Figure 20b This is a schematic diagram of another multiplexer provided in an embodiment of this application. For example... Figure 20b As shown, the filter bank of the multiplexer 10 may also include a third TDD filter 110. The input terminal of the third TDD filter 110 is connected to the C terminal of the switch 108, and the output terminal of the third TDD filter 110 is connected to the receiving port 102. The specific function of the third TDD filter 110 can be found above. Figure 15 The description of the corresponding embodiments will not be repeated here.

[0232] (3) FDD TX and FDD RX share the same antenna

[0233] Please see Figure 21a , Figure 21a This is a schematic diagram of another multiplexer provided in an embodiment of this application. For example... Figure 21a As shown, the multiplexer 10 includes one transmit port, one receive port, and two antenna ports, specifically including transmit port 101, receive port 102, antenna port 1031, and antenna port 1032. Figure 21a As shown, the multiplexer 10 also includes a filter bank and a switch 108, as detailed above. Figure 14 The description of the corresponding embodiments will not be repeated here.

[0234] like Figure 21a As shown, the output of the FDD transmit filter 104 and the input of the FDD receive filter 105 are connected to the antenna port 1031, and the first TDD filter 106 is connected to the antenna port 1032. The antenna port 1031 is connected to the antenna 1091, and the antenna port 1032 is connected to the antenna 1092. Figure 21a The connection structure of the multiplexer 10 shown can be referred to the above. Figure 14 The description of the corresponding embodiments will not be repeated here.

[0235] Antenna port 1031 is used to receive the FDD transmit signal output by FDD transmit filter 104 and transmit the FDD transmit signal through antenna 1091.

[0236] Antenna port 1031 is also used to receive FDD received signals through antenna 1091 and input the FDD received signals to FDD received filter 105.

[0237] When terminal A and terminal B of switch 108 are connected:

[0238] Antenna port 1032 is used to receive the TDD transmission signal output by the first TDD filter 106 and transmit the TDD transmission signal through antenna 1092.

[0239] When terminal A and terminal C of switch 108 are connected:

[0240] Antenna port 1032 is used to receive TDD received signals through antenna 1092 and input the TDD received signals to the first TDD filter 106.

[0241] Optionally, Figure 21a For details on the functions of each part of the multiplexer 10 shown, please refer to the above. Figure 14 The description of the corresponding embodiments will not be repeated here.

[0242] Please see Figure 21b , Figure 21b This is a schematic diagram of another multiplexer provided in an embodiment of this application. For example... Figure 19b As shown, the filter bank of the multiplexer 10 may also include a third TDD filter 110. The input terminal of the third TDD filter 110 is connected to the C terminal of the switch 108, and the output terminal of the third TDD filter 110 is connected to the receiving port 102. The specific function of the third TDD filter 110 can be found above. Figure 15 The description of the corresponding embodiments will not be repeated here.

[0243] like Figures 16a-21b As shown, the multiplexer 10 in this embodiment can be configured with two antenna ports to form air interface isolation for multiple frequency bands, thereby reducing the suppression degree of the filter and simplifying the implementation difficulty of the filter.

[0244] In summary, this application embodiment innovates the structure of conventional multiplexers in FDD+TDD scenarios. By setting a switch and a TDD filter between the switch and the transmit port, it improves the isolation between TDD reception and FDD transmission, avoids the influence of TDD reception time slots and FDD transmission spurious signals on the TDD reception signal, and allows FDD and TDD to share a single transmit port, reducing circuit wiring and circuit area. Furthermore, this application embodiment, by setting a switch, allows the original single TDD filter (e.g., for...) to... Figure 8The filter 3 shown is separated into three filters (a first TDD filter, a second TDD filter, and a third TDD filter). The first TDD filter mainly supports multiplexing with the FDD system and supports far-end spurious suppression. The second and third TDD filters, matched with the first TDD filter, support transmit spurious suppression and receive blocking suppression, respectively. This results in lower overall loss and is more conducive to enabling FDD and TDD to share a single receiver port. Compared to traditional solutions that rely on a single filter to simultaneously support transmit spurious suppression and receive blocking suppression, leading to high filter implementation difficulty, high order, and high loss, the embodiments of this application can reduce the implementation difficulty of a single filter while ensuring suppression performance.

[0245] Based on the multiplexer 10 described in the above embodiments, this application further provides a communication device. Please refer to... Figure 22 , Figure 22 This is a schematic diagram of the structure of a communication device provided in an embodiment of this application. Figure 22 As shown, the communication device 30 includes a transmitting circuit 31, a receiving circuit 32, an antenna system 33, and a multiplexer 10. The transmitting circuit 31 can be connected to the transmitting port 101 of the multiplexer 10, the receiving circuit 32 can be connected to at least one receiving port (e.g., N receiving ports 102) of the multiplexer 10, and the antenna system 33 can be connected to at least one antenna port (e.g., M antenna ports 103) of the multiplexer 10. Optionally, the transmitting circuit 31 may include the aforementioned PA, the receiving circuit 32 may include the aforementioned LNA, and so on.

[0246] Optionally, the antenna system 33 includes an antenna, for example, a Figure 12 The antenna 109 shown is connected to the antenna port 103 of the multiplexer 10, which includes an antenna port, for example, antenna port 103.

[0247] Optionally, the antenna system 33 includes two antennas: a first antenna and a second antenna, for example... Figure 16a The antennas 1091 and 1092 shown are included in the multiplexer 10, which includes an antenna port, such as antenna port 1031 and antenna port 1032. Antenna 1091 is connected to antenna port 1031 and antenna 1092 is connected to antenna port 1032.

[0248] Optionally, the communication device 30 also includes a control circuit connected to the multiplexer 10, specifically to the switch 108 in the multiplexer 10, for outputting a control signal to control the selective conduction of the switch 108.

[0249] Optionally, the structure and function of the communication device 30 can be specifically referred to the above. Figures 10-21bThe description of the corresponding embodiments will not be repeated here. The communication device 30 can be a base station with the above-described structure and functions, or it can be a terminal device, such as a smart wearable device, smartphone, tablet computer, laptop computer, etc. Alternatively, the communication device can be a part of a base station or a terminal device. For example, it can be a part composed of a transceiver and an antenna in a base station or a terminal device, etc. The embodiments of this application do not specifically limit this.

[0250] Based on the description of the above device embodiments, this application also provides a communication method. Please refer to... Figure 23 , Figure 23 This is a flowchart illustrating a communication method provided in an embodiment of this application. This communication method can be applied to the above-mentioned... Figure 22 The communication device 30 shown includes at least a multiplexer 10, which may include a transmit port, at least one receive port, at least one antenna port, a filter bank, and switches, etc. See the above description for details. Figures 11-21b Description of the corresponding embodiment. The method may include the following steps S501-S505.

[0251] Step S501: The first free end of the control switch is connected to the fixed end.

[0252] Step S502: The TDD transmission signal output from the transmission port is received through the second TDD filter, the signal outside the TDD transmission band is suppressed, and the TDD transmission signal is output to the first TDD filter.

[0253] In step S503, the first TDD filter is used to suppress signals outside the TDD transmission frequency band, and the TDD transmission signal is output to the antenna port.

[0254] The frequency band for TDD transmission signals is within the TDD transmission frequency band.

[0255] Step S504: The second free end of the control switch is connected to the fixed end.

[0256] Step S505: The TDD received signal input from the antenna port is passed through the first TDD filter, the signal outside the TDD received frequency band is suppressed, and the TDD received signal is output to the receiving port.

[0257] The frequency band for receiving TDD signals is within the TDD receiving frequency band.

[0258] Thus, in the communication method provided in this application embodiment, reliable switching between TDD transmission and TDD reception can be achieved by selectively controlling the conduction of the fixed end of the switch between the two free ends. Furthermore, based on the physical isolation between the two free ends of the switch, signal leakage from the TDD transmission path and the TDD reception path to the other path can be effectively prevented. In particular, it can effectively prevent the leakage of the FDD transmission signal and its generated series of nonlinear spurious signals into the TDD reception path when FDD and TDD share a transmission port. Therefore, compared to the prior art where TDD and FDD cannot share a transmission port, resulting in too many interfaces, complex circuits, and large circuit area, this application embodiment can achieve the goal of FDD and TDD systems sharing a single transmission port while ensuring reliable operation of both FDD and TDD. This improves the multiplexing rate of the transmission port, reduces circuit wiring and circuit area, further reduces manufacturing costs, and meets user needs.

[0259] Alternatively, the specific details of this communication method can be found in the above description. Figures 11-21b The description of the corresponding embodiments will not be repeated here. This communication method can be implemented based on hardware, or a combination of software and hardware. Hardware implementation can include logic circuits, algorithm circuits, or analog circuits. Software implementation can include program instructions, which can be considered a software product, stored in memory, and executed by a processor to perform related functions.

[0260] This application also provides a computer-readable storage medium, wherein the computer-readable storage medium may store a program, which, when executed by a processor, enables the processor to perform some or all of the steps described in any of the above method embodiments. The storage medium may include various media capable of storing program code, such as a USB flash drive, portable hard drive, magnetic disk, optical disk, read-only memory (ROM), or random access memory (RAM).

[0261] This application also provides a computer program that includes instructions that, when executed by a multi-core processor, enable the processor to perform some or all of the steps described in the above method embodiments.

[0262] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0263] It should be noted that, for the sake of simplicity, the foregoing method embodiments are all described as a series of actions. However, those skilled in the art should understand that this application is not limited to the described order of actions, as some steps may be performed in other orders or simultaneously according to this application. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are preferred embodiments, and the actions and modules involved are not necessarily essential to this application.

[0264] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application.

Claims

1. A multiplexer, characterized in that, The multiplexer includes a transmit port, a receive port, at least one antenna port, a filter bank, and a switch; the filter bank includes a frequency division duplex (FDD) transmit filter, an FDD receive filter, a first time division duplex (TDD) filter, and a second TDD filter; wherein... The fixed end of the switch is connected to the first TDD filter, the first free end of the switch is connected to the output end of the second TDD filter, and the second free end of the switch is connected to the receiving port; the transmitting port is connected to the input end of the FDD transmitting filter and the input end of the second TDD filter, and the output end of the FDD receiving filter is connected to the receiving port; the output end of the FDD transmitting filter, the input end of the FDD receiving filter, and the first TDD filter are respectively connected to one of the at least one antenna port; The output of one of the receiving ports is connected to the input of a low-noise amplifier (LNA) for inputting FDD and TDD receiving signals to the LNA.

2. The multiplexer according to claim 1, characterized in that, When the first free end of the switch is connected to the fixed end: The second TDD filter is used to receive the TDD transmission signal output from the transmission port, and to suppress signals outside the TDD transmission band, and output the TDD transmission signal to the first TDD filter; The first TDD filter is used to suppress signals outside the TDD transmission frequency band and output the TDD transmission signal to the antenna port; the frequency band of the TDD transmission signal is within the TDD transmission frequency band. When the second free end of the switch is connected to the fixed end: The first TDD filter is used to receive the TDD received signal input from the antenna port, and to suppress signals outside the TDD received frequency band, and output the TDD received signal to the receiving port; the frequency band of the TDD received signal is within the TDD received frequency band.

3. The multiplexer according to claim 2, characterized in that, The second TDD filter is specifically used to suppress signals in the first frequency band and output the TDD transmission signal to the first TDD filter; The first TDD filter is specifically used to suppress signals in the second and third frequency bands and output the TDD transmission signal to the antenna port; the first, second, and third frequency bands are all outside the TDD transmission frequency band.

4. The multiplexer according to claim 3, characterized in that, The filter bank further includes a third TDD filter; the input terminal of the third TDD filter is connected to the second free terminal of the switch, and the output terminal of the third TDD filter is connected to the receiving port.

5. The multiplexer according to claim 4, characterized in that, The first TDD filter is specifically used to suppress signals in the second frequency band and the third frequency band, and output the TDD received signal to the third TDD filter; The third TDD filter is used to suppress the signal of the fourth frequency band and output the TDD received signal to the receiving port; the second frequency band, the third frequency band and the fourth frequency band are all outside the TDD receiving frequency band.

6. The multiplexer according to any one of claims 1-3, characterized in that, The receiving port is connected to the output of the FDD receiving filter and the second free end of the switch, respectively.

7. The multiplexer according to claim 6, characterized in that, The receiving port is used to receive the FDD received signal output by the FDD receiving filter; When the second free end of the switch is connected to the fixed end, the receiving port is also used to receive the TDD received signal output by the first TDD filter.

8. The multiplexer according to any one of claims 4-5, characterized in that, The receiving port is connected to the output of the FDD receiving filter and the output of the third TDD filter, respectively.

9. The multiplexer according to claim 8, characterized in that, The receiving port is used to receive the FDD received signal output by the FDD receiving filter; When the second free end of the switch is connected to the fixed end, the receiving port is also used to receive the TDD received signal output by the third TDD filter.

10. The multiplexer according to any one of claims 1-9, characterized in that, The number of at least one antenna port is one, and the antenna port is connected to the output terminal of the FDD transmit filter, the input terminal of the FDD receive filter, and the first TDD filter, respectively.

11. The multiplexer according to any one of claims 1-9, characterized in that, The at least one antenna port includes a first antenna port and a second antenna port; the first antenna port is connected to the output of the FDD transmit filter and the input of the FDD receive filter, and the second antenna port is connected to the first TDD filter.

12. The multiplexer according to any one of claims 1-9, characterized in that, The at least one antenna port includes a first antenna port and a second antenna port; the first antenna port is connected to the output of the FDD transmit filter and the first TDD filter, and the second antenna port is connected to the input of the FDD receive filter.

13. The multiplexer according to any one of claims 1-9, characterized in that, The at least one antenna port includes a first antenna port and a second antenna port; the first antenna port is connected to the output of the FDD transmit filter, and the second antenna port is connected to the input of the FDD receive filter and the first TDD filter.

14. The multiplexer according to any one of claims 1-13, characterized in that, The FDD transmit filter is used to receive the FDD transmit signal output from the transmit port, and to suppress signals outside the FDD transmit frequency band, and output the FDD transmit signal to the antenna port; the frequency band of the FDD transmit signal is within the FDD transmit frequency band; The FDD receiving filter is used to receive the FDD received signal input from the antenna port, and to suppress signals outside the FDD receiving frequency band, and output the FDD received signal to the receiving port; the frequency band of the FDD received signal is within the FDD receiving frequency band.

15. The multiplexer according to any one of claims 1-14, characterized in that, The input terminal of one of the transmitting ports is connected to the output terminal of a power amplifier (PA) for receiving FDD and TDD transmitting signals of corresponding power generated by the PA; wherein the output power of the PA is shared between the FDD and TDD transmitting signals as needed.

16. A communication device, characterized in that, The communication device includes a transmitting circuit, a receiving circuit, an antenna system, and a multiplexer as described in any one of claims 1-15; the transmitting circuit is connected to a transmitting port in the multiplexer, the receiving circuit is connected to a receiving port in the multiplexer, the antenna system includes one or more antennas, the multiplexer includes one or more antenna ports, and the one or more antenna ports are connected one-to-one with the one or more antennas.

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